1 ; Test 32-bit floating-point stores. 2 ; 3 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s 4 5 ; Test the low end of the STE range. 6 define void @f1(float *%ptr, float %val) { 7 ; CHECK-LABEL: f1: 8 ; CHECK: ste %f0, 0(%r2) 9 ; CHECK: br %r14 10 store float %val, float *%ptr 11 ret void 12 } 13 14 ; Test the high end of the STE range. 15 define void @f2(float *%src, float %val) { 16 ; CHECK-LABEL: f2: 17 ; CHECK: ste %f0, 4092(%r2) 18 ; CHECK: br %r14 19 %ptr = getelementptr float *%src, i64 1023 20 store float %val, float *%ptr 21 ret void 22 } 23 24 ; Check the next word up, which should use STEY instead of STE. 25 define void @f3(float *%src, float %val) { 26 ; CHECK-LABEL: f3: 27 ; CHECK: stey %f0, 4096(%r2) 28 ; CHECK: br %r14 29 %ptr = getelementptr float *%src, i64 1024 30 store float %val, float *%ptr 31 ret void 32 } 33 34 ; Check the high end of the aligned STEY range. 35 define void @f4(float *%src, float %val) { 36 ; CHECK-LABEL: f4: 37 ; CHECK: stey %f0, 524284(%r2) 38 ; CHECK: br %r14 39 %ptr = getelementptr float *%src, i64 131071 40 store float %val, float *%ptr 41 ret void 42 } 43 44 ; Check the next word up, which needs separate address logic. 45 ; Other sequences besides this one would be OK. 46 define void @f5(float *%src, float %val) { 47 ; CHECK-LABEL: f5: 48 ; CHECK: agfi %r2, 524288 49 ; CHECK: ste %f0, 0(%r2) 50 ; CHECK: br %r14 51 %ptr = getelementptr float *%src, i64 131072 52 store float %val, float *%ptr 53 ret void 54 } 55 56 ; Check the high end of the negative aligned STEY range. 57 define void @f6(float *%src, float %val) { 58 ; CHECK-LABEL: f6: 59 ; CHECK: stey %f0, -4(%r2) 60 ; CHECK: br %r14 61 %ptr = getelementptr float *%src, i64 -1 62 store float %val, float *%ptr 63 ret void 64 } 65 66 ; Check the low end of the STEY range. 67 define void @f7(float *%src, float %val) { 68 ; CHECK-LABEL: f7: 69 ; CHECK: stey %f0, -524288(%r2) 70 ; CHECK: br %r14 71 %ptr = getelementptr float *%src, i64 -131072 72 store float %val, float *%ptr 73 ret void 74 } 75 76 ; Check the next word down, which needs separate address logic. 77 ; Other sequences besides this one would be OK. 78 define void @f8(float *%src, float %val) { 79 ; CHECK-LABEL: f8: 80 ; CHECK: agfi %r2, -524292 81 ; CHECK: ste %f0, 0(%r2) 82 ; CHECK: br %r14 83 %ptr = getelementptr float *%src, i64 -131073 84 store float %val, float *%ptr 85 ret void 86 } 87 88 ; Check that STE allows an index. 89 define void @f9(i64 %src, i64 %index, float %val) { 90 ; CHECK-LABEL: f9: 91 ; CHECK: ste %f0, 4092({{%r3,%r2|%r2,%r3}}) 92 ; CHECK: br %r14 93 %add1 = add i64 %src, %index 94 %add2 = add i64 %add1, 4092 95 %ptr = inttoptr i64 %add2 to float * 96 store float %val, float *%ptr 97 ret void 98 } 99 100 ; Check that STEY allows an index. 101 define void @f10(i64 %src, i64 %index, float %val) { 102 ; CHECK-LABEL: f10: 103 ; CHECK: stey %f0, 4096({{%r3,%r2|%r2,%r3}}) 104 ; CHECK: br %r14 105 %add1 = add i64 %src, %index 106 %add2 = add i64 %add1, 4096 107 %ptr = inttoptr i64 %add2 to float * 108 store float %val, float *%ptr 109 ret void 110 } 111
