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      1 ; Test 64-bit addition in which the second operand is constant.
      2 ;
      3 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
      4 
      5 ; Check additions of 1.
      6 define i64 @f1(i64 %a) {
      7 ; CHECK-LABEL: f1:
      8 ; CHECK: {{aghi %r2, 1|la %r[0-5], 1\(%r2\)}}
      9 ; CHECK: br %r14
     10   %add = add i64 %a, 1
     11   ret i64 %add
     12 }
     13 
     14 ; Check the high end of the AGHI range.
     15 define i64 @f2(i64 %a) {
     16 ; CHECK-LABEL: f2:
     17 ; CHECK: aghi %r2, 32767
     18 ; CHECK: br %r14
     19   %add = add i64 %a, 32767
     20   ret i64 %add
     21 }
     22 
     23 ; Check the next value up, which must use AGFI instead.
     24 define i64 @f3(i64 %a) {
     25 ; CHECK-LABEL: f3:
     26 ; CHECK: {{agfi %r2, 32768|lay %r[0-5], 32768\(%r2\)}}
     27 ; CHECK: br %r14
     28   %add = add i64 %a, 32768
     29   ret i64 %add
     30 }
     31 
     32 ; Check the high end of the AGFI range.
     33 define i64 @f4(i64 %a) {
     34 ; CHECK-LABEL: f4:
     35 ; CHECK: agfi %r2, 2147483647
     36 ; CHECK: br %r14
     37   %add = add i64 %a, 2147483647
     38   ret i64 %add
     39 }
     40 
     41 ; Check the next value up, which must use ALGFI instead.
     42 define i64 @f5(i64 %a) {
     43 ; CHECK-LABEL: f5:
     44 ; CHECK: algfi %r2, 2147483648
     45 ; CHECK: br %r14
     46   %add = add i64 %a, 2147483648
     47   ret i64 %add
     48 }
     49 
     50 ; Check the high end of the ALGFI range.
     51 define i64 @f6(i64 %a) {
     52 ; CHECK-LABEL: f6:
     53 ; CHECK: algfi %r2, 4294967295
     54 ; CHECK: br %r14
     55   %add = add i64 %a, 4294967295
     56   ret i64 %add
     57 }
     58 
     59 ; Check the next value up, which must be loaded into a register first.
     60 define i64 @f7(i64 %a) {
     61 ; CHECK-LABEL: f7:
     62 ; CHECK: llihl %r0, 1
     63 ; CHECK: agr
     64 ; CHECK: br %r14
     65   %add = add i64 %a, 4294967296
     66   ret i64 %add
     67 }
     68 
     69 ; Check the high end of the negative AGHI range.
     70 define i64 @f8(i64 %a) {
     71 ; CHECK-LABEL: f8:
     72 ; CHECK: aghi %r2, -1
     73 ; CHECK: br %r14
     74   %add = add i64 %a, -1
     75   ret i64 %add
     76 }
     77 
     78 ; Check the low end of the AGHI range.
     79 define i64 @f9(i64 %a) {
     80 ; CHECK-LABEL: f9:
     81 ; CHECK: aghi %r2, -32768
     82 ; CHECK: br %r14
     83   %add = add i64 %a, -32768
     84   ret i64 %add
     85 }
     86 
     87 ; Check the next value down, which must use AGFI instead.
     88 define i64 @f10(i64 %a) {
     89 ; CHECK-LABEL: f10:
     90 ; CHECK: {{agfi %r2, -32769|lay %r[0-5]+, -32769\(%r2\)}}
     91 ; CHECK: br %r14
     92   %add = add i64 %a, -32769
     93   ret i64 %add
     94 }
     95 
     96 ; Check the low end of the AGFI range.
     97 define i64 @f11(i64 %a) {
     98 ; CHECK-LABEL: f11:
     99 ; CHECK: agfi %r2, -2147483648
    100 ; CHECK: br %r14
    101   %add = add i64 %a, -2147483648
    102   ret i64 %add
    103 }
    104 
    105 ; Check the next value down, which must use SLGFI instead.
    106 define i64 @f12(i64 %a) {
    107 ; CHECK-LABEL: f12:
    108 ; CHECK: slgfi %r2, 2147483649
    109 ; CHECK: br %r14
    110   %add = add i64 %a, -2147483649
    111   ret i64 %add
    112 }
    113 
    114 ; Check the low end of the SLGFI range.
    115 define i64 @f13(i64 %a) {
    116 ; CHECK-LABEL: f13:
    117 ; CHECK: slgfi %r2, 4294967295
    118 ; CHECK: br %r14
    119   %add = add i64 %a, -4294967295
    120   ret i64 %add
    121 }
    122 
    123 ; Check the next value down, which must use register addition instead.
    124 define i64 @f14(i64 %a) {
    125 ; CHECK-LABEL: f14:
    126 ; CHECK: llihf %r0, 4294967295
    127 ; CHECK: agr
    128 ; CHECK: br %r14
    129   %add = add i64 %a, -4294967296
    130   ret i64 %add
    131 }
    132