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      1 ; Test 32-bit GPR accesses to a PC-relative location.
      2 ;
      3 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
      4 
      5 @gsrc16 = global i16 1
      6 @gsrc32 = global i32 1
      7 @gdst16 = global i16 2
      8 @gdst32 = global i32 2
      9 @gsrc16u = global i16 1, align 1, section "foo"
     10 @gsrc32u = global i32 1, align 2, section "foo"
     11 @gdst16u = global i16 2, align 1, section "foo"
     12 @gdst32u = global i32 2, align 2, section "foo"
     13 
     14 ; Check sign-extending loads from i16.
     15 define i32 @f1() {
     16 ; CHECK-LABEL: f1:
     17 ; CHECK: lhrl %r2, gsrc16
     18 ; CHECK: br %r14
     19   %val = load i16 *@gsrc16
     20   %ext = sext i16 %val to i32
     21   ret i32 %ext
     22 }
     23 
     24 ; Check zero-extending loads from i16.
     25 define i32 @f2() {
     26 ; CHECK-LABEL: f2:
     27 ; CHECK: llhrl %r2, gsrc16
     28 ; CHECK: br %r14
     29   %val = load i16 *@gsrc16
     30   %ext = zext i16 %val to i32
     31   ret i32 %ext
     32 }
     33 
     34 ; Check truncating 16-bit stores.
     35 define void @f3(i32 %val) {
     36 ; CHECK-LABEL: f3:
     37 ; CHECK: sthrl %r2, gdst16
     38 ; CHECK: br %r14
     39   %half = trunc i32 %val to i16
     40   store i16 %half, i16 *@gdst16
     41   ret void
     42 }
     43 
     44 ; Check plain loads and stores.
     45 define void @f4() {
     46 ; CHECK-LABEL: f4:
     47 ; CHECK: lrl %r0, gsrc32
     48 ; CHECK: strl %r0, gdst32
     49 ; CHECK: br %r14
     50   %val = load i32 *@gsrc32
     51   store i32 %val, i32 *@gdst32
     52   ret void
     53 }
     54 
     55 ; Repeat f1 with an unaligned variable.
     56 define i32 @f5() {
     57 ; CHECK-LABEL: f5:
     58 ; CHECK: lgrl [[REG:%r[0-5]]], gsrc16u
     59 ; CHECK: lh %r2, 0([[REG]])
     60 ; CHECK: br %r14
     61   %val = load i16 *@gsrc16u, align 1
     62   %ext = sext i16 %val to i32
     63   ret i32 %ext
     64 }
     65 
     66 ; Repeat f2 with an unaligned variable.
     67 define i32 @f6() {
     68 ; CHECK-LABEL: f6:
     69 ; CHECK: lgrl [[REG:%r[0-5]]], gsrc16u
     70 ; CHECK: llh %r2, 0([[REG]])
     71 ; CHECK: br %r14
     72   %val = load i16 *@gsrc16u, align 1
     73   %ext = zext i16 %val to i32
     74   ret i32 %ext
     75 }
     76 
     77 ; Repeat f3 with an unaligned variable.
     78 define void @f7(i32 %val) {
     79 ; CHECK-LABEL: f7:
     80 ; CHECK: lgrl [[REG:%r[0-5]]], gdst16u
     81 ; CHECK: sth %r2, 0([[REG]])
     82 ; CHECK: br %r14
     83   %half = trunc i32 %val to i16
     84   store i16 %half, i16 *@gdst16u, align 1
     85   ret void
     86 }
     87 
     88 ; Repeat f4 with unaligned variables.
     89 define void @f8() {
     90 ; CHECK-LABEL: f8:
     91 ; CHECK: larl [[REG:%r[0-5]]], gsrc32u
     92 ; CHECK: l [[VAL:%r[0-5]]], 0([[REG]])
     93 ; CHECK: larl [[REG:%r[0-5]]], gdst32u
     94 ; CHECK: st [[VAL]], 0([[REG]])
     95 ; CHECK: br %r14
     96   %val = load i32 *@gsrc32u, align 2
     97   store i32 %val, i32 *@gdst32u, align 2
     98   ret void
     99 }
    100