1 2 include $(top_srcdir)/Makefile.tool-tests.am 3 4 dist_noinst_SCRIPTS = filter_stderr 5 6 EXTRA_DIST = \ 7 bug129390-ppc32.stdout.exp bug129390-ppc32.stderr.exp \ 8 bug129390-ppc32.vgtest \ 9 bug139050-ppc32.stdout.exp bug139050-ppc32.stderr.exp \ 10 bug139050-ppc32.vgtest \ 11 ldstrev.stderr.exp ldstrev.stdout.exp ldstrev.vgtest \ 12 lsw.stderr.exp lsw.stdout.exp lsw.vgtest \ 13 jm-int.stderr.exp jm-int.stdout.exp jm-int.vgtest \ 14 jm-fp.stderr.exp jm-fp.stdout.exp jm-fp.vgtest \ 15 jm-vmx.stderr.exp jm-vmx.stdout.exp jm-vmx.stdout.exp_Minus_nan \ 16 jm-vmx.vgtest \ 17 mftocrf.stderr.exp mftocrf.stdout.exp mftocrf.vgtest \ 18 mcrfs.stderr.exp mcrfs.stdout.exp mcrfs.vgtest \ 19 round.stderr.exp round.stdout.exp round.vgtest \ 20 test_fx.stderr.exp test_fx.stdout.exp test_fx.stdout.exp_Minus_nan \ 21 test_fx.vgtest \ 22 test_gx.stderr.exp test_gx.stdout.exp test_gx.stdout.exp_Minus_nan \ 23 test_gx.vgtest \ 24 testVMX.stderr.exp testVMX.stdout.exp testVMX.vgtest \ 25 twi.stderr.exp twi.stdout.exp twi.vgtest \ 26 tw.stderr.exp tw.stdout.exp tw.vgtest \ 27 xlc_dbl_u32.stderr.exp xlc_dbl_u32.stdout.exp xlc_dbl_u32.vgtest \ 28 power5+_round.stderr.exp power5+_round.stdout.exp power5+_round.vgtest \ 29 power6_bcmp.stderr.exp power6_bcmp.stdout.exp power6_bcmp.vgtest \ 30 test_isa_2_06_part1.stderr.exp test_isa_2_06_part1.stdout.exp test_isa_2_06_part1.vgtest \ 31 test_isa_2_06_part2.stderr.exp test_isa_2_06_part2.stdout.exp test_isa_2_06_part2.vgtest \ 32 test_isa_2_06_part3.stderr.exp test_isa_2_06_part3.stdout.exp test_isa_2_06_part3.vgtest \ 33 test_dfp1.stderr.exp test_dfp1.stdout.exp test_dfp1.vgtest \ 34 test_dfp2.stderr.exp test_dfp2.stdout.exp test_dfp2.vgtest \ 35 test_dfp2.stdout.exp_Without_dcffix \ 36 test_dfp3.stderr.exp test_dfp3.stdout.exp test_dfp3.vgtest \ 37 test_dfp4.stderr.exp test_dfp4.stdout.exp test_dfp4.vgtest \ 38 test_dfp5.stderr.exp test_dfp5.stdout.exp test_dfp5.vgtest 39 40 check_PROGRAMS = \ 41 allexec \ 42 bug129390-ppc32 \ 43 bug139050-ppc32 \ 44 ldstrev lsw jm-insns mftocrf mcrfs round test_fx test_gx \ 45 testVMX twi tw xlc_dbl_u32 power5+_round power6_bcmp \ 46 test_isa_2_06_part1 \ 47 test_isa_2_06_part2 \ 48 test_isa_2_06_part3 \ 49 test_dfp1 test_dfp2 test_dfp3 test_dfp4 test_dfp5 50 51 52 AM_CFLAGS += @FLAG_M32@ 53 AM_CXXFLAGS += @FLAG_M32@ 54 AM_CCASFLAGS += @FLAG_M32@ 55 56 allexec_CFLAGS = $(AM_CFLAGS) @FLAG_W_NO_NONNULL@ 57 58 if HAS_ALTIVEC 59 ALTIVEC_FLAG = -DHAS_ALTIVEC 60 else 61 ALTIVEC_FLAG = 62 endif 63 64 if HAS_VSX 65 BUILD_FLAG_VSX = -mvsx 66 VSX_FLAG = -DHAS_VSX 67 else 68 BUILD_FLAG_VSX = 69 VSX_FLAG = 70 endif 71 72 if HAS_DFP 73 BUILD_FLAGS_DFP = -mhard-dfp -mcpu=power6 74 DFP_FLAG = -DHAS_DFP 75 else 76 BUILD_FLAGS_DFP = 77 DFP_FLAG = 78 endif 79 80 jm_insns_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames -maltivec \ 81 @FLAG_M32@ $(ALTIVEC_FLAG) 82 83 testVMX_CFLAGS = $(AM_CFLAGS) -O -g -Wall -maltivec -mabi=altivec -DALTIVEC \ 84 -DGCC_COMPILER @FLAG_M32@ 85 86 test_isa_2_06_part1_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(VSX_FLAG) \ 87 @FLAG_M32@ $(ALTIVEC_FLAG) $(BUILD_FLAG_VSX) 88 89 test_isa_2_06_part2_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(VSX_FLAG) \ 90 @FLAG_M32@ $(ALTIVEC_FLAG) $(BUILD_FLAG_VSX) 91 92 test_isa_2_06_part3_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -lm -g -mregnames $(VSX_FLAG) \ 93 @FLAG_M32@ $(ALTIVEC_FLAG) $(BUILD_FLAG_VSX) 94 95 test_dfp1_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -lm -g -mregnames $(DFP_FLAG) \ 96 @FLAG_M32@ $(BUILD_FLAGS_DFP) 97 test_dfp2_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -lm -g -mregnames $(DFP_FLAG) \ 98 @FLAG_M32@ $(BUILD_FLAGS_DFP) 99 test_dfp3_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -lm -g -mregnames $(DFP_FLAG) \ 100 @FLAG_M32@ $(BUILD_FLAGS_DFP) 101 102 test_dfp4_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -lm -g -mregnames $(DFP_FLAG) \ 103 @FLAG_M32@ $(BUILD_FLAGS_DFP) 104 105 test_dfp5_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -lm -g -mregnames $(DFP_FLAG) \ 106 @FLAG_M32@ $(BUILD_FLAGS_DFP) 107
