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      1 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S64"
      2 target triple = "armv7-none-linux-gnueabi"
      3 
      4 declare i8* @rsOffset([1 x i32] %a.coerce, i32 %sizeOf, i32 %x, i32 %y, i32 %z)
      5 
      6 ; The loads and stores in this file are annotated with RenderScript-specific
      7 ; information for the type based alias analysis, such that the TBAA analysis
      8 ; understands that loads and stores from two allocations with different types
      9 ; can never access the same memory element. This is different from C, where
     10 ; a char or uchar load/store is special as it can alias with about everything.
     11 ;
     12 ; The TBAA tree in this file has the the node "RenderScript TBAA" as its root.
     13 ; This means all loads/stores that share this common root can be proven to not
     14 ; alias. However, the alias analysis still has to assume MayAlias between
     15 ; memory accesses in this file and memory accesses annotated with the C/C++
     16 ; TBAA metadata.
     17 ; If we can ensure that all accesses to elements loaded from RenderScript
     18 ; allocations are either annotated with the RenderScript TBAA information or
     19 ; not annotated at all, but never annotated with the C/C++ metadata, we
     20 ; can add the RenderScript TBAA tree under the C/C++ TBAA tree. This enables
     21 ; then the TBAA to prove that an access to data from the RenderScript allocation
     22 ; does not alias with a load/store accessing something not part of a RenderScript
     23 ; allocation.
     24 
     25 
     26 !14 = metadata !{metadata !"RenderScript TBAA"}
     27 !15 = metadata !{metadata !"allocation", metadata !14}
     28 
     29 !21 = metadata !{metadata !"char", metadata !15}
     30 define void @rsSetElementAtImpl_char([1 x i32] %a.coerce, i8 signext %val, i32 %x, i32 %y, i32 %z) #2 {
     31   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 1, i32 %x, i32 %y, i32 %z) #10
     32   store i8 %val, i8* %1, align 1, !tbaa !21
     33   ret void
     34 }
     35 
     36 define signext i8 @rsGetElementAtImpl_char([1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #3 {
     37   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 1, i32 %x, i32 %y, i32 %z) #10
     38   %2 = load i8* %1, align 1, !tbaa !21
     39   ret i8 %2
     40 }
     41 
     42 !22 = metadata !{metadata !"char2", metadata !15}
     43 define void @rsSetElementAtImpl_char2([1 x i32] %a.coerce, <2 x i8> %val, i32 %x, i32 %y, i32 %z) #2 {
     44   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 2, i32 %x, i32 %y, i32 %z) #10
     45   %2 = bitcast i8* %1 to <2 x i8>*
     46   store <2 x i8> %val, <2 x i8>* %2, align 2, !tbaa !22
     47   ret void
     48 }
     49 
     50 define <2 x i8> @rsGetElementAtImpl_char2([1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #3 {
     51   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 2, i32 %x, i32 %y, i32 %z) #10
     52   %2 = bitcast i8* %1 to <2 x i8>*
     53   %3 = load <2 x i8>* %2, align 2, !tbaa !22
     54   ret <2 x i8> %3
     55 }
     56 
     57 !23 = metadata !{metadata !"char3", metadata !15}
     58 define void @rsSetElementAtImpl_char3([1 x i32] %a.coerce, <3 x i8> %val, i32 %x, i32 %y, i32 %z) #2 {
     59   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 4, i32 %x, i32 %y, i32 %z) #10
     60   %2 = shufflevector <3 x i8> %val, <3 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
     61   %3 = bitcast i8* %1 to <4 x i8>*
     62   store <4 x i8> %2, <4 x i8>* %3, align 4, !tbaa !23
     63   ret void
     64 }
     65 
     66 define <3 x i8> @rsGetElementAtImpl_char3([1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #3 {
     67   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 4, i32 %x, i32 %y, i32 %z) #10
     68   %2 = bitcast i8* %1 to <4 x i8>*
     69   %3 = load <4 x i8>* %2, align 4, !tbaa !23
     70   %4 = shufflevector <4 x i8> %3, <4 x i8> undef, <3 x i32> <i32 0, i32 1, i32 2>
     71   ret <3 x i8> %4
     72 }
     73 
     74 !24 = metadata !{metadata !"char4", metadata !15}
     75 define void @rsSetElementAtImpl_char4([1 x i32] %a.coerce, <4 x i8> %val, i32 %x, i32 %y, i32 %z) #2 {
     76   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 4, i32 %x, i32 %y, i32 %z) #10
     77   %2 = bitcast i8* %1 to <4 x i8>*
     78   store <4 x i8> %val, <4 x i8>* %2, align 4, !tbaa !24
     79   ret void
     80 }
     81 
     82 define <4 x i8> @rsGetElementAtImpl_char4([1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #3 {
     83   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 4, i32 %x, i32 %y, i32 %z) #10
     84   %2 = bitcast i8* %1 to <4 x i8>*
     85   %3 = load <4 x i8>* %2, align 4, !tbaa !24
     86   ret <4 x i8> %3
     87 }
     88 
     89 !25 = metadata !{metadata !"uchar", metadata !15}
     90 define void @rsSetElementAtImpl_uchar([1 x i32] %a.coerce, i8 zeroext %val, i32 %x, i32 %y, i32 %z) #2 {
     91   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 1, i32 %x, i32 %y, i32 %z) #10
     92   store i8 %val, i8* %1, align 1, !tbaa !25
     93   ret void
     94 }
     95 
     96 define zeroext i8 @rsGetElementAtImpl_uchar([1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #3 {
     97   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 1, i32 %x, i32 %y, i32 %z) #10
     98   %2 = load i8* %1, align 1, !tbaa !25
     99   ret i8 %2
    100 }
    101 
    102 !26 = metadata !{metadata !"uchar2", metadata !15}
    103 define void @rsSetElementAtImpl_uchar2([1 x i32] %a.coerce, <2 x i8> %val, i32 %x, i32 %y, i32 %z) #2 {
    104   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 2, i32 %x, i32 %y, i32 %z) #10
    105   %2 = bitcast i8* %1 to <2 x i8>*
    106   store <2 x i8> %val, <2 x i8>* %2, align 2, !tbaa !26
    107   ret void
    108 }
    109 
    110 define <2 x i8> @rsGetElementAtImpl_uchar2([1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #3 {
    111   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 2, i32 %x, i32 %y, i32 %z) #10
    112   %2 = bitcast i8* %1 to <2 x i8>*
    113   %3 = load <2 x i8>* %2, align 2, !tbaa !26
    114   ret <2 x i8> %3
    115 }
    116 
    117 !27 = metadata !{metadata !"uchar3", metadata !15}
    118 define void @rsSetElementAtImpl_uchar3([1 x i32] %a.coerce, <3 x i8> %val, i32 %x, i32 %y, i32 %z) #2 {
    119   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 4, i32 %x, i32 %y, i32 %z) #10
    120   %2 = shufflevector <3 x i8> %val, <3 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
    121   %3 = bitcast i8* %1 to <4 x i8>*
    122   store <4 x i8> %2, <4 x i8>* %3, align 4, !tbaa !27
    123   ret void
    124 }
    125 
    126 define <3 x i8> @rsGetElementAtImpl_uchar3([1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #3 {
    127   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 4, i32 %x, i32 %y, i32 %z) #10
    128   %2 = bitcast i8* %1 to <4 x i8>*
    129   %3 = load <4 x i8>* %2, align 4, !tbaa !27
    130   %4 = shufflevector <4 x i8> %3, <4 x i8> undef, <3 x i32> <i32 0, i32 1, i32 2>
    131   ret <3 x i8> %4
    132 }
    133 
    134 !28 = metadata !{metadata !"uchar4", metadata !15}
    135 define void @rsSetElementAtImpl_uchar4([1 x i32] %a.coerce, <4 x i8> %val, i32 %x, i32 %y, i32 %z) #2 {
    136   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 4, i32 %x, i32 %y, i32 %z) #10
    137   %2 = bitcast i8* %1 to <4 x i8>*
    138   store <4 x i8> %val, <4 x i8>* %2, align 4, !tbaa !28
    139   ret void
    140 }
    141 
    142 define <4 x i8> @rsGetElementAtImpl_uchar4([1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #3 {
    143   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 4, i32 %x, i32 %y, i32 %z) #10
    144   %2 = bitcast i8* %1 to <4 x i8>*
    145   %3 = load <4 x i8>* %2, align 4, !tbaa !28
    146   ret <4 x i8> %3
    147 }
    148 
    149 !29 = metadata !{metadata !"short", metadata !15}
    150 define void @rsSetElementAtImpl_short([1 x i32] %a.coerce, i16 signext %val, i32 %x, i32 %y, i32 %z) #2 {
    151   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 2, i32 %x, i32 %y, i32 %z) #10
    152   %2 = bitcast i8* %1 to i16*
    153   store i16 %val, i16* %2, align 2, !tbaa !29
    154   ret void
    155 }
    156 
    157 define signext i16 @rsGetElementAtImpl_short([1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #3 {
    158   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 2, i32 %x, i32 %y, i32 %z) #10
    159   %2 = bitcast i8* %1 to i16*
    160   %3 = load i16* %2, align 2, !tbaa !29
    161   ret i16 %3
    162 }
    163 
    164 !30 = metadata !{metadata !"short2", metadata !15}
    165 define void @rsSetElementAtImpl_short2([1 x i32] %a.coerce, <2 x i16> %val, i32 %x, i32 %y, i32 %z) #2 {
    166   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 4, i32 %x, i32 %y, i32 %z) #10
    167   %2 = bitcast i8* %1 to <2 x i16>*
    168   store <2 x i16> %val, <2 x i16>* %2, align 4, !tbaa !30
    169   ret void
    170 }
    171 
    172 define <2 x i16> @rsGetElementAtImpl_short2([1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #3 {
    173   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 4, i32 %x, i32 %y, i32 %z) #10
    174   %2 = bitcast i8* %1 to <2 x i16>*
    175   %3 = load <2 x i16>* %2, align 4, !tbaa !30
    176   ret <2 x i16> %3
    177 }
    178 
    179 !31 = metadata !{metadata !"short3", metadata !15}
    180 define void @rsSetElementAtImpl_short3([1 x i32] %a.coerce, <3 x i16> %val, i32 %x, i32 %y, i32 %z) #2 {
    181   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 8, i32 %x, i32 %y, i32 %z) #10
    182   %2 = shufflevector <3 x i16> %val, <3 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
    183   %3 = bitcast i8* %1 to <4 x i16>*
    184   store <4 x i16> %2, <4 x i16>* %3, align 8, !tbaa !31
    185   ret void
    186 }
    187 
    188 define <3 x i16> @rsGetElementAtImpl_short3([1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #3 {
    189   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 8, i32 %x, i32 %y, i32 %z) #10
    190   %2 = bitcast i8* %1 to <4 x i16>*
    191   %3 = load <4 x i16>* %2, align 8, !tbaa !31
    192   %4 = shufflevector <4 x i16> %3, <4 x i16> undef, <3 x i32> <i32 0, i32 1, i32 2>
    193   ret <3 x i16> %4
    194 }
    195 
    196 !32 = metadata !{metadata !"short4", metadata !15}
    197 define void @rsSetElementAtImpl_short4([1 x i32] %a.coerce, <4 x i16> %val, i32 %x, i32 %y, i32 %z) #2 {
    198   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 8, i32 %x, i32 %y, i32 %z) #10
    199   %2 = bitcast i8* %1 to <4 x i16>*
    200   store <4 x i16> %val, <4 x i16>* %2, align 8, !tbaa !32
    201   ret void
    202 }
    203 
    204 define <4 x i16> @rsGetElementAtImpl_short4([1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #3 {
    205   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 8, i32 %x, i32 %y, i32 %z) #10
    206   %2 = bitcast i8* %1 to <4 x i16>*
    207   %3 = load <4 x i16>* %2, align 8, !tbaa !32
    208   ret <4 x i16> %3
    209 }
    210 
    211 !33 = metadata !{metadata !"ushort", metadata !15}
    212 define void @rsSetElementAtImpl_ushort([1 x i32] %a.coerce, i16 zeroext %val, i32 %x, i32 %y, i32 %z) #2 {
    213   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 2, i32 %x, i32 %y, i32 %z) #10
    214   %2 = bitcast i8* %1 to i16*
    215   store i16 %val, i16* %2, align 2, !tbaa !33
    216   ret void
    217 }
    218 
    219 define zeroext i16 @rsGetElementAtImpl_ushort([1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #3 {
    220   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 2, i32 %x, i32 %y, i32 %z) #10
    221   %2 = bitcast i8* %1 to i16*
    222   %3 = load i16* %2, align 2, !tbaa !33
    223   ret i16 %3
    224 }
    225 
    226 !34 = metadata !{metadata !"ushort2", metadata !15}
    227 define void @rsSetElementAtImpl_ushort2([1 x i32] %a.coerce, <2 x i16> %val, i32 %x, i32 %y, i32 %z) #2 {
    228   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 4, i32 %x, i32 %y, i32 %z) #10
    229   %2 = bitcast i8* %1 to <2 x i16>*
    230   store <2 x i16> %val, <2 x i16>* %2, align 4, !tbaa !34
    231   ret void
    232 }
    233 
    234 define <2 x i16> @rsGetElementAtImpl_ushort2([1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #3 {
    235   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 4, i32 %x, i32 %y, i32 %z) #10
    236   %2 = bitcast i8* %1 to <2 x i16>*
    237   %3 = load <2 x i16>* %2, align 4, !tbaa !34
    238   ret <2 x i16> %3
    239 }
    240 
    241 !35 = metadata !{metadata !"ushort3", metadata !15}
    242 define void @rsSetElementAtImpl_ushort3([1 x i32] %a.coerce, <3 x i16> %val, i32 %x, i32 %y, i32 %z) #2 {
    243   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 8, i32 %x, i32 %y, i32 %z) #10
    244   %2 = shufflevector <3 x i16> %val, <3 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
    245   %3 = bitcast i8* %1 to <4 x i16>*
    246   store <4 x i16> %2, <4 x i16>* %3, align 8, !tbaa !35
    247   ret void
    248 }
    249 
    250 define <3 x i16> @rsGetElementAtImpl_ushort3([1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #3 {
    251   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 8, i32 %x, i32 %y, i32 %z) #10
    252   %2 = bitcast i8* %1 to <4 x i16>*
    253   %3 = load <4 x i16>* %2, align 8, !tbaa !35
    254   %4 = shufflevector <4 x i16> %3, <4 x i16> undef, <3 x i32> <i32 0, i32 1, i32 2>
    255   ret <3 x i16> %4
    256 }
    257 
    258 !36 = metadata !{metadata !"ushort4", metadata !15}
    259 define void @rsSetElementAtImpl_ushort4([1 x i32] %a.coerce, <4 x i16> %val, i32 %x, i32 %y, i32 %z) #2 {
    260   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 8, i32 %x, i32 %y, i32 %z) #10
    261   %2 = bitcast i8* %1 to <4 x i16>*
    262   store <4 x i16> %val, <4 x i16>* %2, align 8, !tbaa !36
    263   ret void
    264 }
    265 
    266 define <4 x i16> @rsGetElementAtImpl_ushort4([1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #3 {
    267   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 8, i32 %x, i32 %y, i32 %z) #10
    268   %2 = bitcast i8* %1 to <4 x i16>*
    269   %3 = load <4 x i16>* %2, align 8, !tbaa !36
    270   ret <4 x i16> %3
    271 }
    272 
    273 !37 = metadata !{metadata !"int", metadata !15}
    274 define void @rsSetElementAtImpl_int([1 x i32] %a.coerce, i32 %val, i32 %x, i32 %y, i32 %z) #2 {
    275   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 4, i32 %x, i32 %y, i32 %z) #10
    276   %2 = bitcast i8* %1 to i32*
    277   store i32 %val, i32* %2, align 4, !tbaa !37
    278   ret void
    279 }
    280 
    281 define i32 @rsGetElementAtImpl_int([1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #3 {
    282   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 4, i32 %x, i32 %y, i32 %z) #10
    283   %2 = bitcast i8* %1 to i32*
    284   %3 = load i32* %2, align 4, !tbaa !37
    285   ret i32 %3
    286 }
    287 
    288 !38 = metadata !{metadata !"int2", metadata !15}
    289 define void @rsSetElementAtImpl_int2([1 x i32] %a.coerce, <2 x i32> %val, i32 %x, i32 %y, i32 %z) #2 {
    290   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 8, i32 %x, i32 %y, i32 %z) #10
    291   %2 = bitcast i8* %1 to <2 x i32>*
    292   store <2 x i32> %val, <2 x i32>* %2, align 8, !tbaa !38
    293   ret void
    294 }
    295 
    296 define <2 x i32> @rsGetElementAtImpl_int2([1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #3 {
    297   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 8, i32 %x, i32 %y, i32 %z) #10
    298   %2 = bitcast i8* %1 to <2 x i32>*
    299   %3 = load <2 x i32>* %2, align 8, !tbaa !38
    300   ret <2 x i32> %3
    301 }
    302 
    303 !39 = metadata !{metadata !"int3", metadata !15}
    304 define void @rsSetElementAtImpl_int3([1 x i32] %a.coerce, <3 x i32> %val, i32 %x, i32 %y, i32 %z) #2 {
    305   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 16, i32 %x, i32 %y, i32 %z) #10
    306   %2 = shufflevector <3 x i32> %val, <3 x i32> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
    307   %3 = bitcast i8* %1 to <4 x i32>*
    308   store <4 x i32> %2, <4 x i32>* %3, align 16, !tbaa !39
    309   ret void
    310 }
    311 
    312 define <3 x i32> @rsGetElementAtImpl_int3([1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #3 {
    313   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 16, i32 %x, i32 %y, i32 %z) #10
    314   %2 = bitcast i8* %1 to <4 x i32>*
    315   %3 = load <4 x i32>* %2, align 8, !tbaa !39
    316   %4 = shufflevector <4 x i32> %3, <4 x i32> undef, <3 x i32> <i32 0, i32 1, i32 2>
    317   ret <3 x i32> %4
    318 }
    319 
    320 !40 = metadata !{metadata !"int4", metadata !15}
    321 define void @rsSetElementAtImpl_int4([1 x i32] %a.coerce, <4 x i32> %val, i32 %x, i32 %y, i32 %z) #2 {
    322   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 16, i32 %x, i32 %y, i32 %z) #10
    323   %2 = bitcast i8* %1 to <4 x i32>*
    324   store <4 x i32> %val, <4 x i32>* %2, align 16, !tbaa !40
    325   ret void
    326 }
    327 
    328 define <4 x i32> @rsGetElementAtImpl_int4([1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #3 {
    329   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 16, i32 %x, i32 %y, i32 %z) #10
    330   %2 = bitcast i8* %1 to <4 x i32>*
    331   %3 = load <4 x i32>* %2, align 16, !tbaa !40
    332   ret <4 x i32> %3
    333 }
    334 
    335 !41 = metadata !{metadata !"uint", metadata !15}
    336 define void @rsSetElementAtImpl_uint([1 x i32] %a.coerce, i32 %val, i32 %x, i32 %y, i32 %z) #2 {
    337   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 4, i32 %x, i32 %y, i32 %z) #10
    338   %2 = bitcast i8* %1 to i32*
    339   store i32 %val, i32* %2, align 4, !tbaa !41
    340   ret void
    341 }
    342 
    343 define i32 @rsGetElementAtImpl_uint([1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #3 {
    344   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 4, i32 %x, i32 %y, i32 %z) #10
    345   %2 = bitcast i8* %1 to i32*
    346   %3 = load i32* %2, align 4, !tbaa !41
    347   ret i32 %3
    348 }
    349 
    350 !42 = metadata !{metadata !"uint2", metadata !15}
    351 define void @rsSetElementAtImpl_uint2([1 x i32] %a.coerce, <2 x i32> %val, i32 %x, i32 %y, i32 %z) #2 {
    352   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 8, i32 %x, i32 %y, i32 %z) #10
    353   %2 = bitcast i8* %1 to <2 x i32>*
    354   store <2 x i32> %val, <2 x i32>* %2, align 8, !tbaa !42
    355   ret void
    356 }
    357 
    358 define <2 x i32> @rsGetElementAtImpl_uint2([1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #3 {
    359   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 8, i32 %x, i32 %y, i32 %z) #10
    360   %2 = bitcast i8* %1 to <2 x i32>*
    361   %3 = load <2 x i32>* %2, align 8, !tbaa !42
    362   ret <2 x i32> %3
    363 }
    364 
    365 !43 = metadata !{metadata !"uint3", metadata !15}
    366 define void @rsSetElementAtImpl_uint3([1 x i32] %a.coerce, <3 x i32> %val, i32 %x, i32 %y, i32 %z) #2 {
    367   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 16, i32 %x, i32 %y, i32 %z) #10
    368   %2 = shufflevector <3 x i32> %val, <3 x i32> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
    369   %3 = bitcast i8* %1 to <4 x i32>*
    370   store <4 x i32> %2, <4 x i32>* %3, align 16, !tbaa !43
    371   ret void
    372 }
    373 
    374 define <3 x i32> @rsGetElementAtImpl_uint3([1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #3 {
    375   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 16, i32 %x, i32 %y, i32 %z) #10
    376   %2 = bitcast i8* %1 to <4 x i32>*
    377   %3 = load <4 x i32>* %2, align 8, !tbaa !43
    378   %4 = shufflevector <4 x i32> %3, <4 x i32> undef, <3 x i32> <i32 0, i32 1, i32 2>
    379   ret <3 x i32> %4
    380 }
    381 
    382 !44 = metadata !{metadata !"uint4", metadata !15}
    383 define void @rsSetElementAtImpl_uint4([1 x i32] %a.coerce, <4 x i32> %val, i32 %x, i32 %y, i32 %z) #2 {
    384   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 16, i32 %x, i32 %y, i32 %z) #10
    385   %2 = bitcast i8* %1 to <4 x i32>*
    386   store <4 x i32> %val, <4 x i32>* %2, align 16, !tbaa !44
    387   ret void
    388 }
    389 
    390 define <4 x i32> @rsGetElementAtImpl_uint4([1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #3 {
    391   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 16, i32 %x, i32 %y, i32 %z) #10
    392   %2 = bitcast i8* %1 to <4 x i32>*
    393   %3 = load <4 x i32>* %2, align 16, !tbaa !44
    394   ret <4 x i32> %3
    395 }
    396 
    397 !45 = metadata !{metadata !"long", metadata !15}
    398 define void @rsSetElementAtImpl_long([1 x i32] %a.coerce, i64 %val, i32 %x, i32 %y, i32 %z) #2 {
    399   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 8, i32 %x, i32 %y, i32 %z) #10
    400   %2 = bitcast i8* %1 to i64*
    401   store i64 %val, i64* %2, align 8, !tbaa !45
    402   ret void
    403 }
    404 
    405 define i64 @rsGetElementAtImpl_long([1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #3 {
    406   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 8, i32 %x, i32 %y, i32 %z) #10
    407   %2 = bitcast i8* %1 to i64*
    408   %3 = load i64* %2, align 8, !tbaa !45
    409   ret i64 %3
    410 }
    411 
    412 !46 = metadata !{metadata !"long2", metadata !15}
    413 define void @rsSetElementAtImpl_long2([1 x i32] %a.coerce, <2 x i64> %val, i32 %x, i32 %y, i32 %z) #2 {
    414   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 16, i32 %x, i32 %y, i32 %z) #10
    415   %2 = bitcast i8* %1 to <2 x i64>*
    416   store <2 x i64> %val, <2 x i64>* %2, align 16, !tbaa !46
    417   ret void
    418 }
    419 
    420 define <2 x i64> @rsGetElementAtImpl_long2([1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #3 {
    421   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 16, i32 %x, i32 %y, i32 %z) #10
    422   %2 = bitcast i8* %1 to <2 x i64>*
    423   %3 = load <2 x i64>* %2, align 16, !tbaa !46
    424   ret <2 x i64> %3
    425 }
    426 
    427 !47 = metadata !{metadata !"long3", metadata !15}
    428 define void @rsSetElementAtImpl_long3([1 x i32] %a.coerce, <3 x i64> %val, i32 %x, i32 %y, i32 %z) #2 {
    429   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 32, i32 %x, i32 %y, i32 %z) #10
    430   %2 = shufflevector <3 x i64> %val, <3 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
    431   %3 = bitcast i8* %1 to <4 x i64>*
    432   store <4 x i64> %2, <4 x i64>* %3, align 32, !tbaa !47
    433   ret void
    434 }
    435 
    436 define void @rsGetElementAtImpl_long3(<3 x i64>* noalias nocapture sret %agg.result, [1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #2 {
    437   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 32, i32 %x, i32 %y, i32 %z) #10
    438   %2 = bitcast i8* %1 to <4 x i64>*
    439   %3 = load <4 x i64>* %2, align 32
    440   %4 = bitcast <3 x i64>* %agg.result to <4 x i64>*
    441   store <4 x i64> %3, <4 x i64>* %4, align 32, !tbaa !47
    442   ret void
    443 }
    444 
    445 !48 = metadata !{metadata !"long4", metadata !15}
    446 define void @rsSetElementAtImpl_long4([1 x i32] %a.coerce, <4 x i64> %val, i32 %x, i32 %y, i32 %z) #2 {
    447   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 32, i32 %x, i32 %y, i32 %z) #10
    448   %2 = bitcast i8* %1 to <4 x i64>*
    449   store <4 x i64> %val, <4 x i64>* %2, align 32, !tbaa !48
    450   ret void
    451 }
    452 
    453 define void @rsGetElementAtImpl_long4(<4 x i64>* noalias nocapture sret %agg.result, [1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #2 {
    454   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 32, i32 %x, i32 %y, i32 %z) #10
    455   %2 = bitcast i8* %1 to <4 x i64>*
    456   %3 = load <4 x i64>* %2, align 32, !tbaa !15
    457   store <4 x i64> %3, <4 x i64>* %agg.result, align 32, !tbaa !48
    458   ret void
    459 }
    460 
    461 !49 = metadata !{metadata !"ulong", metadata !15}
    462 define void @rsSetElementAtImpl_ulong([1 x i32] %a.coerce, i64 %val, i32 %x, i32 %y, i32 %z) #2 {
    463   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 8, i32 %x, i32 %y, i32 %z) #10
    464   %2 = bitcast i8* %1 to i64*
    465   store i64 %val, i64* %2, align 8, !tbaa !49
    466   ret void
    467 }
    468 
    469 define i64 @rsGetElementAtImpl_ulong([1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #3 {
    470   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 8, i32 %x, i32 %y, i32 %z) #10
    471   %2 = bitcast i8* %1 to i64*
    472   %3 = load i64* %2, align 8, !tbaa !49
    473   ret i64 %3
    474 }
    475 
    476 !50 = metadata !{metadata !"ulong2", metadata !15}
    477 define void @rsSetElementAtImpl_ulong2([1 x i32] %a.coerce, <2 x i64> %val, i32 %x, i32 %y, i32 %z) #2 {
    478   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 16, i32 %x, i32 %y, i32 %z) #10
    479   %2 = bitcast i8* %1 to <2 x i64>*
    480   store <2 x i64> %val, <2 x i64>* %2, align 16, !tbaa !50
    481   ret void
    482 }
    483 
    484 define <2 x i64> @rsGetElementAtImpl_ulong2([1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #3 {
    485   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 16, i32 %x, i32 %y, i32 %z) #10
    486   %2 = bitcast i8* %1 to <2 x i64>*
    487   %3 = load <2 x i64>* %2, align 16, !tbaa !50
    488   ret <2 x i64> %3
    489 }
    490 
    491 !51 = metadata !{metadata !"ulong3", metadata !15}
    492 define void @rsSetElementAtImpl_ulong3([1 x i32] %a.coerce, <3 x i64> %val, i32 %x, i32 %y, i32 %z) #2 {
    493   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 32, i32 %x, i32 %y, i32 %z) #10
    494   %2 = shufflevector <3 x i64> %val, <3 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
    495   %3 = bitcast i8* %1 to <4 x i64>*
    496   store <4 x i64> %2, <4 x i64>* %3, align 32, !tbaa !51
    497   ret void
    498 }
    499 
    500 define void @rsGetElementAtImpl_ulong3(<3 x i64>* noalias nocapture sret %agg.result, [1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #2 {
    501   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 32, i32 %x, i32 %y, i32 %z) #10
    502   %2 = bitcast i8* %1 to <4 x i64>*
    503   %3 = load <4 x i64>* %2, align 32
    504   %4 = bitcast <3 x i64>* %agg.result to <4 x i64>*
    505   store <4 x i64> %3, <4 x i64>* %4, align 32, !tbaa !51
    506   ret void
    507 }
    508 
    509 !52 = metadata !{metadata !"ulong4", metadata !15}
    510 define void @rsSetElementAtImpl_ulong4([1 x i32] %a.coerce, <4 x i64> %val, i32 %x, i32 %y, i32 %z) #2 {
    511   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 32, i32 %x, i32 %y, i32 %z) #10
    512   %2 = bitcast i8* %1 to <4 x i64>*
    513   store <4 x i64> %val, <4 x i64>* %2, align 32, !tbaa !52
    514   ret void
    515 }
    516 
    517 define void @rsGetElementAtImpl_ulong4(<4 x i64>* noalias nocapture sret %agg.result, [1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #2 {
    518   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 32, i32 %x, i32 %y, i32 %z) #10
    519   %2 = bitcast i8* %1 to <4 x i64>*
    520   %3 = load <4 x i64>* %2, align 32, !tbaa !15
    521   store <4 x i64> %3, <4 x i64>* %agg.result, align 32, !tbaa !52
    522   ret void
    523 }
    524 
    525 !53 = metadata !{metadata !"float", metadata !15}
    526 define void @rsSetElementAtImpl_float([1 x i32] %a.coerce, float %val, i32 %x, i32 %y, i32 %z) #2 {
    527   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 4, i32 %x, i32 %y, i32 %z) #10
    528   %2 = bitcast i8* %1 to float*
    529   store float %val, float* %2, align 4, !tbaa !53
    530   ret void
    531 }
    532 
    533 define float @rsGetElementAtImpl_float([1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #3 {
    534   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 4, i32 %x, i32 %y, i32 %z) #10
    535   %2 = bitcast i8* %1 to float*
    536   %3 = load float* %2, align 4, !tbaa !53
    537   ret float %3
    538 }
    539 
    540 !54 = metadata !{metadata !"float2", metadata !15}
    541 define void @rsSetElementAtImpl_float2([1 x i32] %a.coerce, <2 x float> %val, i32 %x, i32 %y, i32 %z) #2 {
    542   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 8, i32 %x, i32 %y, i32 %z) #10
    543   %2 = bitcast i8* %1 to <2 x float>*
    544   store <2 x float> %val, <2 x float>* %2, align 8, !tbaa !54
    545   ret void
    546 }
    547 
    548 define <2 x float> @rsGetElementAtImpl_float2([1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #3 {
    549   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 8, i32 %x, i32 %y, i32 %z) #10
    550   %2 = bitcast i8* %1 to <2 x float>*
    551   %3 = load <2 x float>* %2, align 8, !tbaa !54
    552   ret <2 x float> %3
    553 }
    554 
    555 !55 = metadata !{metadata !"float3", metadata !15}
    556 define void @rsSetElementAtImpl_float3([1 x i32] %a.coerce, <3 x float> %val, i32 %x, i32 %y, i32 %z) #2 {
    557   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 16, i32 %x, i32 %y, i32 %z) #10
    558   %2 = shufflevector <3 x float> %val, <3 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
    559   %3 = bitcast i8* %1 to <4 x float>*
    560   store <4 x float> %2, <4 x float>* %3, align 16, !tbaa !55
    561   ret void
    562 }
    563 
    564 define <3 x float> @rsGetElementAtImpl_float3([1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #3 {
    565   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 16, i32 %x, i32 %y, i32 %z) #10
    566   %2 = bitcast i8* %1 to <4 x float>*
    567   %3 = load <4 x float>* %2, align 8, !tbaa !55
    568   %4 = shufflevector <4 x float> %3, <4 x float> undef, <3 x i32> <i32 0, i32 1, i32 2>
    569   ret <3 x float> %4
    570 }
    571 
    572 !56 = metadata !{metadata !"float4", metadata !15}
    573 define void @rsSetElementAtImpl_float4([1 x i32] %a.coerce, <4 x float> %val, i32 %x, i32 %y, i32 %z) #2 {
    574   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 16, i32 %x, i32 %y, i32 %z) #10
    575   %2 = bitcast i8* %1 to <4 x float>*
    576   store <4 x float> %val, <4 x float>* %2, align 16, !tbaa !56
    577   ret void
    578 }
    579 
    580 define <4 x float> @rsGetElementAtImpl_float4([1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #3 {
    581   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 16, i32 %x, i32 %y, i32 %z) #10
    582   %2 = bitcast i8* %1 to <4 x float>*
    583   %3 = load <4 x float>* %2, align 16, !tbaa !56
    584   ret <4 x float> %3
    585 }
    586 
    587 !57 = metadata !{metadata !"double", metadata !15}
    588 define void @rsSetElementAtImpl_double([1 x i32] %a.coerce, double %val, i32 %x, i32 %y, i32 %z) #2 {
    589   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 8, i32 %x, i32 %y, i32 %z) #10
    590   %2 = bitcast i8* %1 to double*
    591   store double %val, double* %2, align 8, !tbaa !57
    592   ret void
    593 }
    594 
    595 define double @rsGetElementAtImpl_double([1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #3 {
    596   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 8, i32 %x, i32 %y, i32 %z) #10
    597   %2 = bitcast i8* %1 to double*
    598   %3 = load double* %2, align 8, !tbaa !57
    599   ret double %3
    600 }
    601 
    602 !58 = metadata !{metadata !"double2", metadata !15}
    603 define void @rsSetElementAtImpl_double2([1 x i32] %a.coerce, <2 x double> %val, i32 %x, i32 %y, i32 %z) #2 {
    604   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 16, i32 %x, i32 %y, i32 %z) #10
    605   %2 = bitcast i8* %1 to <2 x double>*
    606   store <2 x double> %val, <2 x double>* %2, align 16, !tbaa !58
    607   ret void
    608 }
    609 
    610 define <2 x double> @rsGetElementAtImpl_double2([1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #3 {
    611   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 16, i32 %x, i32 %y, i32 %z) #10
    612   %2 = bitcast i8* %1 to <2 x double>*
    613   %3 = load <2 x double>* %2, align 16, !tbaa !58
    614   ret <2 x double> %3
    615 }
    616 
    617 !59 = metadata !{metadata !"double3", metadata !15}
    618 define void @rsSetElementAtImpl_double3([1 x i32] %a.coerce, <3 x double> %val, i32 %x, i32 %y, i32 %z) #2 {
    619   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 32, i32 %x, i32 %y, i32 %z) #10
    620   %2 = shufflevector <3 x double> %val, <3 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
    621   %3 = bitcast i8* %1 to <4 x double>*
    622   store <4 x double> %2, <4 x double>* %3, align 32, !tbaa !59
    623   ret void
    624 }
    625 
    626 
    627 define void @rsGetElementAtImpl_double3(<3 x double>* noalias nocapture sret %agg.result, [1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #2 {
    628   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 32, i32 %x, i32 %y, i32 %z) #10
    629   %2 = bitcast i8* %1 to <4 x double>*
    630   %3 = load <4 x double>* %2, align 32
    631   %4 = bitcast <3 x double>* %agg.result to <4 x double>*
    632   store <4 x double> %3, <4 x double>* %4, align 32, !tbaa !59
    633   ret void
    634 }
    635 
    636 !60 = metadata !{metadata !"double4", metadata !15}
    637 define void @rsSetElementAtImpl_double4([1 x i32] %a.coerce, <4 x double> %val, i32 %x, i32 %y, i32 %z) #2 {
    638   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 32, i32 %x, i32 %y, i32 %z) #10
    639   %2 = bitcast i8* %1 to <4 x double>*
    640   store <4 x double> %val, <4 x double>* %2, align 32, !tbaa !60
    641   ret void
    642 }
    643 define void @rsGetElementAtImpl_double4(<4 x double>* noalias nocapture sret %agg.result, [1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #2 {
    644   %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 32, i32 %x, i32 %y, i32 %z) #10
    645   %2 = bitcast i8* %1 to <4 x double>*
    646   %3 = load <4 x double>* %2, align 32, !tbaa !15
    647   store <4 x double> %3, <4 x double>* %agg.result, align 32, !tbaa !60
    648   ret void
    649 }
    650 
    651 attributes #0 = { nounwind readonly "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
    652 attributes #1 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
    653 attributes #2 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
    654 attributes #3 = { nounwind readonly "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
    655 attributes #4 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
    656 attributes #5 = { nounwind readnone "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
    657 attributes #6 = { nounwind readnone }
    658 attributes #7 = { nounwind }
    659 attributes #8 = { alwaysinline nounwind readnone }
    660 attributes #9 = { nounwind readonly }
    661 attributes #10 = { nobuiltin }
    662 attributes #11 = { nobuiltin nounwind }
    663 attributes #12 = { nobuiltin nounwind readnone }
    664 
    665