1 /* 2 * Copyright (C) 2012 The Android Open Source Project 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 18 /*! \file BytecodeVisitor.cpp 19 \brief This file implements visitors of the bytecode 20 */ 21 #include "libdex/DexOpcodes.h" 22 #include "libdex/DexFile.h" 23 #include "Lower.h" 24 #include "AnalysisO1.h" 25 26 //! Returns size of the current bytecode in u2 unit 27 28 //! 29 int getByteCodeSize() { //uses inst, unit in u2 30 switch (INST_INST(inst)) { 31 case OP_NOP: 32 return 1; 33 case OP_MOVE: 34 case OP_MOVE_OBJECT: 35 return 1; 36 case OP_MOVE_FROM16: 37 case OP_MOVE_OBJECT_FROM16: 38 return 2; 39 case OP_MOVE_16: 40 case OP_MOVE_OBJECT_16: 41 return 3; 42 case OP_MOVE_WIDE: 43 return 1; 44 case OP_MOVE_WIDE_FROM16: 45 return 2; 46 case OP_MOVE_WIDE_16: 47 return 3; 48 case OP_MOVE_RESULT: 49 case OP_MOVE_RESULT_OBJECT: 50 return 1; 51 case OP_MOVE_RESULT_WIDE: 52 return 1; 53 case OP_MOVE_EXCEPTION: 54 return 1; 55 case OP_RETURN_VOID: 56 case OP_RETURN_VOID_BARRIER: 57 return 1; 58 case OP_RETURN: 59 case OP_RETURN_OBJECT: 60 return 1; 61 case OP_RETURN_WIDE: 62 return 1; 63 case OP_CONST_4: 64 return 1; 65 case OP_CONST_16: 66 return 2; 67 case OP_CONST: 68 return 3; 69 case OP_CONST_HIGH16: 70 return 2; 71 case OP_CONST_WIDE_16: 72 return 2; 73 case OP_CONST_WIDE_32: 74 return 3; 75 case OP_CONST_WIDE: 76 return 5; 77 case OP_CONST_WIDE_HIGH16: 78 return 2; 79 case OP_CONST_STRING: 80 return 2; 81 case OP_CONST_STRING_JUMBO: 82 return 3; 83 case OP_CONST_CLASS: 84 return 2; 85 case OP_MONITOR_ENTER: 86 return 1; 87 case OP_MONITOR_EXIT: 88 return 1; 89 case OP_CHECK_CAST: 90 return 2; 91 case OP_INSTANCE_OF: 92 return 2; 93 case OP_ARRAY_LENGTH: 94 return 1; 95 case OP_NEW_INSTANCE: 96 return 2; 97 case OP_NEW_ARRAY: 98 return 2; 99 case OP_FILLED_NEW_ARRAY: 100 return 3; 101 case OP_FILLED_NEW_ARRAY_RANGE: 102 return 3; 103 case OP_FILL_ARRAY_DATA: 104 return 3; 105 case OP_THROW: 106 return 1; 107 case OP_THROW_VERIFICATION_ERROR: 108 return 2; 109 case OP_GOTO: 110 return 1; 111 case OP_GOTO_16: 112 return 2; 113 case OP_GOTO_32: 114 return 3; 115 case OP_PACKED_SWITCH: 116 return 3; 117 case OP_SPARSE_SWITCH: 118 return 3; 119 case OP_CMPL_FLOAT: 120 return 2; 121 case OP_CMPG_FLOAT: 122 return 2; 123 case OP_CMPL_DOUBLE: 124 return 2; 125 case OP_CMPG_DOUBLE: 126 return 2; 127 case OP_CMP_LONG: 128 return 2; 129 case OP_IF_EQ: 130 return 2; 131 case OP_IF_NE: 132 return 2; 133 case OP_IF_LT: 134 return 2; 135 case OP_IF_GE: 136 return 2; 137 case OP_IF_GT: 138 return 2; 139 case OP_IF_LE: 140 return 2; 141 case OP_IF_EQZ: 142 return 2; 143 case OP_IF_NEZ: 144 return 2; 145 case OP_IF_LTZ: 146 return 2; 147 case OP_IF_GEZ: 148 return 2; 149 case OP_IF_GTZ: 150 return 2; 151 case OP_IF_LEZ: 152 return 2; 153 case OP_AGET: 154 return 2; 155 case OP_AGET_WIDE: 156 return 2; 157 case OP_AGET_OBJECT: 158 return 2; 159 case OP_AGET_BOOLEAN: 160 return 2; 161 case OP_AGET_BYTE: 162 return 2; 163 case OP_AGET_CHAR: 164 return 2; 165 case OP_AGET_SHORT: 166 return 2; 167 case OP_APUT: 168 return 2; 169 case OP_APUT_WIDE: 170 return 2; 171 case OP_APUT_OBJECT: 172 return 2; 173 case OP_APUT_BOOLEAN: 174 return 2; 175 case OP_APUT_BYTE: 176 return 2; 177 case OP_APUT_CHAR: 178 return 2; 179 case OP_APUT_SHORT: 180 return 2; 181 case OP_IGET: 182 case OP_IGET_WIDE: 183 case OP_IGET_OBJECT: 184 case OP_IGET_VOLATILE: 185 case OP_IGET_WIDE_VOLATILE: 186 case OP_IGET_OBJECT_VOLATILE: 187 case OP_IGET_BOOLEAN: 188 case OP_IGET_BYTE: 189 case OP_IGET_CHAR: 190 case OP_IGET_SHORT: 191 case OP_IPUT: 192 case OP_IPUT_WIDE: 193 case OP_IPUT_OBJECT: 194 case OP_IPUT_VOLATILE: 195 case OP_IPUT_WIDE_VOLATILE: 196 case OP_IPUT_OBJECT_VOLATILE: 197 case OP_IPUT_BOOLEAN: 198 case OP_IPUT_BYTE: 199 case OP_IPUT_CHAR: 200 case OP_IPUT_SHORT: 201 return 2; 202 case OP_SGET: 203 case OP_SGET_WIDE: 204 case OP_SGET_OBJECT: 205 case OP_SGET_VOLATILE: 206 case OP_SGET_WIDE_VOLATILE: 207 case OP_SGET_OBJECT_VOLATILE: 208 case OP_SGET_BOOLEAN: 209 case OP_SGET_BYTE: 210 case OP_SGET_CHAR: 211 case OP_SGET_SHORT: 212 case OP_SPUT: 213 case OP_SPUT_WIDE: 214 case OP_SPUT_OBJECT: 215 case OP_SPUT_VOLATILE: 216 case OP_SPUT_WIDE_VOLATILE: 217 case OP_SPUT_OBJECT_VOLATILE: 218 case OP_SPUT_BOOLEAN: 219 case OP_SPUT_BYTE: 220 case OP_SPUT_CHAR: 221 case OP_SPUT_SHORT: 222 return 2; 223 case OP_INVOKE_VIRTUAL: 224 case OP_INVOKE_SUPER: 225 case OP_INVOKE_DIRECT: 226 case OP_INVOKE_STATIC: 227 case OP_INVOKE_INTERFACE: 228 case OP_INVOKE_VIRTUAL_RANGE: 229 case OP_INVOKE_SUPER_RANGE: 230 case OP_INVOKE_DIRECT_RANGE: 231 case OP_INVOKE_STATIC_RANGE: 232 case OP_INVOKE_INTERFACE_RANGE: 233 return 3; 234 235 case OP_NEG_INT: 236 case OP_NOT_INT: 237 case OP_NEG_LONG: 238 case OP_NOT_LONG: 239 case OP_NEG_FLOAT: 240 case OP_NEG_DOUBLE: 241 case OP_INT_TO_LONG: 242 case OP_INT_TO_FLOAT: 243 case OP_INT_TO_DOUBLE: 244 case OP_LONG_TO_INT: 245 case OP_LONG_TO_FLOAT: 246 case OP_LONG_TO_DOUBLE: 247 case OP_FLOAT_TO_INT: 248 case OP_FLOAT_TO_LONG: 249 case OP_FLOAT_TO_DOUBLE: 250 case OP_DOUBLE_TO_INT: 251 case OP_DOUBLE_TO_LONG: 252 case OP_DOUBLE_TO_FLOAT: 253 case OP_INT_TO_BYTE: 254 case OP_INT_TO_CHAR: 255 case OP_INT_TO_SHORT: 256 return 1; 257 258 case OP_ADD_INT: 259 case OP_SUB_INT: 260 case OP_MUL_INT: 261 case OP_DIV_INT: 262 case OP_REM_INT: 263 case OP_AND_INT: 264 case OP_OR_INT: 265 case OP_XOR_INT: 266 case OP_SHL_INT: 267 case OP_SHR_INT: 268 case OP_USHR_INT: 269 case OP_ADD_LONG: 270 case OP_SUB_LONG: 271 case OP_MUL_LONG: 272 case OP_DIV_LONG: 273 case OP_REM_LONG: 274 case OP_AND_LONG: 275 case OP_OR_LONG: 276 case OP_XOR_LONG: 277 case OP_SHL_LONG: 278 case OP_SHR_LONG: 279 case OP_USHR_LONG: 280 case OP_ADD_FLOAT: 281 case OP_SUB_FLOAT: 282 case OP_MUL_FLOAT: 283 case OP_DIV_FLOAT: 284 case OP_REM_FLOAT: 285 case OP_ADD_DOUBLE: 286 case OP_SUB_DOUBLE: 287 case OP_MUL_DOUBLE: 288 case OP_DIV_DOUBLE: 289 case OP_REM_DOUBLE: 290 return 2; 291 292 case OP_ADD_INT_2ADDR: 293 case OP_SUB_INT_2ADDR: 294 case OP_MUL_INT_2ADDR: 295 case OP_DIV_INT_2ADDR: 296 case OP_REM_INT_2ADDR: 297 case OP_AND_INT_2ADDR: 298 case OP_OR_INT_2ADDR: 299 case OP_XOR_INT_2ADDR: 300 case OP_SHL_INT_2ADDR: 301 case OP_SHR_INT_2ADDR: 302 case OP_USHR_INT_2ADDR: 303 case OP_ADD_LONG_2ADDR: 304 case OP_SUB_LONG_2ADDR: 305 case OP_MUL_LONG_2ADDR: 306 case OP_DIV_LONG_2ADDR: 307 case OP_REM_LONG_2ADDR: 308 case OP_AND_LONG_2ADDR: 309 case OP_OR_LONG_2ADDR: 310 case OP_XOR_LONG_2ADDR: 311 case OP_SHL_LONG_2ADDR: 312 case OP_SHR_LONG_2ADDR: 313 case OP_USHR_LONG_2ADDR: 314 case OP_ADD_FLOAT_2ADDR: 315 case OP_SUB_FLOAT_2ADDR: 316 case OP_MUL_FLOAT_2ADDR: 317 case OP_DIV_FLOAT_2ADDR: 318 case OP_REM_FLOAT_2ADDR: 319 case OP_ADD_DOUBLE_2ADDR: 320 case OP_SUB_DOUBLE_2ADDR: 321 case OP_MUL_DOUBLE_2ADDR: 322 case OP_DIV_DOUBLE_2ADDR: 323 case OP_REM_DOUBLE_2ADDR: 324 return 1; 325 326 case OP_ADD_INT_LIT16: 327 case OP_RSUB_INT: 328 case OP_MUL_INT_LIT16: 329 case OP_DIV_INT_LIT16: 330 case OP_REM_INT_LIT16: 331 case OP_AND_INT_LIT16: 332 case OP_OR_INT_LIT16: 333 case OP_XOR_INT_LIT16: 334 return 2; 335 336 case OP_ADD_INT_LIT8: 337 case OP_RSUB_INT_LIT8: 338 case OP_MUL_INT_LIT8: 339 case OP_DIV_INT_LIT8: 340 case OP_REM_INT_LIT8: 341 case OP_AND_INT_LIT8: 342 case OP_OR_INT_LIT8: 343 case OP_XOR_INT_LIT8: 344 case OP_SHL_INT_LIT8: 345 case OP_SHR_INT_LIT8: 346 case OP_USHR_INT_LIT8: 347 return 2; 348 349 case OP_EXECUTE_INLINE: 350 case OP_EXECUTE_INLINE_RANGE: 351 return 3; 352 #if FIXME 353 case OP_INVOKE_OBJECT_INIT_RANGE: 354 return 3; 355 #endif 356 357 case OP_IGET_QUICK: 358 case OP_IGET_WIDE_QUICK: 359 case OP_IGET_OBJECT_QUICK: 360 case OP_IPUT_QUICK: 361 case OP_IPUT_WIDE_QUICK: 362 case OP_IPUT_OBJECT_QUICK: 363 return 2; 364 365 case OP_INVOKE_VIRTUAL_QUICK: 366 case OP_INVOKE_VIRTUAL_QUICK_RANGE: 367 case OP_INVOKE_SUPER_QUICK: 368 case OP_INVOKE_SUPER_QUICK_RANGE: 369 return 3; 370 #ifdef SUPPORT_HLO 371 case kExtInstruction: 372 switch(inst) { 373 case OP_X_AGET_QUICK: 374 case OP_X_AGET_WIDE_QUICK: 375 case OP_X_AGET_OBJECT_QUICK: 376 case OP_X_AGET_BOOLEAN_QUICK: 377 case OP_X_AGET_BYTE_QUICK: 378 case OP_X_AGET_CHAR_QUICK: 379 case OP_X_AGET_SHORT_QUICK: 380 case OP_X_APUT_QUICK: 381 case OP_X_APUT_WIDE_QUICK: 382 case OP_X_APUT_OBJECT_QUICK: 383 case OP_X_APUT_BOOLEAN_QUICK: 384 case OP_X_APUT_BYTE_QUICK: 385 case OP_X_APUT_CHAR_QUICK: 386 case OP_X_APUT_SHORT_QUICK: 387 return 3; 388 case OP_X_DEREF_GET: 389 case OP_X_DEREF_GET_OBJECT: 390 case OP_X_DEREF_GET_WIDE: 391 case OP_X_DEREF_GET_BOOLEAN: 392 case OP_X_DEREF_GET_BYTE: 393 case OP_X_DEREF_GET_CHAR: 394 case OP_X_DEREF_GET_SHORT: 395 case OP_X_DEREF_PUT: 396 case OP_X_DEREF_PUT_WIDE: 397 case OP_X_DEREF_PUT_OBJECT: 398 case OP_X_DEREF_PUT_BOOLEAN: 399 case OP_X_DEREF_PUT_BYTE: 400 case OP_X_DEREF_PUT_CHAR: 401 case OP_X_DEREF_PUT_SHORT: 402 return 2; 403 case OP_X_ARRAY_CHECKS: 404 case OP_X_ARRAY_OBJECT_CHECKS: 405 return 3; 406 case OP_X_CHECK_BOUNDS: 407 case OP_X_CHECK_NULL: 408 case OP_X_CHECK_TYPE: 409 return 2; 410 } 411 #endif 412 } 413 return -1; 414 } 415 //! reduces refCount of a virtual register 416 417 //! 418 void touchOneVR(u2 vA, LowOpndRegType type) { 419 int index = searchCompileTable(LowOpndRegType_virtual | type, vA); 420 if(index < 0) { 421 ALOGE("virtual reg %d type %d not found in touchOneVR", vA, type); 422 return; 423 } 424 compileTable[index].refCount--; 425 } 426 //! reduces refCount of two virtual registers 427 428 //! 429 void touchTwoVRs(u2 vA, u2 vB, LowOpndRegType type) { 430 int index = searchCompileTable(LowOpndRegType_virtual | type, vA); 431 if(index < 0) { 432 ALOGE("virtual reg vA %d type %d not found in touchTwoVRs", vA, type); 433 return; 434 } 435 compileTable[index].refCount--; 436 index = searchCompileTable(LowOpndRegType_virtual | type, vB); 437 if(index < 0) { 438 ALOGE("virtual reg vB %d type %d not found in touchTwoVRs", vB, type); 439 return; 440 } 441 compileTable[index].refCount--; 442 } 443 int num_const_worklist; 444 //! worklist to update constVRTable later 445 int constWorklist[10]; 446 447 int num_const_vr; //in a basic block 448 //! table to store the constant information for virtual registers 449 ConstVRInfo constVRTable[MAX_CONST_REG]; 450 //! update constVRTable for a given virtual register 451 452 //! set "isConst" to false 453 void setVRToNonConst(int regNum, OpndSize size) { 454 int k; 455 int indexL = -1; 456 int indexH = -1; 457 for(k = 0; k < num_const_vr; k++) { 458 if(constVRTable[k].regNum == regNum) { 459 indexL = k; 460 continue; 461 } 462 if(constVRTable[k].regNum == regNum + 1 && size == OpndSize_64) { 463 indexH = k; 464 continue; 465 } 466 } 467 if(indexL >= 0) { 468 //remove this entry?? 469 constVRTable[indexL].isConst = false; 470 } 471 if(size == OpndSize_64 && indexH >= 0) { 472 constVRTable[indexH].isConst = false; 473 } 474 } 475 //! update constVRTable for a given virtual register 476 477 //! set "isConst" to true 478 void setVRToConst(int regNum, OpndSize size, int* tmpValue) { 479 int k; 480 int indexL = -1; 481 int indexH = -1; 482 for(k = 0; k < num_const_vr; k++) { 483 if(constVRTable[k].regNum == regNum) { 484 indexL = k; 485 continue; 486 } 487 if(constVRTable[k].regNum == regNum + 1 && size == OpndSize_64) { 488 indexH = k; 489 continue; 490 } 491 } 492 if(indexL < 0) { 493 indexL = num_const_vr; 494 constVRTable[indexL].regNum = regNum; 495 num_const_vr++; 496 } 497 constVRTable[indexL].isConst = true; 498 constVRTable[indexL].value = tmpValue[0]; 499 if(size == OpndSize_64) { 500 if(indexH < 0) { 501 indexH = num_const_vr; 502 constVRTable[indexH].regNum = regNum+1; 503 num_const_vr++; 504 } 505 constVRTable[indexH].isConst = true; 506 constVRTable[indexH].value = tmpValue[1]; 507 } 508 if(num_const_vr > MAX_CONST_REG) ALOGE("constVRTable overflows"); 509 invalidateVRDueToConst(regNum, size); 510 } 511 512 //! perform work on constWorklist 513 514 //! 515 void updateConstInfo(BasicBlock_O1* bb) { 516 if(bb == NULL) return; 517 int k; 518 for(k = 0; k < num_const_worklist; k++) { 519 //int indexOrig = constWorklist[k]; 520 //compileTable[indexOrig].isConst = false; 521 //int A = compileTable[indexOrig].regNum; 522 //LowOpndRegType type = compileTable[indexOrig].physicalType & MASK_FOR_TYPE; 523 setVRToNonConst(constWorklist[k], OpndSize_32); 524 } 525 } 526 //! check whether the current bytecode generates a const 527 528 //! if yes, update constVRTable; otherwise, update constWorklist 529 //! if a bytecode uses vA (const), and updates vA to non const, getConstInfo will return false and update constWorklist to make sure when lowering the bytecode, vA is treated as constant 530 bool getConstInfo(BasicBlock_O1* bb) { 531 compileTableEntry* infoArray = compileTable; 532 u2 inst_op = INST_INST(inst); 533 u2 vA = 0, vB = 0, v1, v2; 534 u2 BBBB; 535 u2 tmp_u2; 536 s4 tmp_s4; 537 u4 tmp_u4; 538 int entry, tmpValue[2], tmpValue2[2]; 539 num_const_worklist = 0; 540 541 switch(inst_op) { 542 //for other opcode, if update the register, set isConst to false 543 case OP_MOVE: 544 case OP_MOVE_OBJECT: 545 case OP_MOVE_FROM16: 546 case OP_MOVE_OBJECT_FROM16: 547 case OP_MOVE_16: 548 case OP_MOVE_OBJECT_16: 549 if(inst_op == OP_MOVE || inst_op == OP_MOVE_OBJECT) { 550 vA = INST_A(inst); 551 vB = INST_B(inst); 552 } 553 else if(inst_op == OP_MOVE_FROM16 || inst_op == OP_MOVE_OBJECT_FROM16) { 554 vA = INST_AA(inst); 555 vB = FETCH(1); 556 } 557 else if(inst_op == OP_MOVE_16 || inst_op == OP_MOVE_OBJECT_16) { 558 vA = FETCH(1); 559 vB = FETCH(2); 560 } 561 if(isVirtualRegConstant(vB, LowOpndRegType_gp, tmpValue, false) == 3) { 562 entry = findVirtualRegInTable(vA, LowOpndRegType_gp, true); 563 setVRToConst(vA, OpndSize_32, tmpValue); 564 infoArray[entry].isConst = true; 565 infoArray[entry].value[0] = tmpValue[0]; 566 compileTable[entry].refCount--; 567 touchOneVR(vB, LowOpndRegType_gp); 568 return true; 569 } else { 570 constWorklist[num_const_worklist] = vA; 571 num_const_worklist++; 572 } 573 return false; 574 case OP_MOVE_WIDE: 575 case OP_MOVE_WIDE_FROM16: 576 case OP_MOVE_WIDE_16: 577 if(inst_op == OP_MOVE_WIDE) { 578 vA = INST_A(inst); 579 vB = INST_B(inst); 580 } 581 else if(inst_op == OP_MOVE_WIDE_FROM16) { 582 vA = INST_AA(inst); 583 vB = FETCH(1); 584 } 585 else if(inst_op == OP_MOVE_WIDE_16) { 586 vA = FETCH(1); 587 vB = FETCH(2); 588 } 589 if(isVirtualRegConstant(vB, LowOpndRegType_xmm, tmpValue, false) == 3) { 590 entry = findVirtualRegInTable(vA, LowOpndRegType_xmm, true); 591 setVRToConst(vA, OpndSize_64, tmpValue); 592 compileTable[entry].refCount--; 593 touchOneVR(vB, LowOpndRegType_xmm); 594 return true; 595 } else { 596 constWorklist[num_const_worklist] = vA; 597 num_const_worklist++; 598 constWorklist[num_const_worklist] = vA+1; 599 num_const_worklist++; 600 } 601 return false; 602 case OP_MOVE_RESULT: 603 case OP_MOVE_RESULT_OBJECT: 604 case OP_MOVE_EXCEPTION: 605 case OP_CONST_STRING: 606 case OP_CONST_STRING_JUMBO: 607 case OP_CONST_CLASS: 608 case OP_NEW_INSTANCE: 609 case OP_CMPL_FLOAT: 610 case OP_CMPG_FLOAT: 611 case OP_CMPL_DOUBLE: 612 case OP_CMPG_DOUBLE: 613 case OP_AGET: 614 case OP_AGET_OBJECT: 615 case OP_AGET_BOOLEAN: 616 case OP_AGET_BYTE: 617 case OP_AGET_CHAR: 618 case OP_AGET_SHORT: 619 case OP_SGET: 620 case OP_SGET_OBJECT: 621 case OP_SGET_VOLATILE: 622 case OP_SGET_OBJECT_VOLATILE: 623 case OP_SGET_BOOLEAN: 624 case OP_SGET_BYTE: 625 case OP_SGET_CHAR: 626 case OP_SGET_SHORT: 627 vA = INST_AA(inst); 628 constWorklist[num_const_worklist] = vA; 629 num_const_worklist++; 630 return false; 631 case OP_MOVE_RESULT_WIDE: 632 case OP_AGET_WIDE: 633 case OP_SGET_WIDE: 634 case OP_SGET_WIDE_VOLATILE: 635 vA = INST_AA(inst); 636 constWorklist[num_const_worklist] = vA; 637 num_const_worklist++; 638 constWorklist[num_const_worklist] = vA+1; 639 num_const_worklist++; 640 return false; 641 case OP_INSTANCE_OF: 642 case OP_ARRAY_LENGTH: 643 case OP_NEW_ARRAY: 644 case OP_IGET: 645 case OP_IGET_OBJECT: 646 case OP_IGET_VOLATILE: 647 case OP_IGET_OBJECT_VOLATILE: 648 case OP_IGET_BOOLEAN: 649 case OP_IGET_BYTE: 650 case OP_IGET_CHAR: 651 case OP_IGET_SHORT: 652 case OP_IGET_QUICK: 653 case OP_IGET_OBJECT_QUICK: 654 vA = INST_A(inst); 655 constWorklist[num_const_worklist] = vA; 656 num_const_worklist++; 657 return false; 658 case OP_IGET_WIDE: 659 case OP_IGET_WIDE_VOLATILE: 660 case OP_IGET_WIDE_QUICK: 661 vA = INST_A(inst); 662 constWorklist[num_const_worklist] = vA; 663 num_const_worklist++; 664 constWorklist[num_const_worklist] = vA+1; 665 num_const_worklist++; 666 return false; 667 //TODO: constant folding for float/double/long ALU 668 case OP_ADD_FLOAT: 669 case OP_SUB_FLOAT: 670 case OP_MUL_FLOAT: 671 case OP_DIV_FLOAT: 672 case OP_REM_FLOAT: 673 vA = INST_AA(inst); 674 constWorklist[num_const_worklist] = vA; 675 num_const_worklist++; 676 return false; 677 case OP_ADD_DOUBLE: 678 case OP_SUB_DOUBLE: 679 case OP_MUL_DOUBLE: 680 case OP_DIV_DOUBLE: 681 case OP_REM_DOUBLE: 682 vA = INST_AA(inst); 683 constWorklist[num_const_worklist] = vA; 684 num_const_worklist++; 685 constWorklist[num_const_worklist] = vA+1; 686 num_const_worklist++; 687 return false; 688 case OP_NEG_FLOAT: 689 case OP_INT_TO_FLOAT: 690 case OP_LONG_TO_FLOAT: 691 case OP_FLOAT_TO_INT: 692 case OP_DOUBLE_TO_INT: 693 case OP_ADD_FLOAT_2ADDR: 694 case OP_SUB_FLOAT_2ADDR: 695 case OP_MUL_FLOAT_2ADDR: 696 case OP_DIV_FLOAT_2ADDR: 697 case OP_REM_FLOAT_2ADDR: 698 case OP_DOUBLE_TO_FLOAT: 699 vA = INST_A(inst); 700 constWorklist[num_const_worklist] = vA; //change constWorklist to point to vA TODO 701 num_const_worklist++; 702 return false; 703 case OP_FLOAT_TO_LONG: 704 case OP_DOUBLE_TO_LONG: 705 case OP_FLOAT_TO_DOUBLE: 706 vA = INST_A(inst); 707 constWorklist[num_const_worklist] = vA; 708 num_const_worklist++; 709 constWorklist[num_const_worklist] = vA+1; 710 num_const_worklist++; 711 return false; 712 case OP_NEG_DOUBLE: 713 case OP_INT_TO_DOUBLE: //fp stack 714 case OP_LONG_TO_DOUBLE: 715 case OP_ADD_DOUBLE_2ADDR: 716 case OP_SUB_DOUBLE_2ADDR: 717 case OP_MUL_DOUBLE_2ADDR: 718 case OP_DIV_DOUBLE_2ADDR: 719 case OP_REM_DOUBLE_2ADDR: 720 //ops on float, double 721 vA = INST_A(inst); 722 constWorklist[num_const_worklist] = vA; 723 num_const_worklist++; 724 constWorklist[num_const_worklist] = vA+1; 725 num_const_worklist++; 726 return false; 727 case OP_NEG_INT: 728 case OP_NOT_INT: 729 case OP_LONG_TO_INT: 730 case OP_INT_TO_BYTE: 731 case OP_INT_TO_CHAR: 732 case OP_INT_TO_SHORT: 733 vA = INST_A(inst); 734 vB = INST_B(inst); 735 if(isVirtualRegConstant(vB, LowOpndRegType_gp, tmpValue, false) == 3) { 736 entry = findVirtualRegInTable(vA, LowOpndRegType_gp, true); 737 infoArray[entry].isConst = true; 738 if(inst_op == OP_NEG_INT) 739 infoArray[entry].value[0] = -tmpValue[0]; 740 if(inst_op == OP_NOT_INT) 741 infoArray[entry].value[0] = ~tmpValue[0]; //CHECK 742 if(inst_op == OP_LONG_TO_INT) 743 infoArray[entry].value[0] = tmpValue[0]; 744 if(inst_op == OP_INT_TO_BYTE)// sar 745 infoArray[entry].value[0] = (tmpValue[0] << 24) >> 24; 746 if(inst_op == OP_INT_TO_CHAR) //shr 747 infoArray[entry].value[0] = ((unsigned int)(tmpValue[0] << 16)) >> 16; 748 if(inst_op == OP_INT_TO_SHORT) //sar 749 infoArray[entry].value[0] = (tmpValue[0] << 16) >> 16; 750 tmpValue[0] = infoArray[entry].value[0]; 751 setVRToConst(vA, OpndSize_32, tmpValue); 752 compileTable[entry].refCount--; 753 touchOneVR(vB, LowOpndRegType_gp); 754 #ifdef DEBUG_CONST 755 LOGD("getConstInfo: set VR %d to %d", vA, infoArray[entry].value[0]); 756 #endif 757 return true; 758 } 759 else { 760 constWorklist[num_const_worklist] = vA; 761 num_const_worklist++; 762 return false; 763 } 764 case OP_NEG_LONG: 765 case OP_NOT_LONG: 766 case OP_INT_TO_LONG: 767 vA = INST_A(inst); 768 constWorklist[num_const_worklist] = vA; 769 num_const_worklist++; 770 constWorklist[num_const_worklist] = vA+1; //fixed on 10/15/2009 771 num_const_worklist++; 772 return false; 773 case OP_DIV_INT_2ADDR: 774 case OP_REM_INT_2ADDR: 775 case OP_REM_INT_LIT16: 776 case OP_DIV_INT_LIT16: 777 case OP_REM_INT_LIT8: 778 case OP_DIV_INT_LIT8: 779 case OP_DIV_INT: 780 case OP_REM_INT: 781 if(inst_op == OP_DIV_INT || inst_op == OP_DIV_INT_LIT8 || 782 inst_op == OP_REM_INT || inst_op == OP_REM_INT_LIT8) 783 vA = INST_AA(inst); 784 else 785 vA = INST_A(inst); 786 constWorklist[num_const_worklist] = vA; 787 num_const_worklist++; 788 return false; 789 case OP_ADD_INT_2ADDR: 790 case OP_SUB_INT_2ADDR: 791 case OP_MUL_INT_2ADDR: 792 case OP_AND_INT_2ADDR: 793 case OP_OR_INT_2ADDR: 794 case OP_XOR_INT_2ADDR: 795 case OP_SHL_INT_2ADDR: 796 case OP_SHR_INT_2ADDR: 797 case OP_USHR_INT_2ADDR: 798 vA = INST_A(inst); 799 v2 = INST_B(inst); 800 if(isVirtualRegConstant(vA, LowOpndRegType_gp, tmpValue, false) == 3 && 801 isVirtualRegConstant(v2, LowOpndRegType_gp, tmpValue2, false) == 3) { 802 entry = findVirtualRegInTable(vA, LowOpndRegType_gp, true); 803 infoArray[entry].isConst = true; 804 if(inst_op == OP_ADD_INT_2ADDR) 805 infoArray[entry].value[0] = tmpValue[0] + tmpValue2[0]; 806 if(inst_op == OP_SUB_INT_2ADDR) 807 infoArray[entry].value[0] = tmpValue[0] - tmpValue2[0]; 808 if(inst_op == OP_MUL_INT_2ADDR) 809 infoArray[entry].value[0] = tmpValue[0] * tmpValue2[0]; 810 if(inst_op == OP_DIV_INT_2ADDR) 811 infoArray[entry].value[0] = tmpValue[0] / tmpValue2[0]; 812 if(inst_op == OP_REM_INT_2ADDR) 813 infoArray[entry].value[0] = tmpValue[0] % tmpValue2[0]; 814 if(inst_op == OP_AND_INT_2ADDR) 815 infoArray[entry].value[0] = tmpValue[0] & tmpValue2[0]; 816 if(inst_op == OP_OR_INT_2ADDR) 817 infoArray[entry].value[0] = tmpValue[0] | tmpValue2[0]; 818 if(inst_op == OP_XOR_INT_2ADDR) 819 infoArray[entry].value[0] = tmpValue[0] ^ tmpValue2[0]; 820 if(inst_op == OP_SHL_INT_2ADDR) 821 infoArray[entry].value[0] = tmpValue[0] << tmpValue2[0]; 822 if(inst_op == OP_SHR_INT_2ADDR) 823 infoArray[entry].value[0] = tmpValue[0] >> tmpValue2[0]; 824 if(inst_op == OP_USHR_INT_2ADDR) 825 infoArray[entry].value[0] = (unsigned int)tmpValue[0] >> tmpValue2[0]; 826 tmpValue[0] = infoArray[entry].value[0]; 827 setVRToConst(vA, OpndSize_32, tmpValue); 828 compileTable[entry].refCount--; 829 touchOneVR(v2, LowOpndRegType_gp); 830 #ifdef DEBUG_CONST 831 LOGD("getConstInfo: set VR %d to %d", vA, infoArray[entry].value[0]); 832 #endif 833 return true; 834 } 835 else { 836 constWorklist[num_const_worklist] = vA; 837 num_const_worklist++; 838 return false; 839 } 840 case OP_ADD_INT_LIT16: 841 case OP_RSUB_INT: 842 case OP_MUL_INT_LIT16: 843 case OP_AND_INT_LIT16: 844 case OP_OR_INT_LIT16: 845 case OP_XOR_INT_LIT16: 846 vA = INST_A(inst); 847 vB = INST_B(inst); 848 tmp_s4 = (s2)FETCH(1); 849 if(isVirtualRegConstant(vB, LowOpndRegType_gp, tmpValue, false) == 3) { 850 entry = findVirtualRegInTable(vA, LowOpndRegType_gp, true); 851 infoArray[entry].isConst = true; 852 if(inst_op == OP_ADD_INT_LIT16) 853 infoArray[entry].value[0] = tmpValue[0] + tmp_s4; 854 if(inst_op == OP_RSUB_INT) 855 infoArray[entry].value[0] = tmp_s4 - tmpValue[0]; 856 if(inst_op == OP_MUL_INT_LIT16) 857 infoArray[entry].value[0] = tmpValue[0] * tmp_s4; 858 if(inst_op == OP_DIV_INT_LIT16) 859 infoArray[entry].value[0] = tmpValue[0] / tmp_s4; 860 if(inst_op == OP_REM_INT_LIT16) 861 infoArray[entry].value[0] = tmpValue[0] % tmp_s4; 862 if(inst_op == OP_AND_INT_LIT16) 863 infoArray[entry].value[0] = tmpValue[0] & tmp_s4; 864 if(inst_op == OP_OR_INT_LIT16) 865 infoArray[entry].value[0] = tmpValue[0] | tmp_s4; 866 if(inst_op == OP_XOR_INT_LIT16) 867 infoArray[entry].value[0] = tmpValue[0] ^ tmp_s4; 868 tmpValue[0] = infoArray[entry].value[0]; 869 setVRToConst(vA, OpndSize_32, tmpValue); 870 compileTable[entry].refCount--; 871 touchOneVR(vB, LowOpndRegType_gp); 872 #ifdef DEBUG_CONST 873 LOGD("getConstInfo: set VR %d to %d", vA, infoArray[entry].value[0]); 874 #endif 875 return true; 876 } 877 else { 878 constWorklist[num_const_worklist] = vA; 879 num_const_worklist++; 880 return false; 881 } 882 case OP_ADD_INT: 883 case OP_SUB_INT: 884 case OP_MUL_INT: 885 case OP_AND_INT: 886 case OP_OR_INT: 887 case OP_XOR_INT: 888 case OP_SHL_INT: 889 case OP_SHR_INT: 890 case OP_USHR_INT: 891 vA = INST_AA(inst); 892 v1 = *((u1*)rPC + 2); 893 v2 = *((u1*)rPC + 3); 894 if(isVirtualRegConstant(v1, LowOpndRegType_gp, tmpValue, false) == 3 && 895 isVirtualRegConstant(v2, LowOpndRegType_gp, tmpValue2, false) == 3) { 896 entry = findVirtualRegInTable(vA, LowOpndRegType_gp, true); 897 infoArray[entry].isConst = true; 898 if(inst_op == OP_ADD_INT) 899 infoArray[entry].value[0] = tmpValue[0] + tmpValue2[0]; 900 if(inst_op == OP_SUB_INT) 901 infoArray[entry].value[0] = tmpValue[0] - tmpValue2[0]; 902 if(inst_op == OP_MUL_INT) 903 infoArray[entry].value[0] = tmpValue[0] * tmpValue2[0]; 904 if(inst_op == OP_DIV_INT) 905 infoArray[entry].value[0] = tmpValue[0] / tmpValue2[0]; 906 if(inst_op == OP_REM_INT) 907 infoArray[entry].value[0] = tmpValue[0] % tmpValue2[0]; 908 if(inst_op == OP_AND_INT) 909 infoArray[entry].value[0] = tmpValue[0] & tmpValue2[0]; 910 if(inst_op == OP_OR_INT) 911 infoArray[entry].value[0] = tmpValue[0] | tmpValue2[0]; 912 if(inst_op == OP_XOR_INT) 913 infoArray[entry].value[0] = tmpValue[0] ^ tmpValue2[0]; 914 if(inst_op == OP_SHL_INT) 915 infoArray[entry].value[0] = tmpValue[0] << tmpValue2[0]; 916 if(inst_op == OP_SHR_INT) 917 infoArray[entry].value[0] = tmpValue[0] >> tmpValue2[0]; 918 if(inst_op == OP_USHR_INT) 919 infoArray[entry].value[0] = (unsigned int)tmpValue[0] >> tmpValue2[0]; 920 tmpValue[0] = infoArray[entry].value[0]; 921 setVRToConst(vA, OpndSize_32, tmpValue); 922 compileTable[entry].refCount--; 923 touchOneVR(v1, LowOpndRegType_gp); 924 touchOneVR(v2, LowOpndRegType_gp); 925 #ifdef DEBUG_CONST 926 LOGD("getConstInfo: set VR %d to %d", vA, infoArray[entry].value[0]); 927 #endif 928 return true; 929 } 930 else { 931 constWorklist[num_const_worklist] = vA; 932 num_const_worklist++; 933 return false; 934 } 935 case OP_ADD_INT_LIT8: //INST_AA 936 case OP_RSUB_INT_LIT8: 937 case OP_MUL_INT_LIT8: 938 case OP_AND_INT_LIT8: 939 case OP_OR_INT_LIT8: 940 case OP_XOR_INT_LIT8: 941 case OP_SHL_INT_LIT8: 942 case OP_SHR_INT_LIT8: 943 case OP_USHR_INT_LIT8: 944 vA = INST_AA(inst); 945 vB = (u2)FETCH(1) & 0xff; 946 tmp_s4 = (s2)FETCH(1) >> 8; 947 if(isVirtualRegConstant(vB, LowOpndRegType_gp, tmpValue, false) == 3) { 948 entry = findVirtualRegInTable(vA, LowOpndRegType_gp, true); 949 infoArray[entry].isConst = true; 950 if(inst_op == OP_ADD_INT_LIT8) 951 infoArray[entry].value[0] = tmpValue[0] + tmp_s4; 952 if(inst_op == OP_RSUB_INT_LIT8) 953 infoArray[entry].value[0] = tmp_s4 - tmpValue[0]; 954 if(inst_op == OP_MUL_INT_LIT8) 955 infoArray[entry].value[0] = tmpValue[0] * tmp_s4; 956 if(inst_op == OP_DIV_INT_LIT8) 957 infoArray[entry].value[0] = tmpValue[0] / tmp_s4; 958 if(inst_op == OP_REM_INT_LIT8) 959 infoArray[entry].value[0] = tmpValue[0] % tmp_s4; 960 if(inst_op == OP_AND_INT_LIT8) 961 infoArray[entry].value[0] = tmpValue[0] & tmp_s4; 962 if(inst_op == OP_OR_INT_LIT8) 963 infoArray[entry].value[0] = tmpValue[0] | tmp_s4; 964 if(inst_op == OP_XOR_INT_LIT8) 965 infoArray[entry].value[0] = tmpValue[0] ^ tmp_s4; 966 if(inst_op == OP_SHL_INT_LIT8) 967 infoArray[entry].value[0] = tmpValue[0] << tmp_s4; 968 if(inst_op == OP_SHR_INT_LIT8) 969 infoArray[entry].value[0] = tmpValue[0] >> tmp_s4; 970 if(inst_op == OP_USHR_INT_LIT8) 971 infoArray[entry].value[0] = (unsigned int)tmpValue[0] >> tmp_s4; 972 tmpValue[0] = infoArray[entry].value[0]; 973 setVRToConst(vA, OpndSize_32, tmpValue); 974 compileTable[entry].refCount--; 975 touchOneVR(vB, LowOpndRegType_gp); 976 #ifdef DEBUG_CONST 977 LOGD("getConstInfo: set VR %d to %d", vA, infoArray[entry].value[0]); 978 #endif 979 return true; 980 } 981 else { 982 constWorklist[num_const_worklist] = vA; 983 num_const_worklist++; 984 return false; 985 } 986 case OP_ADD_LONG: 987 case OP_SUB_LONG: 988 case OP_AND_LONG: 989 case OP_OR_LONG: 990 case OP_XOR_LONG: 991 case OP_MUL_LONG: 992 case OP_DIV_LONG: 993 case OP_REM_LONG: 994 case OP_SHL_LONG: 995 case OP_SHR_LONG: 996 case OP_USHR_LONG: 997 //TODO bytecode is not going to update state registers 998 //constant folding 999 vA = INST_AA(inst); 1000 constWorklist[num_const_worklist] = vA; 1001 num_const_worklist++; 1002 constWorklist[num_const_worklist] = vA+1; 1003 num_const_worklist++; 1004 return false; 1005 case OP_CMP_LONG: 1006 vA = INST_AA(inst); 1007 constWorklist[num_const_worklist] = vA; 1008 num_const_worklist++; 1009 return false; 1010 case OP_ADD_LONG_2ADDR: 1011 case OP_SUB_LONG_2ADDR: 1012 case OP_AND_LONG_2ADDR: 1013 case OP_OR_LONG_2ADDR: 1014 case OP_XOR_LONG_2ADDR: 1015 case OP_MUL_LONG_2ADDR: 1016 case OP_DIV_LONG_2ADDR: 1017 case OP_REM_LONG_2ADDR: 1018 case OP_SHL_LONG_2ADDR: 1019 case OP_SHR_LONG_2ADDR: 1020 case OP_USHR_LONG_2ADDR: 1021 vA = INST_A(inst); 1022 constWorklist[num_const_worklist] = vA; 1023 num_const_worklist++; 1024 constWorklist[num_const_worklist] = vA+1; 1025 num_const_worklist++; 1026 return false; 1027 case OP_CONST_4: 1028 vA = INST_A(inst); 1029 tmp_s4 = (s4) (INST_B(inst) << 28) >> 28; 1030 entry = findVirtualRegInTable(vA, LowOpndRegType_gp, true); 1031 infoArray[entry].isConst = true; 1032 infoArray[entry].value[0] = tmp_s4; 1033 tmpValue[0] = infoArray[entry].value[0]; 1034 setVRToConst(vA, OpndSize_32, tmpValue); 1035 compileTable[entry].refCount--; 1036 #ifdef DEBUG_CONST 1037 LOGD("getConstInfo: set VR %d to %d", vA, tmp_s4); 1038 #endif 1039 return true; 1040 case OP_CONST_16: 1041 BBBB = FETCH(1); 1042 vA = INST_AA(inst); 1043 entry = findVirtualRegInTable(vA, LowOpndRegType_gp, true); 1044 infoArray[entry].isConst = true; 1045 infoArray[entry].value[0] = (s2)BBBB; 1046 tmpValue[0] = infoArray[entry].value[0]; 1047 setVRToConst(vA, OpndSize_32, tmpValue); 1048 compileTable[entry].refCount--; 1049 #ifdef DEBUG_CONST 1050 LOGD("getConstInfo: set VR %d to %d", vA, infoArray[entry].value[0]); 1051 #endif 1052 return true; 1053 case OP_CONST: 1054 vA = INST_AA(inst); 1055 tmp_u4 = FETCH(1); 1056 tmp_u4 |= (u4)FETCH(2) << 16; 1057 entry = findVirtualRegInTable(vA, LowOpndRegType_gp, true); 1058 infoArray[entry].isConst = true; 1059 infoArray[entry].value[0] = (s4)tmp_u4; 1060 tmpValue[0] = infoArray[entry].value[0]; 1061 setVRToConst(vA, OpndSize_32, tmpValue); 1062 compileTable[entry].refCount--; 1063 #ifdef DEBUG_CONST 1064 LOGD("getConstInfo: set VR %d to %d", vA, infoArray[entry].value[0]); 1065 #endif 1066 return true; 1067 case OP_CONST_HIGH16: 1068 vA = INST_AA(inst); 1069 tmp_u2 = FETCH(1); 1070 entry = findVirtualRegInTable(vA, LowOpndRegType_gp, true); 1071 infoArray[entry].isConst = true; 1072 infoArray[entry].value[0] = (s4)tmp_u2<<16; 1073 tmpValue[0] = infoArray[entry].value[0]; 1074 setVRToConst(vA, OpndSize_32, tmpValue); 1075 compileTable[entry].refCount--; 1076 #ifdef DEBUG_CONST 1077 LOGD("getConstInfo: set VR %d to %d", vA, infoArray[entry].value[0]); 1078 #endif 1079 return true; 1080 case OP_CONST_WIDE_16: 1081 vA = INST_AA(inst); 1082 tmp_u2 = FETCH(1); 1083 entry = findVirtualRegInTable(vA, LowOpndRegType_gp, true); 1084 infoArray[entry].isConst = true; 1085 infoArray[entry].value[0] = (s2)tmp_u2; 1086 tmpValue[0] = infoArray[entry].value[0]; 1087 compileTable[entry].refCount--; 1088 #ifdef DEBUG_CONST 1089 LOGD("getConstInfo: set VR %d to %x", vA, infoArray[entry].value[0]); 1090 #endif 1091 1092 entry = findVirtualRegInTable(vA+1, LowOpndRegType_gp, true); 1093 infoArray[entry].isConst = true; 1094 infoArray[entry].value[0] = (s2)tmp_u2>>31; 1095 tmpValue[1] = infoArray[entry].value[0]; 1096 setVRToConst(vA, OpndSize_64, tmpValue); 1097 compileTable[entry].refCount--; 1098 #ifdef DEBUG_CONST 1099 LOGD("getConstInfo: set VR %d to %x", vA+1, infoArray[entry].value[0]); 1100 #endif 1101 return true; 1102 case OP_CONST_WIDE_32: 1103 vA = INST_AA(inst); 1104 tmp_u4 = FETCH(1); 1105 tmp_u4 |= (u4)FETCH(2) << 16; 1106 entry = findVirtualRegInTable(vA, LowOpndRegType_gp, true); 1107 infoArray[entry].isConst = true; 1108 infoArray[entry].value[0] = (s4)tmp_u4; 1109 tmpValue[0] = infoArray[entry].value[0]; 1110 compileTable[entry].refCount--; 1111 #ifdef DEBUG_CONST 1112 LOGD("getConstInfo: set VR %d to %x", vA, infoArray[entry].value[0]); 1113 #endif 1114 1115 entry = findVirtualRegInTable(vA+1, LowOpndRegType_gp, true); 1116 infoArray[entry].isConst = true; 1117 infoArray[entry].value[0] = (s4)tmp_u4>>31; 1118 tmpValue[1] = infoArray[entry].value[0]; 1119 setVRToConst(vA, OpndSize_64, tmpValue); 1120 compileTable[entry].refCount--; 1121 #ifdef DEBUG_CONST 1122 LOGD("getConstInfo: set VR %d to %x", vA+1, infoArray[entry].value[0]); 1123 #endif 1124 return true; 1125 case OP_CONST_WIDE: 1126 vA = INST_AA(inst); 1127 tmp_u4 = FETCH(1); 1128 tmp_u4 |= (u8)FETCH(2) << 16; 1129 entry = findVirtualRegInTable(vA, LowOpndRegType_gp, true); 1130 infoArray[entry].isConst = true; 1131 infoArray[entry].value[0] = (s4)tmp_u4; 1132 tmpValue[0] = infoArray[entry].value[0]; 1133 compileTable[entry].refCount--; 1134 #ifdef DEBUG_CONST 1135 LOGD("getConstInfo: set VR %d to %x", vA, infoArray[entry].value[0]); 1136 #endif 1137 1138 tmp_u4 = (u8)FETCH(3); 1139 tmp_u4 |= (u8)FETCH(4) << 16; 1140 entry = findVirtualRegInTable(vA+1, LowOpndRegType_gp, true); 1141 infoArray[entry].isConst = true; 1142 infoArray[entry].value[0] = (s4)tmp_u4; 1143 tmpValue[1] = infoArray[entry].value[0]; 1144 setVRToConst(vA, OpndSize_64, tmpValue); 1145 compileTable[entry].refCount--; 1146 #ifdef DEBUG_CONST 1147 LOGD("getConstInfo: set VR %d to %x", vA+1, infoArray[entry].value[0]); 1148 #endif 1149 return true; 1150 case OP_CONST_WIDE_HIGH16: 1151 vA = INST_AA(inst); 1152 tmp_u2 = FETCH(1); 1153 entry = findVirtualRegInTable(vA, LowOpndRegType_gp, true); 1154 infoArray[entry].isConst = true; 1155 infoArray[entry].value[0] = 0; 1156 tmpValue[0] = infoArray[entry].value[0]; 1157 compileTable[entry].refCount--; 1158 #ifdef DEBUG_CONST 1159 LOGD("getConstInfo: set VR %d to %x", vA, infoArray[entry].value[0]); 1160 #endif 1161 1162 entry = findVirtualRegInTable(vA+1, LowOpndRegType_gp, true); 1163 infoArray[entry].isConst = true; 1164 infoArray[entry].value[0] = (s4)tmp_u2<<16; 1165 tmpValue[1] = infoArray[entry].value[0]; 1166 setVRToConst(vA, OpndSize_64, tmpValue); 1167 compileTable[entry].refCount--; 1168 #ifdef DEBUG_CONST 1169 LOGD("getConstInfo: set VR %d to %x", vA+1, infoArray[entry].value[0]); 1170 #endif 1171 return true; 1172 #ifdef SUPPORT_HLO 1173 case OP_X_AGET_QUICK: 1174 case OP_X_AGET_OBJECT_QUICK: 1175 case OP_X_AGET_BOOLEAN_QUICK: 1176 case OP_X_AGET_BYTE_QUICK: 1177 case OP_X_AGET_CHAR_QUICK: 1178 case OP_X_AGET_SHORT_QUICK: 1179 vA = FETCH(1) & 0xff; 1180 constWorklist[num_const_worklist] = vA; 1181 num_const_worklist++; 1182 return false; 1183 case OP_X_AGET_WIDE_QUICK: 1184 vA = FETCH(1) & 0xff; 1185 constWorklist[num_const_worklist] = vA; 1186 num_const_worklist++; 1187 constWorklist[num_const_worklist] = vA+1; 1188 num_const_worklist++; 1189 return false; 1190 case OP_X_DEREF_GET: 1191 case OP_X_DEREF_GET_OBJECT: 1192 case OP_X_DEREF_GET_BOOLEAN: 1193 case OP_X_DEREF_GET_BYTE: 1194 case OP_X_DEREF_GET_CHAR: 1195 case OP_X_DEREF_GET_SHORT: 1196 vA = FETCH(1) & 0xff; 1197 constWorklist[num_const_worklist] = vA; 1198 num_const_worklist++; 1199 return false; 1200 case OP_X_DEREF_GET_WIDE: 1201 vA = FETCH(1) & 0xff; 1202 constWorklist[num_const_worklist] = vA; 1203 num_const_worklist++; 1204 constWorklist[num_const_worklist] = vA+1; 1205 num_const_worklist++; 1206 return false; 1207 #endif 1208 } 1209 return false; 1210 } 1211 1212 //! This function updates infoArray with virtual registers accessed when lowering the bytecode, and returns size of the bytecode in unit of u2 1213 1214 //! uses of virtual registers are added to infoArray first 1215 int getVirtualRegInfo(VirtualRegInfo* infoArray) { 1216 u2 inst_op = INST_INST(inst); 1217 u2 vA = 0, vB = 0, vref, vindex; 1218 u2 v1, v2, length, vD, vG, vE, vF, count; 1219 u4 v1_u4, v2_u4; 1220 int kk, num, num_entry; 1221 s4 tmp_s4; 1222 s2 tmp_s2; 1223 u4 tmp_u4; 1224 int codeSize = 0; 1225 num_regs_per_bytecode = 0; 1226 //update infoArray[xx].allocConstraints 1227 for(num = 0; num < MAX_REG_PER_BYTECODE; num++) { 1228 for(kk = 0; kk < 8; kk++) { 1229 infoArray[num].allocConstraints[kk].physicalReg = (PhysicalReg)kk; 1230 infoArray[num].allocConstraints[kk].count = 0; 1231 } 1232 } 1233 1234 switch (inst_op) { 1235 case OP_NOP: 1236 codeSize = 1; 1237 break; 1238 case OP_MOVE: 1239 case OP_MOVE_OBJECT: 1240 case OP_MOVE_FROM16: 1241 case OP_MOVE_OBJECT_FROM16: 1242 case OP_MOVE_16: 1243 case OP_MOVE_OBJECT_16: 1244 if(inst_op == OP_MOVE || inst_op == OP_MOVE_OBJECT) { 1245 vA = INST_A(inst); 1246 vB = INST_B(inst); 1247 codeSize = 1; 1248 } 1249 else if(inst_op == OP_MOVE_FROM16 || inst_op == OP_MOVE_OBJECT_FROM16) { 1250 vA = INST_AA(inst); 1251 vB = FETCH(1); 1252 codeSize = 2; 1253 } 1254 else if(inst_op == OP_MOVE_16 || inst_op == OP_MOVE_OBJECT_16) { 1255 vA = FETCH(1); 1256 vB = FETCH(2); 1257 codeSize = 3; 1258 } 1259 infoArray[1].regNum = vA; //dst 1260 infoArray[1].refCount = 1; 1261 infoArray[1].accessType = REGACCESS_D; 1262 infoArray[1].physicalType = LowOpndRegType_gp; 1263 infoArray[0].regNum = vB; //src 1264 infoArray[0].refCount = 1; 1265 infoArray[0].accessType = REGACCESS_U; 1266 infoArray[0].physicalType = LowOpndRegType_gp; 1267 num_regs_per_bytecode = 2; 1268 break; 1269 case OP_MOVE_WIDE: 1270 case OP_MOVE_WIDE_FROM16: 1271 case OP_MOVE_WIDE_16: 1272 if(inst_op == OP_MOVE_WIDE) { 1273 vA = INST_A(inst); 1274 vB = INST_B(inst); 1275 codeSize = 1; 1276 } 1277 else if(inst_op == OP_MOVE_WIDE_FROM16) { 1278 vA = INST_AA(inst); 1279 vB = FETCH(1); 1280 codeSize = 2; 1281 } 1282 else if(inst_op == OP_MOVE_WIDE_16) { 1283 vA = FETCH(1); 1284 vB = FETCH(2); 1285 codeSize = 3; 1286 } 1287 infoArray[1].regNum = vA; //dst 1288 infoArray[1].refCount = 1; 1289 infoArray[1].accessType = REGACCESS_D; 1290 infoArray[1].physicalType = LowOpndRegType_xmm; 1291 infoArray[0].regNum = vB; //src 1292 infoArray[0].refCount = 1; 1293 infoArray[0].accessType = REGACCESS_U; 1294 infoArray[0].physicalType = LowOpndRegType_xmm; 1295 num_regs_per_bytecode = 2; 1296 break; 1297 case OP_MOVE_RESULT: //access memory 1298 case OP_MOVE_RESULT_OBJECT: 1299 vA = INST_AA(inst); 1300 infoArray[0].regNum = vA; //dst 1301 infoArray[0].refCount = 1; 1302 infoArray[0].accessType = REGACCESS_D; 1303 infoArray[0].physicalType = LowOpndRegType_gp; 1304 codeSize = 1; 1305 num_regs_per_bytecode = 1; 1306 break; 1307 case OP_MOVE_RESULT_WIDE: //note: 2 destinations 1308 vA = INST_AA(inst); 1309 infoArray[0].regNum = vA; //dst 1310 infoArray[0].refCount = 1; 1311 infoArray[0].accessType = REGACCESS_D; 1312 infoArray[0].physicalType = LowOpndRegType_xmm; 1313 codeSize = 1; 1314 num_regs_per_bytecode = 1; 1315 break; 1316 case OP_MOVE_EXCEPTION: //access memory 1317 vA = INST_AA(inst); 1318 infoArray[0].regNum = vA; //dst 1319 infoArray[0].refCount = 1; 1320 infoArray[0].accessType = REGACCESS_D; 1321 infoArray[0].physicalType = LowOpndRegType_gp; 1322 codeSize = 1; 1323 num_regs_per_bytecode = 1; 1324 break; 1325 case OP_RETURN_VOID: 1326 case OP_RETURN_VOID_BARRIER: 1327 codeSize = 1; 1328 updateCurrentBBWithConstraints(PhysicalReg_EAX); 1329 num_regs_per_bytecode = 0; 1330 break; 1331 case OP_RETURN: 1332 case OP_RETURN_OBJECT: 1333 vA = INST_AA(inst); 1334 codeSize = 1; 1335 infoArray[0].regNum = vA; //src 1336 infoArray[0].refCount = 1; 1337 infoArray[0].accessType = REGACCESS_U; 1338 infoArray[0].physicalType = LowOpndRegType_gp; 1339 updateCurrentBBWithConstraints(PhysicalReg_EAX); 1340 num_regs_per_bytecode = 1; 1341 break; 1342 case OP_RETURN_WIDE: 1343 vA = INST_AA(inst); 1344 infoArray[0].regNum = vA; //src 1345 infoArray[0].refCount = 1; 1346 infoArray[0].accessType = REGACCESS_U; 1347 infoArray[0].physicalType = LowOpndRegType_xmm; 1348 num_regs_per_bytecode = 1; 1349 codeSize = 1; 1350 break; 1351 case OP_CONST_4: 1352 vA = INST_A(inst); 1353 tmp_s4 = (s4) (INST_B(inst) << 28) >> 28; 1354 infoArray[0].regNum = vA; //dst 1355 infoArray[0].refCount = 1; 1356 infoArray[0].accessType = REGACCESS_D; 1357 infoArray[0].physicalType = LowOpndRegType_gp; 1358 num_regs_per_bytecode = 1; 1359 codeSize = 1; 1360 break; 1361 case OP_CONST_16: 1362 vA = INST_AA(inst); 1363 infoArray[0].regNum = vA; //dst 1364 infoArray[0].refCount = 1; 1365 infoArray[0].accessType = REGACCESS_D; 1366 infoArray[0].physicalType = LowOpndRegType_gp; 1367 num_regs_per_bytecode = 1; 1368 codeSize = 2; 1369 break; 1370 case OP_CONST: 1371 vA = INST_AA(inst); 1372 tmp_u4 = FETCH(1); 1373 tmp_u4 |= (u4)FETCH(2) << 16; 1374 infoArray[0].regNum = vA; //dst 1375 infoArray[0].refCount = 1; 1376 infoArray[0].accessType = REGACCESS_D; 1377 infoArray[0].physicalType = LowOpndRegType_gp; 1378 num_regs_per_bytecode = 1; 1379 codeSize = 3; 1380 break; 1381 case OP_CONST_HIGH16: 1382 vA = INST_AA(inst); 1383 infoArray[0].regNum = vA; //dst 1384 infoArray[0].refCount = 1; 1385 infoArray[0].accessType = REGACCESS_D; 1386 infoArray[0].physicalType = LowOpndRegType_gp; 1387 num_regs_per_bytecode = 1; 1388 codeSize = 2; 1389 break; 1390 case OP_CONST_WIDE_16: 1391 vA = INST_AA(inst); 1392 infoArray[0].regNum = vA; //dst 1393 infoArray[0].refCount = 1; 1394 infoArray[0].accessType = REGACCESS_D; 1395 infoArray[0].physicalType = LowOpndRegType_gp; 1396 infoArray[1].regNum = vA+1; 1397 infoArray[1].refCount = 1; 1398 infoArray[1].accessType = REGACCESS_D; 1399 infoArray[1].physicalType = LowOpndRegType_gp; 1400 codeSize = 2; 1401 num_regs_per_bytecode = 2; 1402 break; 1403 case OP_CONST_WIDE_32: 1404 vA = INST_AA(inst); 1405 tmp_u4 = FETCH(1); 1406 tmp_u4 |= (u4)FETCH(2) << 16; 1407 infoArray[0].regNum = vA; //dst 1408 infoArray[0].refCount = 1; 1409 infoArray[0].accessType = REGACCESS_D; 1410 infoArray[0].physicalType = LowOpndRegType_gp; 1411 infoArray[1].regNum = vA+1; 1412 infoArray[1].refCount = 1; 1413 infoArray[1].accessType = REGACCESS_D; 1414 infoArray[1].physicalType = LowOpndRegType_gp; 1415 num_regs_per_bytecode = 2; 1416 codeSize = 3; 1417 break; 1418 case OP_CONST_WIDE: 1419 vA = INST_AA(inst); 1420 tmp_u4 = FETCH(1); 1421 tmp_u4 |= (u8)FETCH(2) << 16; 1422 infoArray[0].regNum = vA; //dst 1423 infoArray[0].refCount = 1; 1424 infoArray[0].accessType = REGACCESS_D; 1425 infoArray[0].physicalType = LowOpndRegType_gp; 1426 tmp_u4 = (u8)FETCH(3); 1427 tmp_u4 |= (u8)FETCH(4) << 16; 1428 infoArray[1].regNum = vA+1; 1429 infoArray[1].refCount = 1; 1430 infoArray[1].accessType = REGACCESS_D; 1431 infoArray[1].physicalType = LowOpndRegType_gp; 1432 codeSize = 5; 1433 num_regs_per_bytecode = 2; 1434 break; 1435 case OP_CONST_WIDE_HIGH16: 1436 vA = INST_AA(inst); 1437 infoArray[0].regNum = vA; //dst 1438 infoArray[0].refCount = 1; 1439 infoArray[0].accessType = REGACCESS_D; 1440 infoArray[0].physicalType = LowOpndRegType_gp; 1441 infoArray[1].regNum = vA+1; 1442 infoArray[1].refCount = 1; 1443 infoArray[1].accessType = REGACCESS_D; 1444 infoArray[1].physicalType = LowOpndRegType_gp; 1445 num_regs_per_bytecode = 2; 1446 codeSize = 2; 1447 break; 1448 case OP_CONST_STRING: 1449 case OP_CONST_STRING_JUMBO: 1450 case OP_CONST_CLASS: 1451 vA = INST_AA(inst); 1452 if(inst_op == OP_CONST_STRING || inst_op == OP_CONST_CLASS) 1453 codeSize = 2; 1454 else if(inst_op == OP_CONST_STRING_JUMBO) 1455 codeSize = 3; 1456 infoArray[0].regNum = vA; //dst 1457 infoArray[0].refCount = 1; 1458 infoArray[0].accessType = REGACCESS_D; 1459 infoArray[0].physicalType = LowOpndRegType_gp; 1460 infoArray[0].allocConstraints[PhysicalReg_EAX].count = 1; 1461 updateCurrentBBWithConstraints(PhysicalReg_EAX); 1462 num_regs_per_bytecode = 1; 1463 break; 1464 case OP_MONITOR_ENTER: 1465 vA = INST_AA(inst); 1466 codeSize = 1; 1467 infoArray[0].regNum = vA; //src 1468 infoArray[0].refCount = 1; 1469 infoArray[0].accessType = REGACCESS_U; 1470 infoArray[0].physicalType = LowOpndRegType_gp; 1471 num_regs_per_bytecode = 1; 1472 break; 1473 case OP_MONITOR_EXIT: 1474 vA = INST_AA(inst); 1475 codeSize = 1; 1476 infoArray[0].regNum = vA; //src 1477 infoArray[0].refCount = 1; 1478 infoArray[0].accessType = REGACCESS_U; 1479 infoArray[0].physicalType = LowOpndRegType_gp; 1480 updateCurrentBBWithConstraints(PhysicalReg_EAX); //eax is used as return value from c function 1481 updateCurrentBBWithConstraints(PhysicalReg_EDX); 1482 num_regs_per_bytecode = 1; 1483 break; 1484 case OP_CHECK_CAST: 1485 codeSize = 2; 1486 vA = INST_AA(inst); 1487 infoArray[0].regNum = vA; //src 1488 infoArray[0].refCount = 1; 1489 infoArray[0].accessType = REGACCESS_U; 1490 infoArray[0].physicalType = LowOpndRegType_gp; 1491 updateCurrentBBWithConstraints(PhysicalReg_EAX); 1492 updateCurrentBBWithConstraints(PhysicalReg_ECX); 1493 updateCurrentBBWithConstraints(PhysicalReg_EDX); 1494 num_regs_per_bytecode = 1; 1495 break; 1496 case OP_INSTANCE_OF: 1497 codeSize = 2; 1498 vA = INST_A(inst); 1499 vB = INST_B(inst); 1500 infoArray[0].regNum = vB; //src 1501 infoArray[0].refCount = 1; 1502 infoArray[0].accessType = REGACCESS_U; 1503 infoArray[0].physicalType = LowOpndRegType_gp; 1504 infoArray[1].regNum = vA; //dst 1505 infoArray[1].refCount = 1; 1506 infoArray[1].accessType = REGACCESS_D; 1507 infoArray[1].physicalType = LowOpndRegType_gp; 1508 updateCurrentBBWithConstraints(PhysicalReg_EAX); 1509 num_regs_per_bytecode = 2; 1510 break; 1511 case OP_ARRAY_LENGTH: 1512 vA = INST_A(inst); 1513 vB = INST_B(inst); 1514 codeSize = 1; 1515 infoArray[0].regNum = vB; //src 1516 infoArray[0].refCount = 1; 1517 infoArray[0].accessType = REGACCESS_U; 1518 infoArray[0].physicalType = LowOpndRegType_gp; 1519 infoArray[1].regNum = vA; //dst 1520 infoArray[1].refCount = 1; 1521 infoArray[1].accessType = REGACCESS_D; 1522 infoArray[1].physicalType = LowOpndRegType_gp; 1523 //%edx is used in this bytecode, update currentBB->allocConstraints 1524 updateCurrentBBWithConstraints(PhysicalReg_EDX); 1525 num_regs_per_bytecode = 2; 1526 break; 1527 case OP_NEW_INSTANCE: 1528 vA = INST_AA(inst); 1529 infoArray[0].regNum = vA; //dst 1530 infoArray[0].refCount = 1; 1531 infoArray[0].accessType = REGACCESS_D; 1532 infoArray[0].physicalType = LowOpndRegType_gp; 1533 infoArray[0].allocConstraints[PhysicalReg_EAX].count = 1; 1534 updateCurrentBBWithConstraints(PhysicalReg_EAX); 1535 updateCurrentBBWithConstraints(PhysicalReg_ECX); 1536 updateCurrentBBWithConstraints(PhysicalReg_EDX); 1537 num_regs_per_bytecode = 1; 1538 codeSize = 2; 1539 break; 1540 case OP_NEW_ARRAY: 1541 vA = INST_A(inst); //destination 1542 vB = INST_B(inst); //length 1543 infoArray[0].regNum = vB; //src 1544 infoArray[0].refCount = 1; 1545 infoArray[0].accessType = REGACCESS_U; 1546 infoArray[0].physicalType = LowOpndRegType_gp; 1547 infoArray[1].regNum = vA; //dst 1548 infoArray[1].refCount = 1; 1549 infoArray[1].accessType = REGACCESS_D; 1550 infoArray[1].physicalType = LowOpndRegType_gp; 1551 infoArray[1].allocConstraints[PhysicalReg_EAX].count = 1; 1552 updateCurrentBBWithConstraints(PhysicalReg_EAX); 1553 updateCurrentBBWithConstraints(PhysicalReg_EDX); 1554 num_regs_per_bytecode = 2; 1555 codeSize = 2; 1556 break; 1557 case OP_FILLED_NEW_ARRAY: {//update return value 1558 //can use up to 5 registers to fill the content of array 1559 length = INST_B(inst); 1560 u2 vv = FETCH(2); 1561 v1 = vv & 0xf; 1562 v2 = (vv >> 4) & 0xf; 1563 u2 v3 = (vv >> 8) & 0xf; 1564 u2 v4 = (vv >> 12) & 0xf; 1565 u2 v5 = INST_A(inst); 1566 if(length >= 1) { 1567 infoArray[0].regNum = v1; //src 1568 infoArray[0].refCount = 1; 1569 infoArray[0].accessType = REGACCESS_U; 1570 infoArray[0].physicalType = LowOpndRegType_gp; 1571 } 1572 if(length >= 2) { 1573 infoArray[1].regNum = v2; //src 1574 infoArray[1].refCount = 1; 1575 infoArray[1].accessType = REGACCESS_U; 1576 infoArray[1].physicalType = LowOpndRegType_gp; 1577 } 1578 if(length >= 3) { 1579 infoArray[2].regNum = v3; //src 1580 infoArray[2].refCount = 1; 1581 infoArray[2].accessType = REGACCESS_U; 1582 infoArray[2].physicalType = LowOpndRegType_gp; 1583 } 1584 if(length >= 4) { 1585 infoArray[3].regNum = v4; //src 1586 infoArray[3].refCount = 1; 1587 infoArray[3].accessType = REGACCESS_U; 1588 infoArray[3].physicalType = LowOpndRegType_gp; 1589 } 1590 if(length >= 5) { 1591 infoArray[4].regNum = v5; //src 1592 infoArray[4].refCount = 1; 1593 infoArray[4].accessType = REGACCESS_U; 1594 infoArray[4].physicalType = LowOpndRegType_gp; 1595 } 1596 updateCurrentBBWithConstraints(PhysicalReg_EAX); 1597 updateCurrentBBWithConstraints(PhysicalReg_EDX); 1598 num_regs_per_bytecode = length; 1599 codeSize = 3; 1600 break; 1601 } 1602 case OP_FILLED_NEW_ARRAY_RANGE: {//use "length" virtual registers 1603 length = INST_AA(inst); 1604 u4 vC = (u4)FETCH(2); 1605 for(kk = 0; kk < length; kk++) { 1606 infoArray[kk].regNum = vC+kk; //src 1607 infoArray[kk].refCount = 1; 1608 infoArray[kk].accessType = REGACCESS_U; 1609 infoArray[kk].physicalType = LowOpndRegType_gp; 1610 } 1611 updateCurrentBBWithConstraints(PhysicalReg_EAX); 1612 updateCurrentBBWithConstraints(PhysicalReg_EDX); 1613 num_regs_per_bytecode = length; 1614 codeSize = 3; 1615 break; 1616 } 1617 case OP_FILL_ARRAY_DATA: //update content of array, read memory 1618 vA = INST_AA(inst); //use virtual register, but has side-effect, update memory 1619 infoArray[0].regNum = vA; //use 1620 infoArray[0].refCount = 1; 1621 infoArray[0].accessType = REGACCESS_U; 1622 infoArray[0].physicalType = LowOpndRegType_gp; 1623 updateCurrentBBWithConstraints(PhysicalReg_EAX); 1624 updateCurrentBBWithConstraints(PhysicalReg_EDX); 1625 num_regs_per_bytecode = 1; 1626 codeSize = 3; 1627 break; 1628 case OP_THROW: //update glue->exception 1629 vA = INST_AA(inst); 1630 infoArray[0].regNum = vA; //use 1631 infoArray[0].refCount = 1; 1632 infoArray[0].accessType = REGACCESS_U; 1633 infoArray[0].physicalType = LowOpndRegType_gp; 1634 updateCurrentBBWithConstraints(PhysicalReg_EDX); 1635 num_regs_per_bytecode = 1; 1636 codeSize = 1; 1637 break; 1638 case OP_THROW_VERIFICATION_ERROR: 1639 num_regs_per_bytecode = 0; 1640 codeSize = 2; 1641 break; 1642 case OP_GOTO: 1643 codeSize = 1; 1644 num_regs_per_bytecode = 0; 1645 break; 1646 case OP_GOTO_16: 1647 codeSize = 2; 1648 num_regs_per_bytecode = 0; 1649 break; 1650 case OP_GOTO_32: 1651 codeSize = 3; 1652 num_regs_per_bytecode = 0; 1653 break; 1654 case OP_PACKED_SWITCH: 1655 case OP_SPARSE_SWITCH: 1656 vA = INST_AA(inst); 1657 codeSize = 3; 1658 infoArray[0].regNum = vA; //use 1659 infoArray[0].refCount = 1; 1660 infoArray[0].accessType = REGACCESS_U; 1661 infoArray[0].physicalType = LowOpndRegType_gp; 1662 updateCurrentBBWithConstraints(PhysicalReg_EAX); 1663 updateCurrentBBWithConstraints(PhysicalReg_EDX); 1664 num_regs_per_bytecode = 1; 1665 break; 1666 1667 case OP_CMPL_FLOAT: //move 32 bits from memory to lower part of XMM register 1668 case OP_CMPG_FLOAT: 1669 codeSize = 2; 1670 vA = INST_AA(inst); 1671 v1_u4 = FETCH(1) & 0xff; 1672 v2_u4 = FETCH(1) >> 8; 1673 num_regs_per_bytecode = 1; 1674 infoArray[0].regNum = v1_u4; //use ss or sd CHECK 1675 infoArray[0].refCount = 1; 1676 infoArray[0].accessType = REGACCESS_U; 1677 infoArray[0].physicalType = LowOpndRegType_ss; 1678 infoArray[1].regNum = v2_u4; //use 1679 infoArray[1].refCount = 1; 1680 infoArray[1].accessType = REGACCESS_U; 1681 infoArray[1].physicalType = LowOpndRegType_ss; 1682 num_regs_per_bytecode = 3; 1683 num_entry = 2; 1684 infoArray[num_entry].regNum = vA; //define 1685 infoArray[num_entry].refCount = 1; 1686 infoArray[num_entry].accessType = REGACCESS_D; 1687 infoArray[num_entry].physicalType = LowOpndRegType_gp; 1688 break; 1689 case OP_CMPL_DOUBLE: //move 64 bits from memory to lower part of XMM register 1690 case OP_CMPG_DOUBLE: 1691 case OP_CMP_LONG: //load v1, v1+1, v2, v2+1 to gpr 1692 codeSize = 2; 1693 vA = INST_AA(inst); 1694 v1_u4 = FETCH(1) & 0xff; 1695 v2_u4 = FETCH(1) >> 8; 1696 num_regs_per_bytecode = 1; 1697 if(inst_op == OP_CMP_LONG) { 1698 infoArray[0].regNum = v1_u4; //use 1699 infoArray[0].refCount = 1; 1700 infoArray[0].accessType = REGACCESS_U; 1701 infoArray[0].physicalType = LowOpndRegType_gp; 1702 infoArray[1].regNum = v1_u4 + 1; //use 1703 infoArray[1].refCount = 1; 1704 infoArray[1].accessType = REGACCESS_U; 1705 infoArray[1].physicalType = LowOpndRegType_gp; 1706 infoArray[2].regNum = v2_u4; //use 1707 infoArray[2].refCount = 1; 1708 infoArray[2].accessType = REGACCESS_U; 1709 infoArray[2].physicalType = LowOpndRegType_gp; 1710 infoArray[3].regNum = v2_u4 + 1; //use 1711 infoArray[3].refCount = 1; 1712 infoArray[3].accessType = REGACCESS_U; 1713 infoArray[3].physicalType = LowOpndRegType_gp; 1714 num_regs_per_bytecode = 5; 1715 num_entry = 4; 1716 infoArray[num_entry].regNum = vA; //define 1717 infoArray[num_entry].refCount = 2; 1718 infoArray[num_entry].accessType = REGACCESS_D; 1719 infoArray[num_entry].physicalType = LowOpndRegType_gp; 1720 } 1721 else { 1722 infoArray[0].regNum = v1_u4; //use ss or sd CHECK 1723 infoArray[0].refCount = 1; 1724 infoArray[0].accessType = REGACCESS_U; 1725 infoArray[0].physicalType = LowOpndRegType_xmm; 1726 infoArray[1].regNum = v2_u4; //use 1727 infoArray[1].refCount = 1; 1728 infoArray[1].accessType = REGACCESS_U; 1729 infoArray[1].physicalType = LowOpndRegType_xmm; 1730 num_regs_per_bytecode = 3; 1731 num_entry = 2; 1732 infoArray[num_entry].regNum = vA; //define 1733 infoArray[num_entry].refCount = 1; 1734 infoArray[num_entry].accessType = REGACCESS_D; 1735 infoArray[num_entry].physicalType = LowOpndRegType_gp; 1736 } 1737 break; 1738 case OP_IF_EQ: 1739 case OP_IF_NE: 1740 case OP_IF_LT: 1741 case OP_IF_GE: 1742 case OP_IF_GT: 1743 case OP_IF_LE: 1744 vA = INST_A(inst); 1745 vB = INST_B(inst); 1746 infoArray[0].regNum = vA; //use 1747 infoArray[0].refCount = 1; 1748 infoArray[0].accessType = REGACCESS_U; 1749 infoArray[0].physicalType = LowOpndRegType_gp; 1750 infoArray[1].regNum = vB; 1751 infoArray[1].refCount = 1; 1752 infoArray[1].accessType = REGACCESS_U; 1753 infoArray[1].physicalType = LowOpndRegType_gp; 1754 num_regs_per_bytecode = 2; 1755 codeSize =12; 1756 break; 1757 case OP_IF_EQZ: 1758 case OP_IF_NEZ: 1759 case OP_IF_LTZ: 1760 case OP_IF_GEZ: 1761 case OP_IF_GTZ: 1762 case OP_IF_LEZ: 1763 vA = INST_AA(inst); 1764 infoArray[0].regNum = vA; //use 1765 infoArray[0].refCount = 1; 1766 infoArray[0].accessType = REGACCESS_U; 1767 infoArray[0].physicalType = LowOpndRegType_gp; 1768 num_regs_per_bytecode = 1; 1769 codeSize = 2; 1770 break; 1771 case OP_AGET: 1772 codeSize = 2; 1773 case OP_AGET_WIDE: 1774 codeSize = 2; 1775 case OP_AGET_OBJECT: 1776 codeSize = 2; 1777 case OP_AGET_BOOLEAN: //movez 8 1778 codeSize = 2; 1779 case OP_AGET_BYTE: //moves 8 1780 codeSize = 2; 1781 case OP_AGET_CHAR: //movez 16 1782 codeSize = 2; 1783 case OP_AGET_SHORT: //moves 16 1784 codeSize = 2; 1785 vA = INST_AA(inst); 1786 vref = FETCH(1) & 0xff; 1787 vindex = FETCH(1) >> 8; 1788 if(inst_op == OP_AGET_WIDE) { 1789 infoArray[2].regNum = vA; 1790 infoArray[2].refCount = 1; 1791 infoArray[2].accessType = REGACCESS_D; 1792 infoArray[2].physicalType = LowOpndRegType_xmm; //64, 128 not used in lowering 1793 } else { 1794 infoArray[2].regNum = vA; 1795 infoArray[2].refCount = 1; 1796 infoArray[2].accessType = REGACCESS_D; 1797 infoArray[2].physicalType = LowOpndRegType_gp; 1798 } 1799 infoArray[0].regNum = vref; //use 1800 infoArray[0].refCount = 1; 1801 infoArray[0].accessType = REGACCESS_U; 1802 infoArray[0].physicalType = LowOpndRegType_gp; 1803 infoArray[1].regNum = vindex; //use 1804 infoArray[1].refCount = 1; 1805 infoArray[1].accessType = REGACCESS_U; 1806 infoArray[1].physicalType = LowOpndRegType_gp; 1807 num_regs_per_bytecode = 3; 1808 break; 1809 case OP_APUT: 1810 case OP_APUT_WIDE: 1811 case OP_APUT_OBJECT: 1812 case OP_APUT_BOOLEAN: 1813 case OP_APUT_BYTE: 1814 case OP_APUT_CHAR: 1815 case OP_APUT_SHORT: 1816 vA = INST_AA(inst); 1817 vref = FETCH(1) & 0xff; 1818 vindex = FETCH(1) >> 8; 1819 codeSize = 2; 1820 if(inst_op == OP_APUT_WIDE) { 1821 infoArray[0].regNum = vA; 1822 infoArray[0].refCount = 1; 1823 infoArray[0].accessType = REGACCESS_U; 1824 infoArray[0].physicalType = LowOpndRegType_xmm; //64, 128 not used in lowering 1825 } else { 1826 infoArray[0].regNum = vA; 1827 infoArray[0].refCount = 1; 1828 infoArray[0].accessType = REGACCESS_U; 1829 infoArray[0].physicalType = LowOpndRegType_gp; 1830 } 1831 infoArray[1].regNum = vref; //use 1832 infoArray[1].refCount = 1; 1833 infoArray[1].accessType = REGACCESS_U; 1834 infoArray[1].physicalType = LowOpndRegType_gp; 1835 infoArray[2].regNum = vindex; //use 1836 infoArray[2].refCount = 1; 1837 infoArray[2].accessType = REGACCESS_U; 1838 infoArray[2].physicalType = LowOpndRegType_gp; 1839 if(inst_op == OP_APUT_OBJECT) { 1840 updateCurrentBBWithConstraints(PhysicalReg_EAX); 1841 updateCurrentBBWithConstraints(PhysicalReg_EDX); 1842 } 1843 num_regs_per_bytecode = 3; 1844 break; 1845 1846 case OP_IGET: 1847 case OP_IGET_WIDE: 1848 case OP_IGET_OBJECT: 1849 case OP_IGET_VOLATILE: 1850 case OP_IGET_WIDE_VOLATILE: 1851 case OP_IGET_OBJECT_VOLATILE: 1852 case OP_IGET_BOOLEAN: 1853 case OP_IGET_BYTE: 1854 case OP_IGET_CHAR: 1855 case OP_IGET_SHORT: 1856 case OP_IGET_QUICK: 1857 case OP_IGET_WIDE_QUICK: 1858 case OP_IGET_OBJECT_QUICK: 1859 vA = INST_A(inst); 1860 vB = INST_B(inst); 1861 codeSize = 2; 1862 if(inst_op == OP_IGET_WIDE || inst_op == OP_IGET_WIDE_QUICK) { 1863 infoArray[1].regNum = vA; 1864 infoArray[1].refCount = 1; 1865 infoArray[1].accessType = REGACCESS_D; 1866 infoArray[1].physicalType = LowOpndRegType_xmm; //64 1867 } else if(inst_op == OP_IGET_WIDE_VOLATILE) { 1868 infoArray[1].regNum = vA; 1869 infoArray[1].refCount = 1; 1870 infoArray[1].accessType = REGACCESS_D; 1871 infoArray[1].physicalType = LowOpndRegType_gp; 1872 infoArray[2].regNum = vA+1; 1873 infoArray[2].refCount = 1; 1874 infoArray[2].accessType = REGACCESS_D; 1875 infoArray[2].physicalType = LowOpndRegType_gp; 1876 } else { 1877 infoArray[1].regNum = vA; 1878 infoArray[1].refCount = 1; 1879 infoArray[1].accessType = REGACCESS_D; 1880 infoArray[1].physicalType = LowOpndRegType_gp; 1881 } 1882 infoArray[0].regNum = vB; //object instance 1883 infoArray[0].refCount = 1; 1884 infoArray[0].accessType = REGACCESS_U; 1885 infoArray[0].physicalType = LowOpndRegType_gp; 1886 updateCurrentBBWithConstraints(PhysicalReg_EAX); 1887 updateCurrentBBWithConstraints(PhysicalReg_EDX); 1888 if(inst_op == OP_IGET_WIDE_VOLATILE) 1889 num_regs_per_bytecode = 3; 1890 else 1891 num_regs_per_bytecode = 2; 1892 break; 1893 case OP_IPUT: 1894 case OP_IPUT_WIDE: 1895 case OP_IPUT_OBJECT: 1896 case OP_IPUT_VOLATILE: 1897 case OP_IPUT_WIDE_VOLATILE: 1898 case OP_IPUT_OBJECT_VOLATILE: 1899 case OP_IPUT_BOOLEAN: 1900 case OP_IPUT_BYTE: 1901 case OP_IPUT_CHAR: 1902 case OP_IPUT_SHORT: 1903 case OP_IPUT_QUICK: 1904 case OP_IPUT_WIDE_QUICK: 1905 case OP_IPUT_OBJECT_QUICK: 1906 vA = INST_A(inst); 1907 vB = INST_B(inst); 1908 codeSize = 2; 1909 if(inst_op == OP_IPUT_WIDE || inst_op == OP_IPUT_WIDE_QUICK || inst_op == OP_IPUT_WIDE_VOLATILE) { 1910 infoArray[0].regNum = vA; 1911 infoArray[0].refCount = 1; 1912 infoArray[0].accessType = REGACCESS_U; 1913 infoArray[0].physicalType = LowOpndRegType_xmm; //64 1914 } else { 1915 infoArray[0].regNum = vA; 1916 infoArray[0].refCount = 1; 1917 infoArray[0].accessType = REGACCESS_U; 1918 infoArray[0].physicalType = LowOpndRegType_gp; 1919 } 1920 infoArray[1].regNum = vB; //object instance 1921 infoArray[1].refCount = 1; 1922 infoArray[1].accessType = REGACCESS_U; 1923 infoArray[1].physicalType = LowOpndRegType_gp; 1924 updateCurrentBBWithConstraints(PhysicalReg_EAX); 1925 updateCurrentBBWithConstraints(PhysicalReg_EDX); 1926 num_regs_per_bytecode = 2; 1927 break; 1928 case OP_SGET: 1929 case OP_SGET_WIDE: 1930 case OP_SGET_OBJECT: 1931 case OP_SGET_VOLATILE: 1932 case OP_SGET_WIDE_VOLATILE: 1933 case OP_SGET_OBJECT_VOLATILE: 1934 case OP_SGET_BOOLEAN: 1935 case OP_SGET_BYTE: 1936 case OP_SGET_CHAR: 1937 case OP_SGET_SHORT: 1938 vA = INST_AA(inst); 1939 codeSize = 2; 1940 if(inst_op == OP_SGET_WIDE) { 1941 infoArray[0].regNum = vA; 1942 infoArray[0].refCount = 1; 1943 infoArray[0].accessType = REGACCESS_D; 1944 infoArray[0].physicalType = LowOpndRegType_xmm; //64 1945 } else if(inst_op == OP_SGET_WIDE_VOLATILE) { 1946 infoArray[0].regNum = vA; 1947 infoArray[0].refCount = 1; 1948 infoArray[0].accessType = REGACCESS_D; 1949 infoArray[0].physicalType = LowOpndRegType_gp; 1950 infoArray[1].regNum = vA+1; 1951 infoArray[1].refCount = 1; 1952 infoArray[1].accessType = REGACCESS_D; 1953 infoArray[1].physicalType = LowOpndRegType_gp; 1954 } else { 1955 infoArray[0].regNum = vA; 1956 infoArray[0].refCount = 1; 1957 infoArray[0].accessType = REGACCESS_D; 1958 infoArray[0].physicalType = LowOpndRegType_gp; 1959 } 1960 if(inst_op == OP_SGET_WIDE_VOLATILE) 1961 num_regs_per_bytecode = 2; 1962 else 1963 num_regs_per_bytecode = 1; 1964 updateCurrentBBWithConstraints(PhysicalReg_EAX); 1965 break; 1966 case OP_SPUT: 1967 case OP_SPUT_WIDE: 1968 case OP_SPUT_OBJECT: 1969 case OP_SPUT_VOLATILE: 1970 case OP_SPUT_WIDE_VOLATILE: 1971 case OP_SPUT_OBJECT_VOLATILE: 1972 case OP_SPUT_BOOLEAN: 1973 case OP_SPUT_BYTE: 1974 case OP_SPUT_CHAR: 1975 case OP_SPUT_SHORT: 1976 vA = INST_AA(inst); 1977 codeSize = 2; 1978 if(inst_op == OP_SPUT_WIDE || inst_op == OP_SPUT_WIDE_VOLATILE) { 1979 infoArray[0].regNum = vA; 1980 infoArray[0].refCount = 1; 1981 infoArray[0].accessType = REGACCESS_U; 1982 infoArray[0].physicalType = LowOpndRegType_xmm; //64 1983 } else { 1984 infoArray[0].regNum = vA; 1985 infoArray[0].refCount = 1; 1986 infoArray[0].accessType = REGACCESS_U; 1987 infoArray[0].physicalType = LowOpndRegType_gp; 1988 } 1989 updateCurrentBBWithConstraints(PhysicalReg_EAX); 1990 num_regs_per_bytecode = 1; 1991 break; 1992 1993 case OP_INVOKE_VIRTUAL: 1994 case OP_INVOKE_SUPER: 1995 case OP_INVOKE_DIRECT: 1996 case OP_INVOKE_STATIC: 1997 case OP_INVOKE_INTERFACE: 1998 case OP_INVOKE_VIRTUAL_QUICK: 1999 case OP_INVOKE_SUPER_QUICK: 2000 codeSize = 3; 2001 vD = FETCH(2) & 0xf; //object for virtual,direct & interface 2002 count = INST_B(inst); 2003 vE = (FETCH(2) >> 4) & 0xf; 2004 vF = (FETCH(2) >> 8) & 0xf; 2005 vG = (FETCH(2) >> 12) & 0xf; 2006 vA = INST_A(inst); //5th argument 2007 if(count == 0) { 2008 if(inst_op == OP_INVOKE_VIRTUAL || inst_op == OP_INVOKE_DIRECT || 2009 inst_op == OP_INVOKE_INTERFACE || inst_op == OP_INVOKE_VIRTUAL_QUICK || 2010 inst_op == OP_INVOKE_SUPER_QUICK) { 2011 infoArray[0].regNum = vD; 2012 infoArray[0].refCount = 1; 2013 infoArray[0].accessType = REGACCESS_U; 2014 infoArray[0].physicalType = LowOpndRegType_gp; 2015 num_regs_per_bytecode = 1; 2016 } 2017 num_regs_per_bytecode = 0; 2018 } 2019 else num_regs_per_bytecode = count; 2020 if(count >= 1) { 2021 infoArray[0].regNum = vD; 2022 if(inst_op == OP_INVOKE_VIRTUAL_QUICK || 2023 inst_op == OP_INVOKE_SUPER_QUICK) { 2024 infoArray[0].refCount = 2; 2025 } else if(inst_op == OP_INVOKE_VIRTUAL || inst_op == OP_INVOKE_DIRECT || inst_op == OP_INVOKE_INTERFACE) { 2026 infoArray[0].refCount = 2; 2027 } else { 2028 infoArray[0].refCount = 1; 2029 } 2030 infoArray[0].accessType = REGACCESS_U; 2031 infoArray[0].physicalType = LowOpndRegType_gp; 2032 } 2033 if(count >= 2) { 2034 infoArray[1].regNum = vE; 2035 infoArray[1].refCount = 1; 2036 infoArray[1].accessType = REGACCESS_U; 2037 infoArray[1].physicalType = LowOpndRegType_gp; 2038 } 2039 if(count >= 3) { 2040 infoArray[2].regNum = vF; 2041 infoArray[2].refCount = 1; 2042 infoArray[2].accessType = REGACCESS_U; 2043 infoArray[2].physicalType = LowOpndRegType_gp; 2044 } 2045 if(count >= 4) { 2046 infoArray[3].regNum = vG; 2047 infoArray[3].refCount = 1; 2048 infoArray[3].accessType = REGACCESS_U; 2049 infoArray[3].physicalType = LowOpndRegType_gp; 2050 } 2051 if(count >= 5) { 2052 infoArray[4].regNum = vA; 2053 infoArray[4].refCount = 1; 2054 infoArray[4].accessType = REGACCESS_U; 2055 infoArray[4].physicalType = LowOpndRegType_gp; 2056 } 2057 if(inst_op != OP_INVOKE_VIRTUAL_QUICK && inst_op != OP_INVOKE_SUPER_QUICK) 2058 updateCurrentBBWithConstraints(PhysicalReg_EAX); 2059 updateCurrentBBWithConstraints(PhysicalReg_ECX); 2060 updateCurrentBBWithConstraints(PhysicalReg_EDX); 2061 break; 2062 case OP_INVOKE_VIRTUAL_RANGE: 2063 case OP_INVOKE_SUPER_RANGE: 2064 case OP_INVOKE_DIRECT_RANGE: 2065 case OP_INVOKE_STATIC_RANGE: 2066 case OP_INVOKE_INTERFACE_RANGE: 2067 case OP_INVOKE_VIRTUAL_QUICK_RANGE: 2068 case OP_INVOKE_SUPER_QUICK_RANGE: 2069 codeSize = 3; 2070 vD = FETCH(2); 2071 count = INST_AA(inst); 2072 if(count == 0) { 2073 if(inst_op == OP_INVOKE_VIRTUAL_RANGE || inst_op == OP_INVOKE_DIRECT_RANGE || 2074 inst_op == OP_INVOKE_INTERFACE_RANGE || inst_op == OP_INVOKE_VIRTUAL_QUICK_RANGE || 2075 inst_op == OP_INVOKE_SUPER_QUICK_RANGE) { 2076 infoArray[0].regNum = vD; 2077 infoArray[0].refCount = 1; 2078 infoArray[0].accessType = REGACCESS_U; 2079 infoArray[0].physicalType = LowOpndRegType_gp; 2080 } 2081 } 2082 if(count > 0) { //same for count > 10 2083 for(kk = 0; kk < count; kk++) { 2084 infoArray[kk].regNum = vD+kk; //src 2085 if(kk == 0 && (inst_op == OP_INVOKE_VIRTUAL_QUICK_RANGE || 2086 inst_op == OP_INVOKE_SUPER_QUICK_RANGE)) 2087 infoArray[kk].refCount = 2; 2088 else if(kk == 0 && (inst_op == OP_INVOKE_VIRTUAL_RANGE || 2089 inst_op == OP_INVOKE_DIRECT_RANGE || 2090 inst_op == OP_INVOKE_INTERFACE_RANGE)) 2091 infoArray[kk].refCount = 2; 2092 else 2093 infoArray[kk].refCount = 1; 2094 infoArray[kk].accessType = REGACCESS_U; 2095 infoArray[kk].physicalType = LowOpndRegType_gp; 2096 } 2097 } 2098 if(inst_op != OP_INVOKE_VIRTUAL_QUICK_RANGE && inst_op != OP_INVOKE_SUPER_QUICK_RANGE) 2099 updateCurrentBBWithConstraints(PhysicalReg_EAX); 2100 updateCurrentBBWithConstraints(PhysicalReg_ECX); 2101 updateCurrentBBWithConstraints(PhysicalReg_EDX); 2102 num_regs_per_bytecode = count; 2103 break; 2104 case OP_NEG_INT: 2105 case OP_NOT_INT: 2106 case OP_NEG_FLOAT: 2107 vA = INST_A(inst); //destination 2108 vB = INST_B(inst); 2109 infoArray[1].regNum = vA; 2110 infoArray[1].refCount = 1; 2111 infoArray[1].accessType = REGACCESS_D; 2112 infoArray[1].physicalType = LowOpndRegType_gp; 2113 infoArray[0].regNum = vB; 2114 infoArray[0].refCount = 1; 2115 infoArray[0].accessType = REGACCESS_U; 2116 infoArray[0].physicalType = LowOpndRegType_gp; 2117 num_regs_per_bytecode = 2; 2118 codeSize = 1; 2119 break; 2120 case OP_NEG_LONG: 2121 case OP_NOT_LONG: 2122 case OP_NEG_DOUBLE: 2123 vA = INST_A(inst); //destination 2124 vB = INST_B(inst); 2125 codeSize = 1; 2126 infoArray[1].regNum = vA; 2127 infoArray[1].refCount = 1; 2128 infoArray[1].accessType = REGACCESS_D; 2129 infoArray[1].physicalType = LowOpndRegType_xmm; 2130 infoArray[0].regNum = vB; 2131 infoArray[0].refCount = 1; 2132 infoArray[0].accessType = REGACCESS_U; 2133 infoArray[0].physicalType = LowOpndRegType_xmm; 2134 num_regs_per_bytecode = 2; 2135 break; 2136 case OP_INT_TO_LONG: //hard-coded registers 2137 vA = INST_A(inst); //destination 2138 vB = INST_B(inst); 2139 codeSize = 1; 2140 infoArray[1].regNum = vA; 2141 infoArray[1].refCount = 1; 2142 infoArray[1].accessType = REGACCESS_D; 2143 infoArray[1].physicalType = LowOpndRegType_gp; //save from %eax 2144 infoArray[1].allocConstraints[PhysicalReg_EAX].count = 1; 2145 infoArray[2].regNum = vA+1; 2146 infoArray[2].refCount = 1; 2147 infoArray[2].accessType = REGACCESS_D; 2148 infoArray[2].physicalType = LowOpndRegType_gp; 2149 infoArray[2].allocConstraints[PhysicalReg_EDX].count = 1; 2150 infoArray[0].regNum = vB; 2151 infoArray[0].refCount = 1; 2152 infoArray[0].accessType = REGACCESS_U; 2153 infoArray[0].physicalType = LowOpndRegType_gp; 2154 infoArray[0].allocConstraints[PhysicalReg_EAX].count = 1; 2155 updateCurrentBBWithConstraints(PhysicalReg_EAX); 2156 updateCurrentBBWithConstraints(PhysicalReg_EDX); 2157 num_regs_per_bytecode = 3; 2158 break; 2159 case OP_INT_TO_FLOAT: //32 to 32 2160 case OP_INT_TO_DOUBLE: //32 to 64 2161 case OP_LONG_TO_FLOAT: //64 to 32 2162 case OP_LONG_TO_DOUBLE: //64 to 64 2163 case OP_FLOAT_TO_DOUBLE: //32 to 64 2164 case OP_DOUBLE_TO_FLOAT: //64 to 32 2165 vA = INST_A(inst); //destination 2166 vB = INST_B(inst); 2167 codeSize = 1; 2168 infoArray[1].regNum = vA; 2169 infoArray[1].refCount = 1; 2170 infoArray[1].accessType = REGACCESS_D; 2171 if(inst_op == OP_INT_TO_DOUBLE || inst_op == OP_LONG_TO_DOUBLE || inst_op == OP_FLOAT_TO_DOUBLE) 2172 infoArray[1].physicalType = LowOpndRegType_fs; 2173 else 2174 infoArray[1].physicalType = LowOpndRegType_fs_s; 2175 infoArray[0].regNum = vB; 2176 infoArray[0].refCount = 1; 2177 infoArray[0].accessType = REGACCESS_U; 2178 if(inst_op == OP_INT_TO_FLOAT || inst_op == OP_INT_TO_DOUBLE || inst_op == OP_FLOAT_TO_DOUBLE) 2179 infoArray[0].physicalType = LowOpndRegType_fs_s; //float 2180 else 2181 infoArray[0].physicalType = LowOpndRegType_fs; 2182 num_regs_per_bytecode = 2; 2183 break; 2184 case OP_LONG_TO_INT: 2185 vA = INST_A(inst); //destination 2186 vB = INST_B(inst); 2187 infoArray[1].regNum = vA; 2188 infoArray[1].refCount = 1; 2189 infoArray[1].accessType = REGACCESS_D; 2190 infoArray[1].physicalType = LowOpndRegType_gp; 2191 infoArray[0].regNum = vB; 2192 infoArray[0].refCount = 1; 2193 infoArray[0].accessType = REGACCESS_U; 2194 infoArray[0].physicalType = LowOpndRegType_gp; 2195 num_regs_per_bytecode = 2; 2196 codeSize = 1; 2197 break; 2198 case OP_FLOAT_TO_INT: 2199 case OP_DOUBLE_TO_INT: //for reaching-def analysis 2200 vA = INST_A(inst); //destination 2201 vB = INST_B(inst); 2202 codeSize = 1; 2203 infoArray[2].regNum = vA; 2204 infoArray[2].refCount = 3; 2205 infoArray[2].accessType = REGACCESS_D; 2206 infoArray[2].physicalType = LowOpndRegType_gp; 2207 infoArray[1].regNum = vA; 2208 infoArray[1].refCount = 1; 2209 infoArray[1].accessType = REGACCESS_D; 2210 infoArray[1].physicalType = LowOpndRegType_fs_s; //store_int_fp_stack_VR 2211 infoArray[0].regNum = vB; 2212 infoArray[0].refCount = 1; 2213 infoArray[0].accessType = REGACCESS_U; 2214 if(inst_op == OP_DOUBLE_TO_INT) 2215 infoArray[0].physicalType = LowOpndRegType_fs; 2216 else 2217 infoArray[0].physicalType = LowOpndRegType_fs_s; 2218 num_regs_per_bytecode = 3; 2219 break; 2220 case OP_FLOAT_TO_LONG: 2221 case OP_DOUBLE_TO_LONG: 2222 vA = INST_A(inst); //destination 2223 vB = INST_B(inst); 2224 codeSize = 1; 2225 infoArray[2].regNum = vA; 2226 infoArray[2].refCount = 3; 2227 infoArray[2].accessType = REGACCESS_D; 2228 infoArray[2].physicalType = LowOpndRegType_xmm; 2229 infoArray[1].regNum = vA; 2230 infoArray[1].refCount = 1; 2231 infoArray[1].accessType = REGACCESS_D; 2232 infoArray[1].physicalType = LowOpndRegType_fs; 2233 infoArray[0].regNum = vB; 2234 infoArray[0].refCount = 1; 2235 infoArray[0].accessType = REGACCESS_U; 2236 if(inst_op == OP_DOUBLE_TO_LONG) 2237 infoArray[0].physicalType = LowOpndRegType_fs; 2238 else 2239 infoArray[0].physicalType = LowOpndRegType_fs_s; 2240 num_regs_per_bytecode = 3; 2241 break; 2242 case OP_INT_TO_BYTE: 2243 case OP_INT_TO_CHAR: 2244 case OP_INT_TO_SHORT: 2245 vA = INST_A(inst); //destination 2246 vB = INST_B(inst); 2247 codeSize = 1; 2248 infoArray[1].regNum = vA; 2249 infoArray[1].refCount = 1; 2250 infoArray[1].accessType = REGACCESS_D; 2251 infoArray[1].physicalType = LowOpndRegType_gp; 2252 infoArray[0].regNum = vB; 2253 infoArray[0].refCount = 1; 2254 infoArray[0].accessType = REGACCESS_U; 2255 infoArray[0].physicalType = LowOpndRegType_gp; 2256 num_regs_per_bytecode = 2; 2257 break; 2258 2259 case OP_ADD_INT: 2260 case OP_SUB_INT: 2261 case OP_MUL_INT: 2262 case OP_AND_INT: 2263 case OP_OR_INT: 2264 case OP_XOR_INT: 2265 vA = INST_AA(inst); 2266 v1 = *((u1*)rPC + 2); 2267 v2 = *((u1*)rPC + 3); 2268 codeSize = 2; 2269 infoArray[2].regNum = vA; 2270 infoArray[2].refCount = 1; 2271 infoArray[2].accessType = REGACCESS_D; 2272 infoArray[2].physicalType = LowOpndRegType_gp; 2273 infoArray[0].regNum = v1; 2274 infoArray[0].refCount = 1; 2275 infoArray[0].accessType = REGACCESS_U; 2276 infoArray[0].physicalType = LowOpndRegType_gp; 2277 infoArray[1].regNum = v2; 2278 infoArray[1].refCount = 1; 2279 infoArray[1].accessType = REGACCESS_U; 2280 infoArray[1].physicalType = LowOpndRegType_gp; 2281 num_regs_per_bytecode = 3; 2282 break; 2283 case OP_DIV_INT: 2284 case OP_REM_INT: 2285 vA = INST_AA(inst); 2286 v1 = *((u1*)rPC + 2); 2287 v2 = *((u1*)rPC + 3); 2288 codeSize = 2; 2289 infoArray[2].regNum = vA; 2290 infoArray[2].refCount = 2; 2291 infoArray[2].accessType = REGACCESS_D; 2292 infoArray[2].physicalType = LowOpndRegType_gp; 2293 infoArray[0].regNum = v1; 2294 infoArray[0].refCount = 1; 2295 infoArray[0].accessType = REGACCESS_U; 2296 infoArray[0].physicalType = LowOpndRegType_gp; 2297 infoArray[1].regNum = v2; 2298 infoArray[1].refCount = 1; 2299 infoArray[1].accessType = REGACCESS_U; 2300 infoArray[1].physicalType = LowOpndRegType_gp; 2301 infoArray[0].allocConstraints[PhysicalReg_EAX].count = 1; //for v1 2302 if(inst_op == OP_REM_INT) 2303 infoArray[2].allocConstraints[PhysicalReg_EDX].count = 1;//vA 2304 else 2305 infoArray[2].allocConstraints[PhysicalReg_EAX].count = 1;//vA 2306 updateCurrentBBWithConstraints(PhysicalReg_EAX); 2307 updateCurrentBBWithConstraints(PhysicalReg_EDX); 2308 num_regs_per_bytecode = 3; 2309 break; 2310 case OP_SHL_INT: 2311 case OP_SHR_INT: 2312 case OP_USHR_INT: 2313 vA = INST_AA(inst); 2314 v1 = *((u1*)rPC + 2); 2315 v2 = *((u1*)rPC + 3); 2316 codeSize = 2; 2317 infoArray[2].regNum = vA; 2318 infoArray[2].refCount = 1; 2319 infoArray[2].accessType = REGACCESS_D; 2320 infoArray[2].physicalType = LowOpndRegType_gp; 2321 infoArray[0].regNum = v1; 2322 infoArray[0].refCount = 1; 2323 infoArray[0].accessType = REGACCESS_U; 2324 infoArray[0].physicalType = LowOpndRegType_gp; 2325 infoArray[1].regNum = v2; // in ecx 2326 infoArray[1].refCount = 1; 2327 infoArray[1].accessType = REGACCESS_U; 2328 infoArray[1].physicalType = LowOpndRegType_gp; 2329 infoArray[1].allocConstraints[PhysicalReg_ECX].count = 1; 2330 updateCurrentBBWithConstraints(PhysicalReg_ECX); 2331 num_regs_per_bytecode = 3; 2332 break; 2333 case OP_ADD_LONG: 2334 case OP_SUB_LONG: 2335 case OP_AND_LONG: 2336 case OP_OR_LONG: 2337 case OP_XOR_LONG: 2338 vA = INST_AA(inst); 2339 v1 = *((u1*)rPC + 2); 2340 v2 = *((u1*)rPC + 3); 2341 codeSize = 2; 2342 infoArray[2].regNum = vA; 2343 infoArray[2].refCount = 1; 2344 infoArray[2].accessType = REGACCESS_D; 2345 infoArray[2].physicalType = LowOpndRegType_xmm; 2346 infoArray[0].regNum = v1; 2347 infoArray[0].refCount = 1; 2348 infoArray[0].accessType = REGACCESS_U; 2349 infoArray[0].physicalType = LowOpndRegType_xmm; 2350 infoArray[1].regNum = v2; 2351 infoArray[1].refCount = 1; 2352 infoArray[1].accessType = REGACCESS_U; 2353 infoArray[1].physicalType = LowOpndRegType_xmm; 2354 num_regs_per_bytecode = 3; 2355 break; 2356 case OP_MUL_LONG: //used int 2357 vA = INST_AA(inst); 2358 v1 = *((u1*)rPC + 2); 2359 v2 = *((u1*)rPC + 3); 2360 infoArray[0].regNum = v1; 2361 infoArray[0].refCount = 1; 2362 infoArray[0].accessType = REGACCESS_U; 2363 infoArray[0].physicalType = LowOpndRegType_gp; 2364 infoArray[1].regNum = v1+1; 2365 infoArray[1].refCount = 1; 2366 infoArray[1].accessType = REGACCESS_U; 2367 infoArray[1].physicalType = LowOpndRegType_gp; 2368 infoArray[2].regNum = v2; 2369 infoArray[2].refCount = 1; 2370 infoArray[2].accessType = REGACCESS_U; 2371 infoArray[2].physicalType = LowOpndRegType_gp; 2372 infoArray[3].regNum = v2+1; 2373 infoArray[3].refCount = 1; 2374 infoArray[3].accessType = REGACCESS_U; 2375 infoArray[3].physicalType = LowOpndRegType_gp; 2376 infoArray[4].regNum = vA; 2377 infoArray[4].refCount = 1; 2378 infoArray[4].accessType = REGACCESS_D; 2379 infoArray[4].physicalType = LowOpndRegType_gp; 2380 infoArray[5].regNum = vA+1; 2381 infoArray[5].refCount = 1; 2382 infoArray[5].accessType = REGACCESS_D; 2383 infoArray[5].physicalType = LowOpndRegType_gp; 2384 num_regs_per_bytecode = 6; 2385 codeSize = 2; 2386 break; 2387 case OP_DIV_LONG: //v1: xmm v2,vA: 2388 case OP_REM_LONG: 2389 vA = INST_AA(inst); 2390 v1 = *((u1*)rPC + 2); 2391 v2 = *((u1*)rPC + 3); 2392 infoArray[0].regNum = v1; 2393 infoArray[0].refCount = 1; 2394 infoArray[0].accessType = REGACCESS_U; 2395 infoArray[0].physicalType = LowOpndRegType_xmm; 2396 infoArray[1].regNum = v2; 2397 infoArray[1].refCount = 1; 2398 infoArray[1].accessType = REGACCESS_U; 2399 infoArray[1].physicalType = LowOpndRegType_gp; 2400 infoArray[2].regNum = v2+1; 2401 infoArray[2].refCount = 1; 2402 infoArray[2].accessType = REGACCESS_U; 2403 infoArray[2].physicalType = LowOpndRegType_gp; 2404 infoArray[3].regNum = vA; 2405 infoArray[3].refCount = 1; 2406 infoArray[3].accessType = REGACCESS_D; 2407 infoArray[3].physicalType = LowOpndRegType_gp; 2408 infoArray[4].regNum = vA+1; 2409 infoArray[4].refCount = 1; 2410 infoArray[4].accessType = REGACCESS_D; 2411 infoArray[4].physicalType = LowOpndRegType_gp; 2412 num_regs_per_bytecode = 5; 2413 codeSize = 2; 2414 break; 2415 case OP_SHL_LONG: //v2: 32, move_ss; v1,vA: xmm CHECK 2416 vA = INST_AA(inst); 2417 v1 = *((u1*)rPC + 2); 2418 v2 = *((u1*)rPC + 3); 2419 infoArray[0].regNum = v1; 2420 infoArray[0].refCount = 1; 2421 infoArray[0].accessType = REGACCESS_U; 2422 infoArray[0].physicalType = LowOpndRegType_xmm; 2423 infoArray[1].regNum = v2; 2424 infoArray[1].refCount = 1; 2425 infoArray[1].accessType = REGACCESS_U; 2426 infoArray[1].physicalType = LowOpndRegType_ss; 2427 infoArray[2].regNum = vA; 2428 infoArray[2].refCount = 1; 2429 infoArray[2].accessType = REGACCESS_D; 2430 infoArray[2].physicalType = LowOpndRegType_xmm; 2431 num_regs_per_bytecode = 3; 2432 codeSize = 2; 2433 break; 2434 case OP_SHR_LONG: //v2: 32, move_ss; v1,vA: xmm CHECK 2435 vA = INST_AA(inst); 2436 v1 = *((u1*)rPC + 2); 2437 v2 = *((u1*)rPC + 3); 2438 infoArray[0].regNum = v1; 2439 infoArray[0].refCount = 1; 2440 infoArray[0].accessType = REGACCESS_U; 2441 infoArray[0].physicalType = LowOpndRegType_xmm; 2442 infoArray[1].regNum = v2; 2443 infoArray[1].refCount = 1; 2444 infoArray[1].accessType = REGACCESS_U; 2445 infoArray[1].physicalType = LowOpndRegType_ss; 2446 infoArray[2].regNum = v1+1; 2447 infoArray[2].refCount = 1; 2448 infoArray[2].accessType = REGACCESS_U; 2449 infoArray[2].physicalType = LowOpndRegType_gp; 2450 infoArray[3].regNum = vA; 2451 infoArray[3].refCount = 1; 2452 infoArray[3].accessType = REGACCESS_D; 2453 infoArray[3].physicalType = LowOpndRegType_xmm; 2454 num_regs_per_bytecode = 4; 2455 codeSize = 2; 2456 break; 2457 case OP_USHR_LONG: //v2: move_ss; v1,vA: move_sd 2458 vA = INST_AA(inst); 2459 v1 = *((u1*)rPC + 2); 2460 v2 = *((u1*)rPC + 3); 2461 infoArray[0].regNum = v1; 2462 infoArray[0].refCount = 1; 2463 infoArray[0].accessType = REGACCESS_U; 2464 infoArray[0].physicalType = LowOpndRegType_xmm; //sd 2465 infoArray[1].regNum = v2; 2466 infoArray[1].refCount = 1; 2467 infoArray[1].accessType = REGACCESS_U; 2468 infoArray[1].physicalType = LowOpndRegType_ss; //ss 2469 infoArray[2].regNum = vA; 2470 infoArray[2].refCount = 1; 2471 infoArray[2].accessType = REGACCESS_D; 2472 infoArray[2].physicalType = LowOpndRegType_xmm; //sd 2473 num_regs_per_bytecode = 3; 2474 codeSize = 2; 2475 break; 2476 case OP_ADD_FLOAT: //move_ss 2477 case OP_SUB_FLOAT: 2478 case OP_MUL_FLOAT: 2479 case OP_DIV_FLOAT: 2480 vA = INST_AA(inst); 2481 v1 = *((u1*)rPC + 2); 2482 v2 = *((u1*)rPC + 3); 2483 codeSize = 2; 2484 infoArray[2].regNum = vA; 2485 infoArray[2].refCount = 1; 2486 infoArray[2].accessType = REGACCESS_D; 2487 infoArray[2].physicalType = LowOpndRegType_ss; 2488 infoArray[0].regNum = v1; 2489 infoArray[0].refCount = 1; 2490 infoArray[0].accessType = REGACCESS_U; 2491 infoArray[0].physicalType = LowOpndRegType_ss; 2492 infoArray[1].regNum = v2; 2493 infoArray[1].refCount = 1; 2494 infoArray[1].accessType = REGACCESS_U; 2495 infoArray[1].physicalType = LowOpndRegType_ss; 2496 num_regs_per_bytecode = 3; 2497 break; 2498 case OP_REM_FLOAT: //32 bit GPR, fp_stack for output 2499 vA = INST_AA(inst); 2500 v1 = *((u1*)rPC + 2); 2501 v2 = *((u1*)rPC + 3); 2502 codeSize = 2; 2503 infoArray[2].regNum = vA; 2504 infoArray[2].refCount = 1; 2505 infoArray[2].accessType = REGACCESS_D; 2506 infoArray[2].physicalType = LowOpndRegType_fs_s; 2507 infoArray[0].regNum = v1; 2508 infoArray[0].refCount = 1; 2509 infoArray[0].accessType = REGACCESS_U; 2510 infoArray[0].physicalType = LowOpndRegType_gp; 2511 infoArray[1].regNum = v2; 2512 infoArray[1].refCount = 1; 2513 infoArray[1].accessType = REGACCESS_U; 2514 infoArray[1].physicalType = LowOpndRegType_gp; 2515 num_regs_per_bytecode = 3; 2516 break; 2517 case OP_ADD_DOUBLE: //move_sd 2518 case OP_SUB_DOUBLE: 2519 case OP_MUL_DOUBLE: 2520 case OP_DIV_DOUBLE: 2521 vA = INST_AA(inst); 2522 v1 = *((u1*)rPC + 2); 2523 v2 = *((u1*)rPC + 3); 2524 codeSize = 2; 2525 infoArray[2].regNum = vA; 2526 infoArray[2].refCount = 1; 2527 infoArray[2].accessType = REGACCESS_D; 2528 infoArray[2].physicalType = LowOpndRegType_xmm; 2529 infoArray[0].regNum = v1; 2530 infoArray[0].refCount = 1; 2531 infoArray[0].accessType = REGACCESS_U; 2532 infoArray[0].physicalType = LowOpndRegType_xmm; 2533 infoArray[1].regNum = v2; 2534 infoArray[1].refCount = 1; 2535 infoArray[1].accessType = REGACCESS_U; 2536 infoArray[1].physicalType = LowOpndRegType_xmm; 2537 num_regs_per_bytecode = 3; 2538 break; 2539 case OP_REM_DOUBLE: //64 bit XMM, fp_stack for output 2540 vA = INST_AA(inst); 2541 v1 = *((u1*)rPC + 2); 2542 v2 = *((u1*)rPC + 3); 2543 codeSize = 2; 2544 infoArray[2].regNum = vA; 2545 infoArray[2].refCount = 1; 2546 infoArray[2].accessType = REGACCESS_D; 2547 infoArray[2].physicalType = LowOpndRegType_fs; 2548 infoArray[0].regNum = v1; 2549 infoArray[0].refCount = 1; 2550 infoArray[0].accessType = REGACCESS_U; 2551 infoArray[0].physicalType = LowOpndRegType_xmm; 2552 infoArray[1].regNum = v2; 2553 infoArray[1].refCount = 1; 2554 infoArray[1].accessType = REGACCESS_U; 2555 infoArray[1].physicalType = LowOpndRegType_xmm; 2556 num_regs_per_bytecode = 3; 2557 break; 2558 2559 case OP_ADD_INT_2ADDR: 2560 case OP_SUB_INT_2ADDR: 2561 case OP_MUL_INT_2ADDR: 2562 case OP_AND_INT_2ADDR: 2563 case OP_OR_INT_2ADDR: 2564 case OP_XOR_INT_2ADDR: 2565 vA = INST_A(inst); 2566 v2 = INST_B(inst); 2567 codeSize = 1; 2568 infoArray[1].regNum = vA; 2569 infoArray[1].refCount = 2; 2570 infoArray[1].accessType = REGACCESS_UD; //use then define 2571 infoArray[1].physicalType = LowOpndRegType_gp; 2572 infoArray[0].regNum = v2; 2573 infoArray[0].refCount = 1; 2574 infoArray[0].accessType = REGACCESS_U; 2575 infoArray[0].physicalType = LowOpndRegType_gp; 2576 num_regs_per_bytecode = 2; 2577 break; 2578 case OP_DIV_INT_2ADDR: 2579 case OP_REM_INT_2ADDR: 2580 vA = INST_A(inst); 2581 v2 = INST_B(inst); 2582 codeSize = 1; 2583 infoArray[1].regNum = vA; 2584 infoArray[1].refCount = 3; 2585 infoArray[1].accessType = REGACCESS_UD; //use then define 2586 infoArray[1].physicalType = LowOpndRegType_gp; 2587 infoArray[0].regNum = v2; 2588 infoArray[0].refCount = 1; 2589 infoArray[0].accessType = REGACCESS_U; 2590 infoArray[0].physicalType = LowOpndRegType_gp; 2591 infoArray[1].allocConstraints[PhysicalReg_EAX].count = 1; //for v1 is vA 2592 if(inst_op == OP_REM_INT_2ADDR) 2593 infoArray[1].allocConstraints[PhysicalReg_EDX].count = 1;//vA 2594 else 2595 infoArray[1].allocConstraints[PhysicalReg_EAX].count = 1;//vA 2596 updateCurrentBBWithConstraints(PhysicalReg_EAX); 2597 updateCurrentBBWithConstraints(PhysicalReg_EDX); 2598 num_regs_per_bytecode = 2; 2599 break; 2600 case OP_SHL_INT_2ADDR: 2601 case OP_SHR_INT_2ADDR: 2602 case OP_USHR_INT_2ADDR: 2603 vA = INST_A(inst); 2604 v2 = INST_B(inst); 2605 codeSize = 1; 2606 infoArray[1].regNum = vA; 2607 infoArray[1].refCount = 2; 2608 infoArray[1].accessType = REGACCESS_UD; //use then define 2609 infoArray[1].physicalType = LowOpndRegType_gp; 2610 infoArray[0].regNum = v2; 2611 infoArray[0].refCount = 1; 2612 infoArray[0].accessType = REGACCESS_U; 2613 infoArray[0].physicalType = LowOpndRegType_gp; 2614 infoArray[0].allocConstraints[PhysicalReg_ECX].count = 1; //v2 2615 updateCurrentBBWithConstraints(PhysicalReg_ECX); 2616 num_regs_per_bytecode = 2; 2617 break; 2618 case OP_ADD_LONG_2ADDR: 2619 case OP_SUB_LONG_2ADDR: 2620 case OP_AND_LONG_2ADDR: 2621 case OP_OR_LONG_2ADDR: 2622 case OP_XOR_LONG_2ADDR: 2623 vA = INST_A(inst); 2624 v2 = INST_B(inst); 2625 codeSize = 1; 2626 infoArray[1].regNum = vA; 2627 infoArray[1].refCount = 2; 2628 infoArray[1].accessType = REGACCESS_UD; 2629 infoArray[1].physicalType = LowOpndRegType_xmm; 2630 infoArray[0].regNum = v2; 2631 infoArray[0].refCount = 1; 2632 infoArray[0].accessType = REGACCESS_U; 2633 infoArray[0].physicalType = LowOpndRegType_xmm; 2634 num_regs_per_bytecode = 2; 2635 break; 2636 case OP_MUL_LONG_2ADDR: 2637 vA = INST_A(inst); 2638 v2 = INST_B(inst); 2639 codeSize = 1; 2640 num_regs_per_bytecode = 4; 2641 infoArray[0].regNum = v2; 2642 infoArray[0].refCount = 1; 2643 infoArray[0].accessType = REGACCESS_U; 2644 infoArray[0].physicalType = LowOpndRegType_gp; 2645 infoArray[1].regNum = v2+1; 2646 infoArray[1].refCount = 1; 2647 infoArray[1].accessType = REGACCESS_U; 2648 infoArray[1].physicalType = LowOpndRegType_gp; 2649 infoArray[2].regNum = vA; 2650 infoArray[2].refCount = 2; 2651 infoArray[2].accessType = REGACCESS_UD; 2652 infoArray[2].physicalType = LowOpndRegType_gp; 2653 infoArray[3].regNum = vA+1; 2654 infoArray[3].refCount = 2; 2655 infoArray[3].accessType = REGACCESS_UD; 2656 infoArray[3].physicalType = LowOpndRegType_gp; 2657 break; 2658 case OP_DIV_LONG_2ADDR: //vA used as xmm, then updated as gps 2659 case OP_REM_LONG_2ADDR: 2660 vA = INST_A(inst); 2661 v2 = INST_B(inst); 2662 num_regs_per_bytecode = 5; 2663 codeSize = 1; 2664 infoArray[0].regNum = vA; 2665 infoArray[0].refCount = 1; 2666 infoArray[0].accessType = REGACCESS_U; 2667 infoArray[0].physicalType = LowOpndRegType_xmm; 2668 infoArray[1].regNum = v2; 2669 infoArray[1].refCount = 1; 2670 infoArray[1].accessType = REGACCESS_U; 2671 infoArray[1].physicalType = LowOpndRegType_gp; 2672 infoArray[2].regNum = v2+1; 2673 infoArray[2].refCount = 1; 2674 infoArray[2].accessType = REGACCESS_U; 2675 infoArray[2].physicalType = LowOpndRegType_gp; 2676 infoArray[3].regNum = vA; 2677 infoArray[3].refCount = 1; 2678 infoArray[3].accessType = REGACCESS_D; 2679 infoArray[3].physicalType = LowOpndRegType_gp; 2680 infoArray[4].regNum = vA+1; 2681 infoArray[4].refCount = 1; 2682 infoArray[4].accessType = REGACCESS_D; 2683 infoArray[4].physicalType = LowOpndRegType_gp; 2684 break; 2685 case OP_SHL_LONG_2ADDR: 2686 vA = INST_A(inst); 2687 v2 = INST_B(inst); 2688 num_regs_per_bytecode = 2; 2689 codeSize = 1; 2690 infoArray[0].regNum = v2; //ss 2691 infoArray[0].refCount = 1; 2692 infoArray[0].accessType = REGACCESS_U; 2693 infoArray[0].physicalType = LowOpndRegType_ss; 2694 infoArray[1].regNum = vA; 2695 infoArray[1].refCount = 2; 2696 infoArray[1].accessType = REGACCESS_UD; 2697 infoArray[1].physicalType = LowOpndRegType_xmm; 2698 break; 2699 case OP_SHR_LONG_2ADDR: 2700 vA = INST_A(inst); 2701 v2 = INST_B(inst); 2702 num_regs_per_bytecode = 3; 2703 codeSize = 1; 2704 infoArray[0].regNum = v2; //ss 2705 infoArray[0].refCount = 1; 2706 infoArray[0].accessType = REGACCESS_U; 2707 infoArray[0].physicalType = LowOpndRegType_ss; 2708 infoArray[1].regNum = vA+1; 2709 infoArray[1].refCount = 1; 2710 infoArray[1].accessType = REGACCESS_U; 2711 infoArray[1].physicalType = LowOpndRegType_gp; 2712 infoArray[2].regNum = vA; 2713 infoArray[2].refCount = 2; 2714 infoArray[2].accessType = REGACCESS_UD; 2715 infoArray[2].physicalType = LowOpndRegType_xmm; 2716 break; 2717 case OP_USHR_LONG_2ADDR: 2718 vA = INST_A(inst); 2719 v2 = INST_B(inst); 2720 num_regs_per_bytecode = 2; 2721 codeSize = 1; 2722 infoArray[0].regNum = v2; 2723 infoArray[0].refCount = 1; 2724 infoArray[0].accessType = REGACCESS_U; 2725 infoArray[0].physicalType = LowOpndRegType_ss; //ss CHECK 2726 infoArray[1].regNum = vA; 2727 infoArray[1].refCount = 2; 2728 infoArray[1].accessType = REGACCESS_UD; 2729 infoArray[1].physicalType = LowOpndRegType_xmm; //sd 2730 break; 2731 case OP_ADD_FLOAT_2ADDR: 2732 case OP_SUB_FLOAT_2ADDR: 2733 case OP_MUL_FLOAT_2ADDR: 2734 case OP_DIV_FLOAT_2ADDR: 2735 vA = INST_A(inst); 2736 v2 = INST_B(inst); 2737 codeSize = 1; 2738 infoArray[1].regNum = vA; 2739 infoArray[1].refCount = 2; 2740 infoArray[1].accessType = REGACCESS_UD; 2741 infoArray[1].physicalType = LowOpndRegType_ss; 2742 infoArray[0].regNum = v2; 2743 infoArray[0].refCount = 1; 2744 infoArray[0].accessType = REGACCESS_U; 2745 infoArray[0].physicalType = LowOpndRegType_ss; 2746 num_regs_per_bytecode = 2; 2747 break; 2748 case OP_REM_FLOAT_2ADDR: //load vA as GPR, store from fs 2749 vA = INST_A(inst); 2750 v2 = INST_B(inst); 2751 codeSize = 1; 2752 infoArray[1].regNum = vA; 2753 infoArray[1].refCount = 2; 2754 infoArray[1].accessType = REGACCESS_UD; 2755 infoArray[1].physicalType = LowOpndRegType_gp; //CHECK 2756 infoArray[0].regNum = v2; 2757 infoArray[0].refCount = 1; 2758 infoArray[0].accessType = REGACCESS_U; 2759 infoArray[0].physicalType = LowOpndRegType_gp; 2760 num_regs_per_bytecode = 2; 2761 break; 2762 case OP_ADD_DOUBLE_2ADDR: 2763 case OP_SUB_DOUBLE_2ADDR: 2764 case OP_MUL_DOUBLE_2ADDR: 2765 case OP_DIV_DOUBLE_2ADDR: 2766 vA = INST_A(inst); 2767 v2 = INST_B(inst); 2768 codeSize = 1; 2769 infoArray[1].regNum = vA; 2770 infoArray[1].refCount = 2; 2771 infoArray[1].accessType = REGACCESS_UD; 2772 infoArray[1].physicalType = LowOpndRegType_xmm; 2773 infoArray[0].regNum = v2; 2774 infoArray[0].refCount = 1; 2775 infoArray[0].accessType = REGACCESS_U; 2776 infoArray[0].physicalType = LowOpndRegType_xmm; 2777 num_regs_per_bytecode = 2; 2778 break; 2779 case OP_REM_DOUBLE_2ADDR: //load to xmm, store from fs 2780 vA = INST_A(inst); 2781 v2 = INST_B(inst); 2782 codeSize = 1; 2783 infoArray[1].regNum = vA; 2784 infoArray[1].refCount = 2; 2785 infoArray[1].accessType = REGACCESS_UD; 2786 infoArray[1].physicalType = LowOpndRegType_xmm; //CHECK 2787 infoArray[0].regNum = v2; 2788 infoArray[0].refCount = 1; 2789 infoArray[0].accessType = REGACCESS_U; 2790 infoArray[0].physicalType = LowOpndRegType_xmm; 2791 num_regs_per_bytecode = 2; 2792 break; 2793 2794 case OP_ADD_INT_LIT16: 2795 case OP_RSUB_INT: 2796 case OP_MUL_INT_LIT16: 2797 case OP_AND_INT_LIT16: 2798 case OP_OR_INT_LIT16: 2799 case OP_XOR_INT_LIT16: 2800 vA = INST_A(inst); 2801 vB = INST_B(inst); 2802 codeSize = 2; 2803 infoArray[1].regNum = vA; 2804 infoArray[1].refCount = 1; 2805 infoArray[1].accessType = REGACCESS_D; 2806 infoArray[1].physicalType = LowOpndRegType_gp; 2807 infoArray[0].regNum = vB; 2808 infoArray[0].refCount = 1; 2809 infoArray[0].accessType = REGACCESS_U; 2810 infoArray[0].physicalType = LowOpndRegType_gp; 2811 num_regs_per_bytecode = 2; 2812 break; 2813 case OP_DIV_INT_LIT16: 2814 case OP_REM_INT_LIT16: 2815 vA = INST_A(inst); 2816 vB = INST_B(inst); 2817 codeSize = 2; 2818 tmp_s4 = (s2)FETCH(1); 2819 tmp_s2 = tmp_s4; 2820 if(tmp_s2 == 0) { 2821 num_regs_per_bytecode = 0; 2822 break; 2823 } 2824 infoArray[1].regNum = vA; //in edx for rem, in eax 2825 infoArray[1].accessType = REGACCESS_D; 2826 infoArray[1].physicalType = LowOpndRegType_gp; 2827 infoArray[0].regNum = vB; //in eax 2828 infoArray[0].refCount = 1; 2829 infoArray[0].accessType = REGACCESS_U; 2830 infoArray[0].physicalType = LowOpndRegType_gp; 2831 num_regs_per_bytecode = 2; 2832 if(inst_op == OP_DIV_INT_LIT16) { 2833 int power = isPowerOfTwo(tmp_s2); 2834 if(power >= 1) { /* divide by a power of 2 constant */ 2835 infoArray[1].refCount = 1; 2836 break; 2837 } 2838 } 2839 if(tmp_s2 == -1) 2840 infoArray[1].refCount = 2; 2841 else 2842 infoArray[1].refCount = 1; 2843 if(inst_op == OP_REM_INT_LIT16) 2844 infoArray[1].allocConstraints[PhysicalReg_EDX].count = 1; 2845 else 2846 infoArray[1].allocConstraints[PhysicalReg_EAX].count = 1; 2847 infoArray[0].allocConstraints[PhysicalReg_EAX].count = 1; 2848 updateCurrentBBWithConstraints(PhysicalReg_EAX); 2849 updateCurrentBBWithConstraints(PhysicalReg_EDX); 2850 break; 2851 case OP_ADD_INT_LIT8: 2852 case OP_RSUB_INT_LIT8: 2853 case OP_MUL_INT_LIT8: 2854 case OP_AND_INT_LIT8: 2855 case OP_OR_INT_LIT8: 2856 case OP_XOR_INT_LIT8: 2857 case OP_SHL_INT_LIT8: 2858 case OP_SHR_INT_LIT8: 2859 case OP_USHR_INT_LIT8: 2860 codeSize = 2; 2861 vA = INST_AA(inst); 2862 vB = (u2)FETCH(1) & 0xff; 2863 infoArray[1].regNum = vA; 2864 infoArray[1].refCount = 1; 2865 infoArray[1].accessType = REGACCESS_D; 2866 infoArray[1].physicalType = LowOpndRegType_gp; 2867 infoArray[0].regNum = vB; 2868 infoArray[0].refCount = 1; 2869 infoArray[0].accessType = REGACCESS_U; 2870 infoArray[0].physicalType = LowOpndRegType_gp; 2871 num_regs_per_bytecode = 2; 2872 break; 2873 case OP_DIV_INT_LIT8: 2874 case OP_REM_INT_LIT8: 2875 codeSize = 2; 2876 vA = INST_AA(inst); 2877 vB = (u2)FETCH(1) & 0xff; 2878 tmp_s2 = (s2)FETCH(1) >> 8; 2879 if(tmp_s2 == 0) { 2880 num_regs_per_bytecode = 0; 2881 break; 2882 } 2883 2884 infoArray[1].regNum = vA; 2885 infoArray[1].accessType = REGACCESS_D; 2886 infoArray[1].physicalType = LowOpndRegType_gp; 2887 infoArray[0].regNum = vB; 2888 infoArray[0].refCount = 1; 2889 infoArray[0].accessType = REGACCESS_U; 2890 infoArray[0].physicalType = LowOpndRegType_gp; 2891 num_regs_per_bytecode = 2; 2892 if(inst_op == OP_DIV_INT_LIT8) { 2893 int power = isPowerOfTwo(tmp_s2); 2894 if(power >= 1) { /* divide by a power of 2 constant */ 2895 infoArray[1].refCount = 1; 2896 break; 2897 } 2898 } 2899 2900 if(tmp_s2 == -1) 2901 infoArray[1].refCount = 2; 2902 else 2903 infoArray[1].refCount = 1; 2904 if(inst_op == OP_REM_INT_LIT8) 2905 infoArray[1].allocConstraints[PhysicalReg_EDX].count = 1; 2906 else 2907 infoArray[1].allocConstraints[PhysicalReg_EAX].count = 1; 2908 infoArray[0].allocConstraints[PhysicalReg_EAX].count = 1; 2909 updateCurrentBBWithConstraints(PhysicalReg_EAX); 2910 updateCurrentBBWithConstraints(PhysicalReg_EDX); 2911 break; 2912 case OP_EXECUTE_INLINE: //update glue->retval 2913 case OP_EXECUTE_INLINE_RANGE: 2914 u4 vC; 2915 if(inst_op == OP_EXECUTE_INLINE) 2916 num = INST_B(inst); 2917 else 2918 num = INST_AA(inst); 2919 if(inst_op == OP_EXECUTE_INLINE) { 2920 vC = FETCH(2) & 0xf; 2921 vD = (FETCH(2) >> 4) & 0xf; 2922 vE = (FETCH(2) >> 8) & 0xf; 2923 vF = FETCH(2) >> 12; 2924 } else { 2925 vC = FETCH(2); 2926 vD = vC + 1; 2927 vE = vC + 2; 2928 vF = vC + 3; 2929 } 2930 codeSize = 3; 2931 if(num >= 1) { 2932 infoArray[0].regNum = vC; 2933 infoArray[0].refCount = 1; 2934 infoArray[0].accessType = REGACCESS_U; 2935 infoArray[0].physicalType = LowOpndRegType_gp; 2936 } 2937 if(num >= 2) { 2938 infoArray[1].regNum = vD; 2939 infoArray[1].refCount = 1; 2940 infoArray[1].accessType = REGACCESS_U; 2941 infoArray[1].physicalType = LowOpndRegType_gp; 2942 } 2943 if(num >= 3) { 2944 infoArray[2].regNum = vE; 2945 infoArray[2].refCount = 1; 2946 infoArray[2].accessType = REGACCESS_U; 2947 infoArray[2].physicalType = LowOpndRegType_gp; 2948 } 2949 if(num >= 4) { 2950 infoArray[3].regNum = vF; 2951 infoArray[3].refCount = 1; 2952 infoArray[3].accessType = REGACCESS_U; 2953 infoArray[3].physicalType = LowOpndRegType_gp; 2954 } 2955 updateCurrentBBWithConstraints(PhysicalReg_EAX); 2956 updateCurrentBBWithConstraints(PhysicalReg_EDX); 2957 num_regs_per_bytecode = num; 2958 break; 2959 #if FIXME 2960 case OP_INVOKE_OBJECT_INIT_RANGE: 2961 codeSize = 3; 2962 num_regs_per_bytecode = 0; 2963 break; 2964 #endif 2965 } 2966 return codeSize; 2967 } 2968 //! Updates infoArray(TempRegInfo) with temporaries accessed by INVOKE_NO_RANGE 2969 2970 //! 2971 int updateInvokeNoRange(TempRegInfo* infoArray, int startInd) { 2972 int j = startInd; 2973 //invokeMethodNoRange 2974 int count = INST_B(inst); 2975 if(count == 5) { 2976 infoArray[j].regNum = 22; 2977 infoArray[j].refCount = 2; //DU 2978 infoArray[j].physicalType = LowOpndRegType_gp; 2979 j++; 2980 } 2981 if(count >= 4) { 2982 infoArray[j].regNum = 23; 2983 infoArray[j].refCount = 2; //DU 2984 infoArray[j].physicalType = LowOpndRegType_gp; 2985 j++; 2986 } 2987 if(count >= 3) { 2988 infoArray[j].regNum = 24; 2989 infoArray[j].refCount = 2; //DU 2990 infoArray[j].physicalType = LowOpndRegType_gp; 2991 j++; 2992 } 2993 if(count >= 2) { 2994 infoArray[j].regNum = 25; 2995 infoArray[j].refCount = 2; //DU 2996 infoArray[j].physicalType = LowOpndRegType_gp; 2997 j++; 2998 } 2999 if(count >= 1) { 3000 infoArray[j].regNum = 26; 3001 infoArray[j].refCount = 2; //DU 3002 infoArray[j].physicalType = LowOpndRegType_gp; 3003 j++; 3004 } 3005 return j; 3006 } 3007 //! Updates infoArray(TempRegInfo) with temporaries accessed by INVOKE_RANGE 3008 3009 //! LOOP_COUNT is used to indicate a variable is live through a loop 3010 int updateInvokeRange(TempRegInfo* infoArray, int startIndex) { 3011 int j = startIndex; 3012 int count = INST_AA(inst); 3013 infoArray[j].regNum = 21; 3014 if(count <= 10) { 3015 infoArray[j].refCount = 1+count; //DU 3016 } else { 3017 infoArray[j].refCount = 2+3*LOOP_COUNT; 3018 } 3019 infoArray[j].physicalType = LowOpndRegType_gp; 3020 j++; 3021 if(count >= 1 && count <= 10) { 3022 infoArray[j].regNum = 22; 3023 infoArray[j].refCount = 2; //DU 3024 infoArray[j].physicalType = LowOpndRegType_gp; 3025 j++; 3026 } 3027 if(count >= 2 && count <= 10) { 3028 infoArray[j].regNum = 23; 3029 infoArray[j].refCount = 2; //DU 3030 infoArray[j].physicalType = LowOpndRegType_gp; 3031 j++; 3032 } 3033 if(count >= 3 && count <= 10) { 3034 infoArray[j].regNum = 24; 3035 infoArray[j].refCount = 2; //DU 3036 infoArray[j].physicalType = LowOpndRegType_gp; 3037 j++; 3038 } 3039 if(count >= 4 && count <= 10) { 3040 infoArray[j].regNum = 25; 3041 infoArray[j].refCount = 2; //DU 3042 infoArray[j].physicalType = LowOpndRegType_gp; 3043 j++; 3044 } 3045 if(count >= 5 && count <= 10) { 3046 infoArray[j].regNum = 26; 3047 infoArray[j].refCount = 2; //DU 3048 infoArray[j].physicalType = LowOpndRegType_gp; 3049 j++; 3050 } 3051 if(count >= 6 && count <= 10) { 3052 infoArray[j].regNum = 27; 3053 infoArray[j].refCount = 2; //DU 3054 infoArray[j].physicalType = LowOpndRegType_gp; 3055 j++; 3056 } 3057 if(count >= 7 && count <= 10) { 3058 infoArray[j].regNum = 28; 3059 infoArray[j].refCount = 2; //DU 3060 infoArray[j].physicalType = LowOpndRegType_gp; 3061 j++; 3062 } 3063 if(count >= 8 && count <= 10) { 3064 infoArray[j].regNum = 29; 3065 infoArray[j].refCount = 2; //DU 3066 infoArray[j].physicalType = LowOpndRegType_gp; 3067 j++; 3068 } 3069 if(count >= 9 && count <= 10) { 3070 infoArray[j].regNum = 30; 3071 infoArray[j].refCount = 2; //DU 3072 infoArray[j].physicalType = LowOpndRegType_gp; 3073 j++; 3074 } 3075 if(count == 10) { 3076 infoArray[j].regNum = 31; 3077 infoArray[j].refCount = 2; //DU 3078 infoArray[j].physicalType = LowOpndRegType_gp; 3079 j++; 3080 } 3081 if(count > 10) { 3082 //NOTE: inside a loop, LOOP_COUNT can't be 1 3083 // if LOOP_COUNT is 1, it is likely that a logical register is freed inside the loop 3084 // and the next iteration will have incorrect result 3085 infoArray[j].regNum = 12; 3086 infoArray[j].refCount = 1+3*LOOP_COUNT; //DU 3087 infoArray[j].physicalType = LowOpndRegType_gp; 3088 j++; 3089 infoArray[j].regNum = 13; 3090 infoArray[j].refCount = 1+LOOP_COUNT; //DU 3091 infoArray[j].physicalType = LowOpndRegType_gp; 3092 j++; 3093 infoArray[j].regNum = 14; 3094 //MUST be 2, otherwise, transferToState will think its state was in memory 3095 infoArray[j].refCount = 2; //DU local 3096 infoArray[j].physicalType = LowOpndRegType_gp; 3097 j++; 3098 } 3099 return j; 3100 } 3101 3102 /* update temporaries used by RETURN bytecodes 3103 a temporary is represented by <number, type of the temporary> 3104 */ 3105 int updateReturnCommon(TempRegInfo* infoArray) { 3106 int numTmps; 3107 infoArray[0].regNum = 1; 3108 infoArray[0].refCount = 4; //DU 3109 infoArray[0].physicalType = LowOpndRegType_scratch; 3110 infoArray[1].regNum = 2; 3111 infoArray[1].refCount = 2; //DU 3112 infoArray[1].physicalType = LowOpndRegType_scratch; 3113 infoArray[2].regNum = PhysicalReg_EAX; 3114 infoArray[2].refCount = 5; //DU 3115 infoArray[2].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3116 3117 infoArray[3].regNum = 1; 3118 #if defined(ENABLE_TRACING)//WITH_DEBUGGER is true WITH_PROFILER can be false 3119 infoArray[3].refCount = 6+4; 3120 #else 3121 infoArray[3].refCount = 6; //DU 3122 #endif 3123 infoArray[3].physicalType = LowOpndRegType_gp; 3124 infoArray[4].regNum = 2; 3125 infoArray[4].refCount = 4; //DU 3126 infoArray[4].physicalType = LowOpndRegType_gp; 3127 infoArray[5].regNum = 5; 3128 infoArray[5].refCount = 2; //DU 3129 infoArray[5].physicalType = LowOpndRegType_gp; 3130 infoArray[6].regNum = 10; 3131 infoArray[6].refCount = 3; 3132 infoArray[6].physicalType = LowOpndRegType_gp; 3133 infoArray[7].regNum = 6; 3134 infoArray[7].refCount = 4; //DU 3135 infoArray[7].physicalType = LowOpndRegType_gp; 3136 infoArray[8].regNum = 3; 3137 infoArray[8].refCount = 3; 3138 infoArray[8].physicalType = LowOpndRegType_gp; 3139 infoArray[9].regNum = 7; 3140 infoArray[9].refCount = 2; //DU 3141 infoArray[9].physicalType = LowOpndRegType_gp; 3142 numTmps = 12; 3143 #if defined(ENABLE_TRACING) 3144 infoArray[12].regNum = 4; 3145 infoArray[12].refCount = 3; //DU 3146 infoArray[12].physicalType = LowOpndRegType_gp; 3147 infoArray[13].regNum = 3; 3148 infoArray[13].refCount = 2; //DU 3149 infoArray[13].physicalType = LowOpndRegType_scratch; 3150 infoArray[14].regNum = 15; 3151 infoArray[14].refCount = 2; //DU 3152 infoArray[14].physicalType = LowOpndRegType_gp; 3153 infoArray[15].regNum = 16; 3154 infoArray[15].refCount = 2; //DU 3155 infoArray[15].physicalType = LowOpndRegType_gp; 3156 infoArray[16].regNum = PhysicalReg_EDX; 3157 infoArray[16].refCount = 2; //DU 3158 infoArray[16].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3159 infoArray[17].regNum = 6; 3160 infoArray[17].refCount = 2; //DU 3161 infoArray[17].physicalType = LowOpndRegType_scratch; 3162 numTmps = 18; 3163 #endif 3164 infoArray[10].regNum = 14; 3165 infoArray[10].refCount = 2; //DU 3166 infoArray[10].physicalType = LowOpndRegType_gp; 3167 infoArray[11].regNum = 4; 3168 infoArray[11].refCount = 2; //DU 3169 infoArray[11].physicalType = LowOpndRegType_scratch; 3170 #ifdef DEBUG_CALL_STACK 3171 infoArray[numTmps].regNum = 5; 3172 infoArray[numTmps].refCount = 2; 3173 infoArray[numTmps].physicalType = LowOpndRegType_scratch; 3174 numTmps++; 3175 #endif 3176 infoArray[numTmps].regNum = PhysicalReg_EBX; 3177 /* used to hold chaining cell 3178 updated to be returnAddr 3179 then conditionally updated to zero 3180 used to update inJitCodeCache 3181 compare against zero to determine whether to jump to native code 3182 jump to native code (%ebx) 3183 */ 3184 infoArray[numTmps].refCount = 3+1+1; 3185 infoArray[numTmps].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3186 numTmps++; 3187 infoArray[numTmps].regNum = 17; 3188 infoArray[numTmps].refCount = 2; //DU 3189 infoArray[numTmps].physicalType = LowOpndRegType_gp; 3190 numTmps++; 3191 infoArray[numTmps].regNum = 7; 3192 infoArray[numTmps].refCount = 4; //DU 3193 infoArray[numTmps].physicalType = LowOpndRegType_scratch; 3194 numTmps++; 3195 return numTmps; 3196 } 3197 3198 /* update temporaries used by predicted INVOKE_VIRTUAL & INVOKE_INTERFACE */ 3199 int updateGenPrediction(TempRegInfo* infoArray, bool isInterface) { 3200 infoArray[0].regNum = 40; 3201 infoArray[0].physicalType = LowOpndRegType_gp; 3202 infoArray[1].regNum = 41; 3203 infoArray[1].physicalType = LowOpndRegType_gp; 3204 infoArray[2].regNum = 32; 3205 infoArray[2].refCount = 2; 3206 infoArray[2].physicalType = LowOpndRegType_gp; 3207 3208 if(isInterface) { 3209 infoArray[0].refCount = 2+2; 3210 infoArray[1].refCount = 3+2-1; //for temp41, -1 for gingerbread 3211 infoArray[3].regNum = 33; 3212 infoArray[3].refCount = 4+1; 3213 infoArray[3].physicalType = LowOpndRegType_gp; 3214 infoArray[4].regNum = PhysicalReg_EAX; 3215 infoArray[4].refCount = 5; 3216 infoArray[4].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3217 infoArray[5].regNum = PhysicalReg_ECX; 3218 infoArray[5].refCount = 1+1+2; //used in ArgsDone (twice) 3219 infoArray[5].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3220 infoArray[6].regNum = 10; 3221 infoArray[6].refCount = 2; 3222 infoArray[6].physicalType = LowOpndRegType_scratch; 3223 infoArray[7].regNum = 9; 3224 infoArray[7].refCount = 2; 3225 infoArray[7].physicalType = LowOpndRegType_scratch; 3226 infoArray[8].regNum = 8; 3227 infoArray[8].refCount = 2; 3228 infoArray[8].physicalType = LowOpndRegType_scratch; 3229 infoArray[9].regNum = PhysicalReg_EDX; //space holder 3230 infoArray[9].refCount = 1; 3231 infoArray[9].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3232 infoArray[10].regNum = 43; 3233 infoArray[10].refCount = 3; 3234 infoArray[10].physicalType = LowOpndRegType_gp; 3235 infoArray[11].regNum = 44; 3236 infoArray[11].refCount = 3; 3237 infoArray[11].physicalType = LowOpndRegType_gp; 3238 infoArray[12].regNum = 45; 3239 infoArray[12].refCount = 2; 3240 infoArray[12].physicalType = LowOpndRegType_gp; 3241 infoArray[13].regNum = 7; 3242 infoArray[13].refCount = 4; 3243 infoArray[13].physicalType = LowOpndRegType_scratch; 3244 return 14; 3245 } else { //virtual or virtual_quick 3246 infoArray[0].refCount = 2+2; 3247 infoArray[1].refCount = 3+2-2; //for temp41, -2 for gingerbread 3248 infoArray[2].refCount++; //for temp32 gingerbread 3249 infoArray[3].regNum = 33; 3250 infoArray[3].refCount = 4+1; 3251 infoArray[3].physicalType = LowOpndRegType_gp; 3252 infoArray[4].regNum = 34; 3253 infoArray[4].refCount = 2; 3254 infoArray[4].physicalType = LowOpndRegType_gp; 3255 infoArray[5].regNum = PhysicalReg_EAX; 3256 infoArray[5].refCount = 2; 3257 infoArray[5].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3258 infoArray[6].regNum = PhysicalReg_ECX; 3259 infoArray[6].refCount = 1+3+2; 3260 infoArray[6].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3261 infoArray[7].regNum = 10; 3262 infoArray[7].refCount = 2; 3263 infoArray[7].physicalType = LowOpndRegType_scratch; 3264 infoArray[8].regNum = PhysicalReg_EDX; //space holder 3265 infoArray[8].refCount = 1; 3266 infoArray[8].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3267 infoArray[9].regNum = 43; 3268 infoArray[9].refCount = 3; 3269 infoArray[9].physicalType = LowOpndRegType_gp; 3270 infoArray[10].regNum = 44; 3271 infoArray[10].refCount = 3; 3272 infoArray[10].physicalType = LowOpndRegType_gp; 3273 infoArray[11].regNum = 7; 3274 infoArray[11].refCount = 4; 3275 infoArray[11].physicalType = LowOpndRegType_scratch; 3276 return 12; 3277 } 3278 } 3279 3280 int updateMarkCard(TempRegInfo* infoArray, int j1/*valReg*/, 3281 int j2/*tgtAddrReg*/, int j3/*scratchReg*/) { 3282 infoArray[j3].regNum = 11; 3283 infoArray[j3].physicalType = LowOpndRegType_gp; 3284 infoArray[j3].refCount = 3; 3285 infoArray[j3].is8Bit = true; 3286 infoArray[j1].refCount++; 3287 infoArray[j2].refCount += 2; 3288 infoArray[j3+1].regNum = 6; 3289 infoArray[j3+1].physicalType = LowOpndRegType_scratch; 3290 infoArray[j3+1].refCount = 2; 3291 return j3+2; 3292 } 3293 3294 int updateMarkCard_notNull(TempRegInfo* infoArray, 3295 int j2/*tgtAddrReg*/, int j3/*scratchReg*/) { 3296 infoArray[j3].regNum = 11; 3297 infoArray[j3].physicalType = LowOpndRegType_gp; 3298 infoArray[j3].refCount = 3; 3299 infoArray[j3].is8Bit = true; 3300 infoArray[j2].refCount += 2; 3301 infoArray[j3+1].regNum = 2; 3302 infoArray[j3+1].refCount = 2; //DU 3303 infoArray[j3+1].physicalType = LowOpndRegType_scratch; 3304 return j3+2; 3305 } 3306 3307 int iget_obj_inst = -1; 3308 //! This function updates infoArray with temporaries accessed when lowering the bytecode 3309 3310 //! returns the number of temporaries 3311 int getTempRegInfo(TempRegInfo* infoArray) { //returns an array of TempRegInfo 3312 int k; 3313 int numTmps; 3314 for(k = 0; k < MAX_TEMP_REG_PER_BYTECODE; k++) { 3315 infoArray[k].linkageToVR = -1; 3316 infoArray[k].versionNum = 0; 3317 infoArray[k].shareWithVR = true; 3318 infoArray[k].is8Bit = false; 3319 } 3320 u2 vA, v1, length, num, tmp; 3321 u2 inst_op = INST_INST(inst); 3322 s2 tmp_s2; 3323 s4 tmp_s4; 3324 switch(inst_op) { 3325 case OP_APUT_BYTE: 3326 for(k = 0; k < MAX_TEMP_REG_PER_BYTECODE; k++) 3327 infoArray[k].shareWithVR = true; //false; 3328 break; 3329 } 3330 switch (INST_INST(inst)) { 3331 case OP_NOP: 3332 return 0; 3333 case OP_MOVE: 3334 case OP_MOVE_OBJECT: 3335 case OP_MOVE_FROM16: 3336 case OP_MOVE_OBJECT_FROM16: 3337 case OP_MOVE_16: 3338 case OP_MOVE_OBJECT_16: 3339 infoArray[0].regNum = 1; 3340 infoArray[0].refCount = 2; //DU 3341 infoArray[0].physicalType = LowOpndRegType_gp; 3342 return 1; 3343 case OP_MOVE_WIDE: 3344 case OP_MOVE_WIDE_FROM16: 3345 case OP_MOVE_WIDE_16: 3346 infoArray[0].regNum = 1; 3347 infoArray[0].refCount = 2; //DU 3348 infoArray[0].physicalType = LowOpndRegType_xmm; 3349 return 1; 3350 case OP_MOVE_RESULT: 3351 case OP_MOVE_RESULT_OBJECT: 3352 infoArray[0].regNum = 1; 3353 infoArray[0].refCount = 2; //DU 3354 infoArray[0].physicalType = LowOpndRegType_gp; 3355 infoArray[1].regNum = 1; 3356 infoArray[1].refCount = 2; //DU 3357 infoArray[1].physicalType = LowOpndRegType_scratch; 3358 return 2; 3359 case OP_MOVE_RESULT_WIDE: 3360 infoArray[0].regNum = 1; 3361 infoArray[0].refCount = 2; //DU 3362 infoArray[0].physicalType = LowOpndRegType_xmm; 3363 infoArray[1].regNum = 1; 3364 infoArray[1].refCount = 2; //DU 3365 infoArray[1].physicalType = LowOpndRegType_scratch; 3366 return 2; 3367 case OP_MOVE_EXCEPTION: 3368 infoArray[0].regNum = 2; 3369 infoArray[0].refCount = 3; //DUU 3370 infoArray[0].physicalType = LowOpndRegType_gp; 3371 infoArray[1].regNum = 3; 3372 infoArray[1].refCount = 2; //DU 3373 infoArray[1].physicalType = LowOpndRegType_gp; 3374 infoArray[2].regNum = 1; 3375 infoArray[2].refCount = 2; //DU 3376 infoArray[2].physicalType = LowOpndRegType_scratch; 3377 return 3; 3378 3379 case OP_CONST_4: 3380 case OP_CONST_16: 3381 case OP_CONST: 3382 case OP_CONST_HIGH16: 3383 case OP_CONST_WIDE_16: 3384 case OP_CONST_WIDE_32: 3385 case OP_CONST_WIDE: 3386 case OP_CONST_WIDE_HIGH16: 3387 return 0; 3388 case OP_CONST_STRING: //hardcode %eax 3389 case OP_CONST_STRING_JUMBO: 3390 infoArray[0].regNum = 3; 3391 infoArray[0].refCount = 2; //DU 3392 infoArray[0].physicalType = LowOpndRegType_gp; 3393 infoArray[1].regNum = 1; 3394 infoArray[1].refCount = 2; //DU 3395 infoArray[1].physicalType = LowOpndRegType_scratch; 3396 infoArray[2].regNum = 2; 3397 infoArray[2].refCount = 2; //DU 3398 infoArray[2].physicalType = LowOpndRegType_scratch; 3399 infoArray[3].regNum = PhysicalReg_EAX; 3400 infoArray[3].refCount = 4; 3401 infoArray[3].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3402 return 4; 3403 case OP_CONST_CLASS: 3404 infoArray[0].regNum = 3; 3405 infoArray[0].refCount = 2; //DU 3406 infoArray[0].physicalType = LowOpndRegType_gp; 3407 infoArray[1].regNum = 1; 3408 infoArray[1].refCount = 2; //DU 3409 infoArray[1].physicalType = LowOpndRegType_scratch; 3410 infoArray[2].regNum = 2; 3411 infoArray[2].refCount = 2; //DU 3412 infoArray[2].physicalType = LowOpndRegType_scratch; 3413 infoArray[3].regNum = PhysicalReg_EAX; 3414 infoArray[3].refCount = 4; 3415 infoArray[3].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3416 return 4; 3417 3418 case OP_MONITOR_ENTER: 3419 infoArray[0].regNum = 1; 3420 infoArray[0].refCount = 3; //DU 3421 infoArray[0].physicalType = LowOpndRegType_gp; 3422 infoArray[1].regNum = 3; 3423 infoArray[1].refCount = 2; //DU 3424 infoArray[1].physicalType = LowOpndRegType_gp; 3425 infoArray[2].regNum = 1; 3426 infoArray[2].refCount = 2; //DU 3427 infoArray[2].physicalType = LowOpndRegType_scratch; 3428 infoArray[3].regNum = 2; 3429 infoArray[3].refCount = 2; //DU 3430 infoArray[3].physicalType = LowOpndRegType_scratch; 3431 infoArray[4].regNum = PhysicalReg_EDX; 3432 infoArray[4].refCount = 2; 3433 infoArray[4].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3434 return 5; 3435 case OP_MONITOR_EXIT: 3436 infoArray[0].regNum = 1; 3437 infoArray[0].refCount = 3; //DU 3438 infoArray[0].physicalType = LowOpndRegType_gp; 3439 infoArray[1].regNum = PhysicalReg_EAX; 3440 infoArray[1].refCount = 2; //DU 3441 infoArray[1].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3442 infoArray[2].regNum = 1; 3443 infoArray[2].refCount = 2; //DU 3444 infoArray[2].physicalType = LowOpndRegType_scratch; 3445 infoArray[3].regNum = PhysicalReg_EDX; 3446 infoArray[3].refCount = 2; //DU 3447 infoArray[3].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3448 infoArray[4].regNum = 2; 3449 infoArray[4].refCount = 2; //DU 3450 infoArray[4].physicalType = LowOpndRegType_scratch; 3451 infoArray[5].regNum = 3; 3452 infoArray[5].refCount = 2; //DU 3453 infoArray[5].physicalType = LowOpndRegType_scratch; 3454 return 6; 3455 case OP_CHECK_CAST: 3456 infoArray[0].regNum = 1; 3457 infoArray[0].refCount = 4; //DU 3458 infoArray[0].physicalType = LowOpndRegType_gp; 3459 infoArray[1].regNum = 4; 3460 infoArray[1].refCount = 2; //DU 3461 infoArray[1].physicalType = LowOpndRegType_gp; 3462 infoArray[2].regNum = 6; 3463 infoArray[2].refCount = 3; //DU 3464 infoArray[2].physicalType = LowOpndRegType_gp; 3465 3466 infoArray[3].regNum = 1; 3467 infoArray[3].refCount = 2; //DU 3468 infoArray[3].physicalType = LowOpndRegType_scratch; 3469 infoArray[4].regNum = 2; 3470 infoArray[4].refCount = 2; //DU 3471 infoArray[4].physicalType = LowOpndRegType_scratch; 3472 3473 infoArray[5].regNum = PhysicalReg_EAX; 3474 /* %eax has 3 live ranges 3475 1> 5 accesses: to resolve the class object 3476 2> call dvmInstanceofNonTrivial to define %eax, then use it once 3477 3> move exception object to %eax, then jump to throw_exception 3478 if WITH_JIT is true, the first live range has 6 accesses 3479 */ 3480 infoArray[5].refCount = 6; 3481 infoArray[5].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3482 infoArray[6].regNum = PhysicalReg_EDX; 3483 infoArray[6].refCount = 2; //export_pc 3484 infoArray[6].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3485 infoArray[7].regNum = PhysicalReg_ECX; 3486 infoArray[7].refCount = 1; 3487 infoArray[7].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3488 infoArray[8].regNum = 3; 3489 infoArray[8].refCount = 2; //DU 3490 infoArray[8].physicalType = LowOpndRegType_scratch; 3491 return 9; 3492 case OP_INSTANCE_OF: 3493 infoArray[0].regNum = 1; 3494 infoArray[0].refCount = 4; //DU 3495 infoArray[0].physicalType = LowOpndRegType_gp; 3496 infoArray[1].regNum = 3; 3497 infoArray[1].refCount = 4; //DU 3498 infoArray[1].physicalType = LowOpndRegType_gp; 3499 infoArray[2].regNum = 4; 3500 infoArray[2].refCount = 2; //DU 3501 infoArray[2].physicalType = LowOpndRegType_gp; 3502 infoArray[3].regNum = 6; 3503 infoArray[3].refCount = 3; //DU 3504 infoArray[3].physicalType = LowOpndRegType_gp; 3505 3506 infoArray[4].regNum = 1; 3507 infoArray[4].refCount = 2; //DU 3508 infoArray[4].physicalType = LowOpndRegType_scratch; 3509 infoArray[5].regNum = 2; 3510 infoArray[5].refCount = 2; //DU 3511 infoArray[5].physicalType = LowOpndRegType_scratch; 3512 3513 infoArray[6].regNum = PhysicalReg_EAX; 3514 infoArray[6].refCount = 6; 3515 infoArray[6].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3516 infoArray[7].regNum = 3; 3517 infoArray[7].refCount = 2; //DU 3518 infoArray[7].physicalType = LowOpndRegType_scratch; 3519 infoArray[8].regNum = PhysicalReg_EDX; 3520 infoArray[8].refCount = 2; //export_pc for class_resolve 3521 infoArray[8].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3522 return 9; 3523 3524 case OP_ARRAY_LENGTH: 3525 vA = INST_A(inst); 3526 infoArray[0].regNum = 1; 3527 infoArray[0].refCount = 3; //DU 3528 infoArray[0].physicalType = LowOpndRegType_gp; 3529 infoArray[1].regNum = 2; 3530 infoArray[1].refCount = 2; //DU 3531 infoArray[1].physicalType = LowOpndRegType_gp; 3532 infoArray[1].linkageToVR = vA; 3533 infoArray[2].regNum = PhysicalReg_EDX; 3534 infoArray[2].refCount = 2; //DU 3535 infoArray[2].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3536 return 3; 3537 case OP_NEW_INSTANCE: 3538 infoArray[0].regNum = PhysicalReg_EAX; 3539 //6: class object 3540 //3: defined by C function, used twice 3541 infoArray[0].refCount = 6; //next version has 3 references 3542 infoArray[0].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3543 infoArray[1].regNum = PhysicalReg_ECX; //before common_throw_message 3544 infoArray[1].refCount = 1; 3545 infoArray[1].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3546 3547 infoArray[2].regNum = 3; 3548 infoArray[2].refCount = 2; //DU 3549 infoArray[2].physicalType = LowOpndRegType_gp; 3550 infoArray[3].regNum = 5; 3551 infoArray[3].refCount = 2; //DU 3552 infoArray[3].physicalType = LowOpndRegType_gp; 3553 infoArray[3].is8Bit = true; 3554 infoArray[4].regNum = 6; 3555 infoArray[4].refCount = 2; //DU 3556 infoArray[4].physicalType = LowOpndRegType_gp; 3557 3558 infoArray[5].regNum = 1; 3559 infoArray[5].refCount = 2; //DU 3560 infoArray[5].physicalType = LowOpndRegType_scratch; 3561 infoArray[6].regNum = 2; 3562 infoArray[6].refCount = 2; //DU 3563 infoArray[6].physicalType = LowOpndRegType_scratch; 3564 infoArray[7].regNum = 3; 3565 infoArray[7].refCount = 2; //DU 3566 infoArray[7].physicalType = LowOpndRegType_scratch; 3567 3568 infoArray[8].regNum = PhysicalReg_EDX; //before common_throw_message 3569 infoArray[8].refCount = 2; 3570 infoArray[8].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3571 infoArray[9].regNum = 4; 3572 infoArray[9].refCount = 2; //DU 3573 infoArray[9].physicalType = LowOpndRegType_scratch; 3574 return 10; 3575 3576 case OP_NEW_ARRAY: 3577 infoArray[0].regNum = PhysicalReg_EAX; 3578 //4: class object 3579 //3: defined by C function, used twice 3580 infoArray[0].refCount = 4; //next version has 3 references 3581 infoArray[0].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3582 infoArray[1].regNum = PhysicalReg_EDX; //before common_throw_message 3583 infoArray[1].refCount = 2; 3584 infoArray[1].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3585 3586 infoArray[2].regNum = 3; 3587 infoArray[2].refCount = 2; //DU 3588 infoArray[2].physicalType = LowOpndRegType_gp; 3589 infoArray[3].regNum = 5; 3590 infoArray[3].refCount = 3; //DU 3591 infoArray[3].physicalType = LowOpndRegType_gp; 3592 3593 infoArray[4].regNum = 1; 3594 infoArray[4].refCount = 2; //DU 3595 infoArray[4].physicalType = LowOpndRegType_scratch; 3596 infoArray[5].regNum = 2; 3597 infoArray[5].refCount = 2; //DU 3598 infoArray[5].physicalType = LowOpndRegType_scratch; 3599 infoArray[6].regNum = 3; 3600 infoArray[6].refCount = 2; //DU 3601 infoArray[6].physicalType = LowOpndRegType_scratch; 3602 infoArray[7].regNum = 4; 3603 infoArray[7].refCount = 2; //DU 3604 infoArray[7].physicalType = LowOpndRegType_scratch; 3605 return 8; 3606 3607 case OP_FILLED_NEW_ARRAY: 3608 length = INST_B(inst); 3609 infoArray[0].regNum = PhysicalReg_EAX; 3610 //4: class object 3611 //3: defined by C function, used twice (array object) 3612 //length: access array object to update the content 3613 infoArray[0].refCount = 4; //next version has 5+length references 3614 infoArray[0].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3615 infoArray[1].regNum = PhysicalReg_EDX; //before common_throw_message 3616 infoArray[1].refCount = 2; 3617 infoArray[1].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3618 3619 infoArray[2].regNum = 3; 3620 infoArray[2].refCount = 2; 3621 infoArray[2].physicalType = LowOpndRegType_gp; 3622 infoArray[3].regNum = 5; 3623 infoArray[3].refCount = 2; //DU 3624 infoArray[3].physicalType = LowOpndRegType_gp; 3625 infoArray[4].regNum = 6; 3626 infoArray[4].refCount = 8; //DU 3627 infoArray[4].physicalType = LowOpndRegType_gp; 3628 infoArray[4].is8Bit = true; 3629 3630 if(length >= 1) { 3631 infoArray[5].regNum = 7; 3632 infoArray[5].refCount = 2; //DU 3633 infoArray[5].physicalType = LowOpndRegType_gp; 3634 } 3635 if(length >= 2) { 3636 infoArray[6].regNum = 8; 3637 infoArray[6].refCount = 2; //DU 3638 infoArray[6].physicalType = LowOpndRegType_gp; 3639 } 3640 if(length >= 3) { 3641 infoArray[7].regNum = 9; 3642 infoArray[7].refCount = 2; //DU 3643 infoArray[7].physicalType = LowOpndRegType_gp; 3644 } 3645 if(length >= 4) { 3646 infoArray[8].regNum = 10; 3647 infoArray[8].refCount = 2; //DU 3648 infoArray[8].physicalType = LowOpndRegType_gp; 3649 } 3650 if(length >= 5) { 3651 infoArray[9].regNum = 11; 3652 infoArray[9].refCount = 2; //DU 3653 infoArray[9].physicalType = LowOpndRegType_gp; 3654 } 3655 infoArray[5+length].regNum = 1; 3656 infoArray[5+length].refCount = 2; //DU 3657 infoArray[5+length].physicalType = LowOpndRegType_scratch; 3658 infoArray[6+length].regNum = 2; 3659 infoArray[6+length].refCount = 4; //DU 3660 infoArray[6+length].physicalType = LowOpndRegType_scratch; 3661 infoArray[7+length].regNum = 3; 3662 infoArray[7+length].refCount = 2; //DU 3663 infoArray[7+length].physicalType = LowOpndRegType_scratch; 3664 infoArray[8+length].regNum = 4; 3665 infoArray[8+length].refCount = 5; //DU 3666 infoArray[8+length].physicalType = LowOpndRegType_scratch; 3667 return 9+length; 3668 3669 case OP_FILLED_NEW_ARRAY_RANGE: 3670 length = INST_AA(inst); 3671 infoArray[0].regNum = PhysicalReg_EAX; 3672 //4: class object 3673 //3: defined by C function, used twice (array object) 3674 //if length is 0, no access to array object 3675 //else, used inside a loop 3676 infoArray[0].refCount = 4; //next version: 5+(length >= 1 ? LOOP_COUNT : 0) 3677 infoArray[0].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3678 infoArray[1].regNum = PhysicalReg_EDX; //before common_throw_message 3679 infoArray[1].refCount = 2; 3680 infoArray[1].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3681 3682 infoArray[2].regNum = 3; 3683 infoArray[2].refCount = 2; 3684 infoArray[2].physicalType = LowOpndRegType_gp; 3685 infoArray[3].regNum = 5; 3686 infoArray[3].refCount = 2; //DU 3687 infoArray[3].physicalType = LowOpndRegType_gp; 3688 infoArray[4].regNum = 6; 3689 infoArray[4].refCount = 8; //DU 3690 infoArray[4].physicalType = LowOpndRegType_gp; 3691 infoArray[4].is8Bit = true; 3692 3693 infoArray[5].regNum = 1; 3694 infoArray[5].refCount = 2; //DU 3695 infoArray[5].physicalType = LowOpndRegType_scratch; 3696 infoArray[6].regNum = 2; 3697 infoArray[6].refCount = 4; //DU 3698 infoArray[6].physicalType = LowOpndRegType_scratch; 3699 infoArray[7].regNum = 3; 3700 infoArray[7].refCount = 2; //DU 3701 infoArray[7].physicalType = LowOpndRegType_scratch; 3702 3703 infoArray[8].regNum = 7; 3704 infoArray[8].refCount = 3*(length >= 1 ? LOOP_COUNT : 0); 3705 infoArray[8].physicalType = LowOpndRegType_gp; 3706 infoArray[9].regNum = 8; 3707 infoArray[9].refCount = 3*(length >= 1 ? LOOP_COUNT : 0); 3708 infoArray[9].physicalType = LowOpndRegType_gp; 3709 infoArray[10].regNum = 9; 3710 infoArray[10].refCount = 2*(length >= 1 ? LOOP_COUNT : 0); 3711 infoArray[10].physicalType = LowOpndRegType_gp; 3712 infoArray[11].regNum = 10; 3713 infoArray[11].refCount = 2*(length >= 1 ? LOOP_COUNT : 0); 3714 infoArray[11].physicalType = LowOpndRegType_gp; 3715 infoArray[12].regNum = 4; 3716 infoArray[12].refCount = 5; //DU 3717 infoArray[12].physicalType = LowOpndRegType_scratch; 3718 return 13; 3719 3720 case OP_FILL_ARRAY_DATA: 3721 infoArray[0].regNum = PhysicalReg_EAX; 3722 infoArray[0].refCount = 2; 3723 infoArray[0].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3724 infoArray[1].regNum = PhysicalReg_EDX; //before common_throw_message 3725 #if 0//def HARDREG_OPT 3726 infoArray[1].refCount = 3; //next version has refCount of 2 3727 #else 3728 infoArray[1].refCount = 5; 3729 #endif 3730 infoArray[1].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3731 3732 infoArray[2].regNum =1; 3733 infoArray[2].refCount = 2; //DU 3734 infoArray[2].physicalType = LowOpndRegType_gp; 3735 3736 infoArray[3].regNum = 1; 3737 infoArray[3].refCount = 2; //DU 3738 infoArray[3].physicalType = LowOpndRegType_scratch; 3739 infoArray[4].regNum = 2; 3740 infoArray[4].refCount = 2; //DU 3741 infoArray[4].physicalType = LowOpndRegType_scratch; 3742 return 5; 3743 3744 case OP_THROW: 3745 infoArray[0].regNum = 1; 3746 infoArray[0].refCount = 3; //DU 3747 infoArray[0].physicalType = LowOpndRegType_gp; 3748 infoArray[1].regNum = PhysicalReg_EDX; //before common_throw_message 3749 infoArray[1].refCount = 2; 3750 infoArray[1].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3751 3752 infoArray[2].regNum = 1; 3753 infoArray[2].refCount = 2; //DU 3754 infoArray[2].physicalType = LowOpndRegType_scratch; 3755 infoArray[3].regNum = 2; 3756 infoArray[3].refCount = 2; //DU 3757 infoArray[3].physicalType = LowOpndRegType_scratch; 3758 return 4; 3759 case OP_THROW_VERIFICATION_ERROR: 3760 infoArray[0].regNum = 1; 3761 infoArray[0].refCount = 2; //DU 3762 infoArray[0].physicalType = LowOpndRegType_gp; 3763 infoArray[1].regNum = PhysicalReg_EDX; //export_pc 3764 infoArray[1].refCount = 2; 3765 infoArray[1].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3766 3767 infoArray[2].regNum = 1; 3768 infoArray[2].refCount = 2; //DU 3769 infoArray[2].physicalType = LowOpndRegType_scratch; 3770 infoArray[3].regNum = 2; 3771 infoArray[3].refCount = 2; //DU 3772 infoArray[3].physicalType = LowOpndRegType_scratch; 3773 return 4; 3774 3775 case OP_GOTO: //called function common_periodicChecks4 3776 #if defined(ENABLE_TRACING) 3777 tt = INST_AA(inst); 3778 tmp_s2 = (s2)((s2)tt << 8) >> 8; 3779 if(tmp_s2 < 0) { 3780 infoArray[0].regNum = PhysicalReg_EDX; 3781 infoArray[0].refCount = 2; 3782 infoArray[0].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3783 return 1; 3784 } 3785 #endif 3786 return 0; 3787 case OP_GOTO_16: 3788 #if defined(ENABLE_TRACING) 3789 tmp_s2 = (s2)FETCH(1); 3790 if(tmp_s2 < 0) { 3791 infoArray[0].regNum = PhysicalReg_EDX; 3792 infoArray[0].refCount = 2; 3793 infoArray[0].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3794 return 1; 3795 } 3796 #endif 3797 return 0; 3798 case OP_GOTO_32: 3799 #if defined(ENABLE_TRACING) 3800 tmp_u4 = (u4)FETCH(1); 3801 tmp_u4 |= (u4)FETCH(2) << 16; 3802 if(((s4)tmp_u4) < 0) { 3803 infoArray[0].regNum = PhysicalReg_EDX; 3804 infoArray[0].refCount = 2; 3805 infoArray[0].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3806 return 1; 3807 } 3808 #endif 3809 return 0; 3810 case OP_IF_EQ: 3811 case OP_IF_NE: 3812 case OP_IF_LT: 3813 case OP_IF_GE: 3814 case OP_IF_GT: 3815 case OP_IF_LE: 3816 infoArray[0].regNum = 1; 3817 infoArray[0].refCount = 2; //DU 3818 infoArray[0].physicalType = LowOpndRegType_gp; 3819 #if defined(ENABLE_TRACING) 3820 tmp_s2 = (s2)FETCH(1); 3821 if(tmp_s2 < 0) { 3822 infoArray[1].regNum = PhysicalReg_EDX; 3823 infoArray[1].refCount = 2; 3824 infoArray[1].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3825 return 2; 3826 } 3827 #endif 3828 return 1; 3829 case OP_IF_EQZ: //called function common_periodicChecks4 3830 case OP_IF_NEZ: 3831 case OP_IF_LTZ: 3832 case OP_IF_GEZ: 3833 case OP_IF_GTZ: 3834 case OP_IF_LEZ: 3835 #if defined(ENABLE_TRACING) 3836 tmp_s2 = (s2)FETCH(1); 3837 if(tmp_s2 < 0) { 3838 infoArray[0].regNum = PhysicalReg_EDX; 3839 infoArray[0].refCount = 2; 3840 infoArray[0].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3841 return 1; 3842 } 3843 #endif 3844 return 0; 3845 case OP_PACKED_SWITCH: //jump common_backwardBranch, which calls common_periodicChecks_entry, then jump_reg %eax 3846 case OP_SPARSE_SWITCH: //%edx, %eax 3847 infoArray[0].regNum = 1; 3848 infoArray[0].refCount = 2; //DU 3849 infoArray[0].physicalType = LowOpndRegType_gp; 3850 infoArray[1].regNum = PhysicalReg_EDX; 3851 infoArray[1].refCount = 6; 3852 infoArray[1].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3853 infoArray[2].regNum = PhysicalReg_EAX; //return by dvm helper 3854 infoArray[2].refCount = 2+1; //2 uses 3855 infoArray[2].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3856 infoArray[3].regNum = 1; 3857 infoArray[3].refCount = 2; 3858 infoArray[3].physicalType = LowOpndRegType_scratch; 3859 infoArray[4].regNum = 2; 3860 infoArray[4].refCount = 2; 3861 infoArray[4].physicalType = LowOpndRegType_scratch; 3862 return 5; 3863 3864 case OP_AGET: 3865 case OP_AGET_OBJECT: 3866 case OP_AGET_BOOLEAN: 3867 case OP_AGET_BYTE: 3868 case OP_AGET_CHAR: 3869 case OP_AGET_SHORT: 3870 vA = INST_AA(inst); 3871 infoArray[0].regNum = 1; 3872 infoArray[0].refCount = 4; //DU 3873 infoArray[0].physicalType = LowOpndRegType_gp; 3874 infoArray[1].regNum = 2; 3875 infoArray[1].refCount = 3; //DU 3876 infoArray[1].physicalType = LowOpndRegType_gp; 3877 infoArray[2].regNum = 3; 3878 infoArray[2].refCount = 2; //DU 3879 infoArray[2].physicalType = LowOpndRegType_gp; 3880 infoArray[3].regNum = 4; 3881 infoArray[3].refCount = 2; //DU 3882 infoArray[3].physicalType = LowOpndRegType_gp; 3883 infoArray[3].linkageToVR = vA; 3884 if(inst_op == OP_AGET_BYTE || inst_op == OP_AGET_BOOLEAN) 3885 infoArray[3].is8Bit = true; 3886 infoArray[4].regNum = PhysicalReg_EDX; 3887 infoArray[4].refCount = 2; 3888 infoArray[4].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3889 return 5; 3890 case OP_AGET_WIDE: 3891 infoArray[0].regNum = 1; 3892 infoArray[0].refCount = 4; //DU 3893 infoArray[0].physicalType = LowOpndRegType_gp; 3894 infoArray[1].regNum = 2; 3895 infoArray[1].refCount = 3; //DU 3896 infoArray[1].physicalType = LowOpndRegType_gp; 3897 infoArray[2].regNum = 3; 3898 infoArray[2].refCount = 2; //DU 3899 infoArray[2].physicalType = LowOpndRegType_gp; 3900 infoArray[3].regNum = 1; 3901 infoArray[3].refCount = 2; //DU 3902 infoArray[3].physicalType = LowOpndRegType_xmm; 3903 infoArray[4].regNum = PhysicalReg_EDX; 3904 infoArray[4].refCount = 2; 3905 infoArray[4].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3906 return 5; 3907 3908 case OP_APUT: 3909 case OP_APUT_BOOLEAN: 3910 case OP_APUT_BYTE: 3911 case OP_APUT_CHAR: 3912 case OP_APUT_SHORT: 3913 infoArray[0].regNum = 1; 3914 infoArray[0].refCount = 4; //DU 3915 infoArray[0].physicalType = LowOpndRegType_gp; 3916 infoArray[1].regNum = 2; 3917 infoArray[1].refCount = 3; //DU 3918 infoArray[1].physicalType = LowOpndRegType_gp; 3919 infoArray[2].regNum = 3; 3920 infoArray[2].refCount = 2; //DU 3921 infoArray[2].physicalType = LowOpndRegType_gp; 3922 infoArray[3].regNum = 4; 3923 infoArray[3].refCount = 2; //DU 3924 infoArray[3].physicalType = LowOpndRegType_gp; 3925 if(inst_op == OP_APUT_BYTE || inst_op == OP_APUT_BOOLEAN) 3926 infoArray[3].is8Bit = true; 3927 infoArray[4].regNum = PhysicalReg_EDX; 3928 infoArray[4].refCount = 2; 3929 infoArray[4].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3930 return 5; 3931 case OP_APUT_WIDE: 3932 infoArray[0].regNum = 1; 3933 infoArray[0].refCount = 4; //DU 3934 infoArray[0].physicalType = LowOpndRegType_gp; 3935 infoArray[1].regNum = 2; 3936 infoArray[1].refCount = 3; //DU 3937 infoArray[1].physicalType = LowOpndRegType_gp; 3938 infoArray[2].regNum = 3; 3939 infoArray[2].refCount = 2; //DU 3940 infoArray[2].physicalType = LowOpndRegType_gp; 3941 infoArray[3].regNum = 1; 3942 infoArray[3].refCount = 2; //DU 3943 infoArray[3].physicalType = LowOpndRegType_xmm; 3944 infoArray[4].regNum = PhysicalReg_EDX; 3945 infoArray[4].refCount = 2; 3946 infoArray[4].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3947 return 5; 3948 case OP_APUT_OBJECT: 3949 infoArray[0].regNum = 1; 3950 infoArray[0].refCount = 5+1; //DU 3951 infoArray[0].physicalType = LowOpndRegType_gp; 3952 infoArray[1].regNum = 2; //live through function call dvmCanPut 3953 infoArray[1].refCount = 3+1; //DU 3954 infoArray[1].physicalType = LowOpndRegType_gp; 3955 infoArray[2].regNum = 3; 3956 infoArray[2].refCount = 2; //DU 3957 infoArray[2].physicalType = LowOpndRegType_gp; 3958 infoArray[3].regNum = 4; 3959 infoArray[3].refCount = 4+1; //DU 3960 infoArray[3].physicalType = LowOpndRegType_gp; 3961 infoArray[4].regNum = 5; 3962 infoArray[4].refCount = 2; //DU 3963 infoArray[4].physicalType = LowOpndRegType_gp; 3964 infoArray[5].regNum = 6; 3965 infoArray[5].refCount = 2; //DU 3966 infoArray[5].physicalType = LowOpndRegType_gp; 3967 3968 infoArray[6].regNum = PhysicalReg_EDX; 3969 infoArray[6].refCount = 2; //DU 3970 infoArray[6].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3971 infoArray[7].regNum = PhysicalReg_EAX; 3972 infoArray[7].refCount = 2; //DU 3973 infoArray[7].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3974 infoArray[8].regNum = 1; 3975 infoArray[8].refCount = 2; //DU 3976 infoArray[8].physicalType = LowOpndRegType_scratch; 3977 infoArray[0].shareWithVR = false; 3978 return updateMarkCard_notNull(infoArray, 3979 0/*index for tgtAddrReg*/, 9); 3980 3981 case OP_IGET: 3982 case OP_IGET_OBJECT: 3983 case OP_IGET_VOLATILE: 3984 case OP_IGET_OBJECT_VOLATILE: 3985 case OP_IGET_BOOLEAN: 3986 case OP_IGET_BYTE: 3987 case OP_IGET_CHAR: 3988 case OP_IGET_SHORT: 3989 infoArray[0].regNum = 1; 3990 infoArray[0].refCount = 2; //DU 3991 infoArray[0].physicalType = LowOpndRegType_scratch; 3992 infoArray[1].regNum = 2; 3993 infoArray[1].refCount = 2; //DU 3994 infoArray[1].physicalType = LowOpndRegType_scratch; 3995 3996 infoArray[2].regNum = PhysicalReg_EDX; 3997 infoArray[2].refCount = 2; //DU 3998 infoArray[2].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 3999 infoArray[3].regNum = PhysicalReg_EAX; 4000 infoArray[3].refCount = 3; //DU 4001 infoArray[3].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4002 4003 infoArray[4].regNum = 3; 4004 infoArray[4].refCount = 3; //DU 4005 infoArray[4].physicalType = LowOpndRegType_gp; 4006 infoArray[5].regNum = 7; 4007 #ifdef DEBUG_IGET_OBJ 4008 //add hack for a specific instance (iget_obj_inst) of IGET_OBJECT within a method 4009 if(inst_op == OP_IGET_OBJECT && !strncmp(currentMethod->clazz->descriptor, "Lspec/benchmarks/_228_jack/Parse", 32) && 4010 !strncmp(currentMethod->name, "buildPhase3", 11)) 4011 { 4012 #if 0 4013 if(iget_obj_inst == 12) { 4014 LOGD("increase count for instance %d of %s %s", iget_obj_inst, currentMethod->clazz->descriptor, currentMethod->name); 4015 infoArray[5].refCount = 4; //DU 4016 } 4017 else 4018 #endif 4019 infoArray[5].refCount = 3; 4020 iget_obj_inst++; 4021 } 4022 else 4023 infoArray[5].refCount = 3; 4024 #else 4025 infoArray[5].refCount = 3; //DU 4026 #endif 4027 infoArray[5].physicalType = LowOpndRegType_gp; 4028 infoArray[6].regNum = 8; 4029 infoArray[6].refCount = 2; //DU 4030 infoArray[6].physicalType = LowOpndRegType_gp; 4031 infoArray[7].regNum = 9; 4032 infoArray[7].refCount = 2; //DU 4033 infoArray[7].physicalType = LowOpndRegType_gp; 4034 return 8; 4035 case OP_IPUT: 4036 case OP_IPUT_OBJECT: 4037 case OP_IPUT_VOLATILE: 4038 case OP_IPUT_OBJECT_VOLATILE: 4039 case OP_IPUT_BOOLEAN: 4040 case OP_IPUT_BYTE: 4041 case OP_IPUT_CHAR: 4042 case OP_IPUT_SHORT: 4043 infoArray[0].regNum = 1; 4044 infoArray[0].refCount = 2; //DU 4045 infoArray[0].physicalType = LowOpndRegType_scratch; 4046 infoArray[1].regNum = 2; 4047 infoArray[1].refCount = 2; //DU 4048 infoArray[1].physicalType = LowOpndRegType_scratch; 4049 4050 infoArray[2].regNum = PhysicalReg_EDX; 4051 infoArray[2].refCount = 2; //DU 4052 infoArray[2].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4053 infoArray[3].regNum = PhysicalReg_EAX; 4054 infoArray[3].refCount = 3; //DU 4055 infoArray[3].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4056 4057 infoArray[4].regNum = 3; 4058 infoArray[4].refCount = 3; //DU 4059 infoArray[4].physicalType = LowOpndRegType_gp; 4060 infoArray[5].regNum = 7; 4061 infoArray[5].refCount = 3; //DU 4062 infoArray[5].physicalType = LowOpndRegType_gp; 4063 infoArray[6].regNum = 8; 4064 infoArray[6].refCount = 2; //DU 4065 infoArray[6].physicalType = LowOpndRegType_gp; 4066 infoArray[7].regNum = 9; 4067 infoArray[7].refCount = 2; //DU 4068 infoArray[7].physicalType = LowOpndRegType_gp; 4069 if(inst_op == OP_IPUT_OBJECT || inst_op == OP_IPUT_OBJECT_VOLATILE) { 4070 infoArray[5].shareWithVR = false; 4071 return updateMarkCard(infoArray, 7/*index for valReg*/, 4072 5/*index for tgtAddrReg*/, 8); 4073 } 4074 return 8; 4075 case OP_IGET_WIDE: 4076 case OP_IGET_WIDE_VOLATILE: 4077 case OP_IPUT_WIDE: 4078 case OP_IPUT_WIDE_VOLATILE: 4079 infoArray[0].regNum = 1; 4080 infoArray[0].refCount = 2; //DU 4081 infoArray[0].physicalType = LowOpndRegType_scratch; 4082 infoArray[1].regNum = 2; 4083 infoArray[1].refCount = 2; //DU 4084 infoArray[1].physicalType = LowOpndRegType_scratch; 4085 4086 infoArray[2].regNum = PhysicalReg_EDX; 4087 infoArray[2].refCount = 2; //DU 4088 infoArray[2].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4089 infoArray[3].regNum = PhysicalReg_EAX; 4090 infoArray[3].refCount = 3; //DU 4091 infoArray[3].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4092 4093 infoArray[4].regNum = 3; 4094 infoArray[4].refCount = 3; //DU 4095 infoArray[4].physicalType = LowOpndRegType_gp; 4096 infoArray[5].regNum = 7; 4097 infoArray[5].refCount = 3; //DU 4098 infoArray[5].physicalType = LowOpndRegType_gp; 4099 infoArray[6].regNum = 8; 4100 infoArray[6].refCount = 2; //DU 4101 infoArray[6].physicalType = LowOpndRegType_gp; 4102 infoArray[7].regNum = 1; 4103 infoArray[7].refCount = 2; //DU 4104 infoArray[7].physicalType = LowOpndRegType_xmm; 4105 4106 if(inst_op == OP_IPUT_WIDE_VOLATILE || inst_op == OP_IGET_WIDE_VOLATILE) { 4107 infoArray[8].regNum = 3; 4108 infoArray[8].refCount = 2; //DU 4109 infoArray[8].physicalType = LowOpndRegType_scratch; 4110 infoArray[9].regNum = 9; 4111 infoArray[9].refCount = 2; //DU 4112 infoArray[9].physicalType = LowOpndRegType_gp; 4113 return 10; 4114 } 4115 return 8; 4116 4117 case OP_SGET: 4118 case OP_SGET_OBJECT: 4119 case OP_SGET_VOLATILE: 4120 case OP_SGET_OBJECT_VOLATILE: 4121 case OP_SGET_BOOLEAN: 4122 case OP_SGET_BYTE: 4123 case OP_SGET_CHAR: 4124 case OP_SGET_SHORT: 4125 infoArray[0].regNum = 1; 4126 infoArray[0].refCount = 2; //DU 4127 infoArray[0].physicalType = LowOpndRegType_scratch; 4128 infoArray[1].regNum = 2; 4129 infoArray[1].refCount = 2; //DU 4130 infoArray[1].physicalType = LowOpndRegType_scratch; 4131 4132 infoArray[2].regNum = PhysicalReg_EAX; 4133 infoArray[2].refCount = 2; 4134 infoArray[2].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4135 infoArray[3].regNum = 3; 4136 infoArray[3].refCount = 2; //DU 4137 infoArray[3].physicalType = LowOpndRegType_gp; 4138 infoArray[4].regNum = 7; 4139 infoArray[4].refCount = 2; //DU 4140 infoArray[4].physicalType = LowOpndRegType_gp; 4141 infoArray[5].regNum = PhysicalReg_EDX; 4142 infoArray[5].refCount = 2; //DU 4143 infoArray[5].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4144 return 6; 4145 case OP_SPUT: 4146 case OP_SPUT_OBJECT: 4147 case OP_SPUT_VOLATILE: 4148 case OP_SPUT_OBJECT_VOLATILE: 4149 case OP_SPUT_BOOLEAN: 4150 case OP_SPUT_BYTE: 4151 case OP_SPUT_CHAR: 4152 case OP_SPUT_SHORT: 4153 infoArray[0].regNum = 1; 4154 infoArray[0].refCount = 2; //DU 4155 infoArray[0].physicalType = LowOpndRegType_scratch; 4156 infoArray[1].regNum = 2; 4157 infoArray[1].refCount = 2; //DU 4158 infoArray[1].physicalType = LowOpndRegType_scratch; 4159 4160 infoArray[2].regNum = PhysicalReg_EAX; 4161 infoArray[2].refCount = 2+1; //access clazz of the field 4162 infoArray[2].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4163 infoArray[3].regNum = 3; 4164 infoArray[3].refCount = 2; //DU 4165 infoArray[3].physicalType = LowOpndRegType_gp; 4166 infoArray[4].regNum = 7; 4167 infoArray[4].refCount = 2; //DU 4168 infoArray[4].physicalType = LowOpndRegType_gp; 4169 infoArray[5].regNum = PhysicalReg_EDX; 4170 infoArray[5].refCount = 2; //DU 4171 infoArray[5].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4172 if(inst_op == OP_SPUT_OBJECT || inst_op == OP_SPUT_OBJECT_VOLATILE) { 4173 infoArray[2].shareWithVR = false; 4174 infoArray[6].regNum = 12; 4175 infoArray[6].refCount = 1; //1 def, 2 uses in updateMarkCard 4176 infoArray[6].physicalType = LowOpndRegType_gp; 4177 return updateMarkCard(infoArray, 4/*index for valReg*/, 4178 6/*index for tgtAddrReg */, 7); 4179 } 4180 return 6; 4181 case OP_SGET_WIDE: 4182 case OP_SGET_WIDE_VOLATILE: 4183 case OP_SPUT_WIDE: 4184 case OP_SPUT_WIDE_VOLATILE: 4185 infoArray[0].regNum = 1; 4186 infoArray[0].refCount = 2; //DU 4187 infoArray[0].physicalType = LowOpndRegType_scratch; 4188 infoArray[1].regNum = 2; 4189 infoArray[1].refCount = 2; //DU 4190 infoArray[1].physicalType = LowOpndRegType_scratch; 4191 4192 infoArray[2].regNum = PhysicalReg_EAX; 4193 infoArray[2].refCount = 2; 4194 infoArray[2].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4195 infoArray[3].regNum = 3; 4196 infoArray[3].refCount = 2; //DU 4197 infoArray[3].physicalType = LowOpndRegType_gp; 4198 infoArray[4].regNum = 1; 4199 infoArray[4].refCount = 2; //DU 4200 infoArray[4].physicalType = LowOpndRegType_xmm; 4201 infoArray[5].regNum = PhysicalReg_EDX; 4202 infoArray[5].refCount = 2; //DU 4203 infoArray[5].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4204 4205 if(inst_op == OP_SPUT_WIDE_VOLATILE || inst_op == OP_SGET_WIDE_VOLATILE) { 4206 infoArray[6].regNum = 3; 4207 infoArray[6].refCount = 2; //DU 4208 infoArray[6].physicalType = LowOpndRegType_scratch; 4209 infoArray[7].regNum = 9; 4210 infoArray[7].refCount = 2; //DU 4211 infoArray[7].physicalType = LowOpndRegType_gp; 4212 return 8; 4213 } 4214 return 6; 4215 4216 case OP_IGET_QUICK: 4217 case OP_IGET_OBJECT_QUICK: 4218 infoArray[0].regNum = 1; 4219 infoArray[0].refCount = 3; //DU 4220 infoArray[0].physicalType = LowOpndRegType_gp; 4221 infoArray[1].regNum = 2; 4222 infoArray[1].refCount = 2; //DU 4223 infoArray[1].physicalType = LowOpndRegType_gp; 4224 infoArray[2].regNum = PhysicalReg_EDX; 4225 infoArray[2].refCount = 2; //DU 4226 infoArray[2].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4227 return 3; 4228 case OP_IPUT_QUICK: 4229 case OP_IPUT_OBJECT_QUICK: 4230 infoArray[0].regNum = 1; 4231 infoArray[0].refCount = 3; //DU 4232 infoArray[0].physicalType = LowOpndRegType_gp; 4233 infoArray[1].regNum = 2; 4234 infoArray[1].refCount = 2; //DU 4235 infoArray[1].physicalType = LowOpndRegType_gp; 4236 infoArray[2].regNum = PhysicalReg_EDX; 4237 infoArray[2].refCount = 2; //DU 4238 infoArray[2].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4239 if(inst_op == OP_IPUT_OBJECT_QUICK) { 4240 infoArray[0].shareWithVR = false; 4241 return updateMarkCard(infoArray, 1/*index for valReg*/, 4242 0/*index for tgtAddrReg*/, 3); 4243 } 4244 return 3; 4245 case OP_IGET_WIDE_QUICK: 4246 infoArray[0].regNum = 1; 4247 infoArray[0].refCount = 3; //DU 4248 infoArray[0].physicalType = LowOpndRegType_gp; 4249 infoArray[1].regNum = 1; 4250 infoArray[1].refCount = 2; //DU 4251 infoArray[1].physicalType = LowOpndRegType_xmm; 4252 infoArray[2].regNum = PhysicalReg_EDX; 4253 infoArray[2].refCount = 2; //DU 4254 infoArray[2].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4255 return 3; 4256 case OP_IPUT_WIDE_QUICK: 4257 infoArray[0].regNum = 1; 4258 infoArray[0].refCount = 3; //DU 4259 infoArray[0].physicalType = LowOpndRegType_gp; 4260 infoArray[1].regNum = 1; 4261 infoArray[1].refCount = 2; //DU 4262 infoArray[1].physicalType = LowOpndRegType_xmm; 4263 infoArray[2].regNum = PhysicalReg_EDX; 4264 infoArray[2].refCount = 2; //DU 4265 infoArray[2].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4266 return 3; 4267 4268 case OP_RETURN_VOID: 4269 case OP_RETURN_VOID_BARRIER: 4270 return updateReturnCommon(infoArray); 4271 case OP_RETURN: 4272 case OP_RETURN_OBJECT: 4273 numTmps = updateReturnCommon(infoArray); 4274 4275 infoArray[numTmps].regNum = 21; 4276 infoArray[numTmps].refCount = 2; //DU 4277 infoArray[numTmps].physicalType = LowOpndRegType_gp; 4278 numTmps++; 4279 infoArray[numTmps].regNum = 22; 4280 infoArray[numTmps].refCount = 2; //DU 4281 infoArray[numTmps].physicalType = LowOpndRegType_gp; 4282 numTmps++; 4283 return numTmps; 4284 case OP_RETURN_WIDE: 4285 numTmps = updateReturnCommon(infoArray); 4286 4287 infoArray[numTmps].regNum = 10; 4288 infoArray[numTmps].refCount = 2; //DU 4289 infoArray[numTmps].physicalType = LowOpndRegType_scratch; 4290 numTmps++; 4291 infoArray[numTmps].regNum = 1; 4292 infoArray[numTmps].refCount = 2; //DU 4293 infoArray[numTmps].physicalType = LowOpndRegType_xmm; 4294 numTmps++; 4295 return numTmps; 4296 4297 case OP_INVOKE_VIRTUAL: 4298 case OP_INVOKE_VIRTUAL_RANGE: 4299 #ifdef PREDICTED_CHAINING 4300 numTmps = updateGenPrediction(infoArray, false /*not interface*/); 4301 infoArray[numTmps].regNum = 5; 4302 infoArray[numTmps].refCount = 3; //DU 4303 infoArray[numTmps].physicalType = LowOpndRegType_gp; 4304 numTmps++; 4305 if(inst_op == OP_INVOKE_VIRTUAL) 4306 k = updateInvokeNoRange(infoArray, numTmps); 4307 else 4308 k = updateInvokeRange(infoArray, numTmps); 4309 return k; 4310 #else 4311 infoArray[0].regNum = 3; 4312 infoArray[0].refCount = 2; //DU 4313 infoArray[0].physicalType = LowOpndRegType_gp; 4314 infoArray[1].regNum = 7; 4315 infoArray[1].refCount = 2; //DU 4316 infoArray[1].physicalType = LowOpndRegType_gp; 4317 infoArray[2].regNum = 8; 4318 infoArray[2].refCount = 2; //DU 4319 infoArray[2].physicalType = LowOpndRegType_gp; 4320 infoArray[3].regNum = 6; 4321 infoArray[3].refCount = 2; //DU 4322 infoArray[3].physicalType = LowOpndRegType_gp; 4323 infoArray[4].regNum = 5; 4324 infoArray[4].refCount = 3; //DU 4325 infoArray[4].physicalType = LowOpndRegType_gp; 4326 infoArray[5].regNum = PhysicalReg_EDX; 4327 infoArray[5].refCount = 2; //2 versions, first version DU is for exception, 2nd version: eip right before jumping to invokeArgsDone 4328 infoArray[5].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4329 infoArray[6].regNum = PhysicalReg_ECX; //ecx is ued in invokeArgsDone 4330 infoArray[6].refCount = 1+1; //used in .invokeArgsDone 4331 infoArray[6].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4332 //when WITH_JIT is true and PREDICTED_CHAINING is false 4333 // temp 8 and EAX are not used; but it is okay to keep it here 4334 infoArray[7].regNum = PhysicalReg_EAX; 4335 infoArray[7].refCount = 4; //DU 4336 infoArray[7].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4337 4338 infoArray[8].regNum = 1; 4339 infoArray[8].refCount = 2; //DU 4340 infoArray[8].physicalType = LowOpndRegType_scratch; 4341 infoArray[9].regNum = 2; 4342 infoArray[9].refCount = 2; //DU 4343 infoArray[9].physicalType = LowOpndRegType_scratch; 4344 if(inst_op == OP_INVOKE_VIRTUAL) 4345 k = updateInvokeNoRange(infoArray, 10); 4346 else 4347 k = updateInvokeRange(infoArray, 10); 4348 return k; 4349 #endif 4350 case OP_INVOKE_SUPER: 4351 case OP_INVOKE_SUPER_RANGE: 4352 infoArray[0].regNum = 3; 4353 infoArray[0].refCount = 2; //DU 4354 infoArray[0].physicalType = LowOpndRegType_gp; 4355 infoArray[1].regNum = 7; 4356 infoArray[1].refCount = 3; //DU 4357 infoArray[1].physicalType = LowOpndRegType_gp; 4358 infoArray[2].regNum = 8; 4359 infoArray[2].refCount = 3; //DU 4360 infoArray[2].physicalType = LowOpndRegType_gp; 4361 infoArray[3].regNum = 6; 4362 infoArray[3].refCount = 2; //DU 4363 infoArray[3].physicalType = LowOpndRegType_gp; 4364 infoArray[4].regNum = 9; 4365 infoArray[4].refCount = 2; //DU 4366 infoArray[4].physicalType = LowOpndRegType_gp; 4367 4368 infoArray[5].regNum = PhysicalReg_EDX; 4369 infoArray[5].refCount = 2; //DU 4370 infoArray[5].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4371 infoArray[6].regNum = PhysicalReg_ECX; 4372 infoArray[6].refCount = 1+1; //DU 4373 infoArray[6].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4374 infoArray[7].regNum = PhysicalReg_EAX; 4375 infoArray[7].refCount = 4; //DU 4376 infoArray[7].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4377 4378 infoArray[8].regNum = 1; 4379 infoArray[8].refCount = 2; //DU 4380 infoArray[8].physicalType = LowOpndRegType_scratch; 4381 infoArray[9].regNum = 2; 4382 infoArray[9].refCount = 2; //DU 4383 infoArray[9].physicalType = LowOpndRegType_scratch; 4384 infoArray[10].regNum = 3; 4385 infoArray[10].refCount = 2; //DU 4386 infoArray[10].physicalType = LowOpndRegType_scratch; 4387 infoArray[11].regNum = 4; 4388 infoArray[11].refCount = 2; //DU 4389 infoArray[11].physicalType = LowOpndRegType_scratch; 4390 if(inst_op == OP_INVOKE_SUPER) 4391 k = updateInvokeNoRange(infoArray, 12); 4392 else 4393 k = updateInvokeRange(infoArray, 12); 4394 return k; 4395 case OP_INVOKE_DIRECT: 4396 case OP_INVOKE_DIRECT_RANGE: 4397 infoArray[0].regNum = 3; 4398 infoArray[0].refCount = 2; //DU 4399 infoArray[0].physicalType = LowOpndRegType_gp; 4400 infoArray[1].regNum = 5; 4401 infoArray[1].refCount = 2; //DU 4402 infoArray[1].physicalType = LowOpndRegType_gp; 4403 4404 infoArray[2].regNum = PhysicalReg_EDX; 4405 infoArray[2].refCount = 2; //DU 4406 infoArray[2].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4407 infoArray[3].regNum = PhysicalReg_ECX; 4408 infoArray[3].refCount = 2; 4409 infoArray[3].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4410 infoArray[4].regNum = PhysicalReg_EAX; 4411 infoArray[4].refCount = 2; //DU 4412 infoArray[4].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4413 4414 infoArray[5].regNum = 1; 4415 infoArray[5].refCount = 2; //DU 4416 infoArray[5].physicalType = LowOpndRegType_scratch; 4417 infoArray[6].regNum = 2; 4418 infoArray[6].refCount = 2; //DU 4419 infoArray[6].physicalType = LowOpndRegType_scratch; 4420 if(inst_op == OP_INVOKE_DIRECT) 4421 k = updateInvokeNoRange(infoArray, 7); 4422 else 4423 k = updateInvokeRange(infoArray, 7); 4424 return k; 4425 case OP_INVOKE_STATIC: 4426 case OP_INVOKE_STATIC_RANGE: 4427 infoArray[0].regNum = 3; 4428 infoArray[0].refCount = 2; //DU 4429 infoArray[0].physicalType = LowOpndRegType_gp; 4430 4431 infoArray[1].regNum = PhysicalReg_EDX; 4432 infoArray[1].refCount = 2; //DU 4433 infoArray[1].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4434 infoArray[2].regNum = PhysicalReg_ECX; 4435 infoArray[2].refCount = 2; 4436 infoArray[2].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4437 infoArray[3].regNum = PhysicalReg_EAX; 4438 infoArray[3].refCount = 2; //DU 4439 infoArray[3].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4440 4441 infoArray[4].regNum = 1; 4442 infoArray[4].refCount = 2; //DU 4443 infoArray[4].physicalType = LowOpndRegType_scratch; 4444 infoArray[5].regNum = 2; 4445 infoArray[5].refCount = 2; //DU 4446 infoArray[5].physicalType = LowOpndRegType_scratch; 4447 if(inst_op == OP_INVOKE_STATIC) 4448 k = updateInvokeNoRange(infoArray, 6); 4449 else 4450 k = updateInvokeRange(infoArray, 6); 4451 return k; 4452 case OP_INVOKE_INTERFACE: 4453 case OP_INVOKE_INTERFACE_RANGE: 4454 #ifdef PREDICTED_CHAINING 4455 numTmps = updateGenPrediction(infoArray, true /*interface*/); 4456 infoArray[numTmps].regNum = 1; 4457 infoArray[numTmps].refCount = 3; //DU 4458 infoArray[numTmps].physicalType = LowOpndRegType_gp; 4459 numTmps++; 4460 if(inst_op == OP_INVOKE_INTERFACE) 4461 k = updateInvokeNoRange(infoArray, numTmps); 4462 else 4463 k = updateInvokeRange(infoArray, numTmps); 4464 return k; 4465 #else 4466 infoArray[0].regNum = 1; 4467 infoArray[0].refCount = 3; //DU 4468 infoArray[0].physicalType = LowOpndRegType_gp; 4469 infoArray[1].regNum = 3; 4470 infoArray[1].refCount = 2; //DU 4471 infoArray[1].physicalType = LowOpndRegType_gp; 4472 infoArray[2].regNum = 4; 4473 infoArray[2].refCount = 2; //DU 4474 infoArray[2].physicalType = LowOpndRegType_gp; 4475 infoArray[3].regNum = 5; 4476 infoArray[3].refCount = 2; //DU 4477 infoArray[3].physicalType = LowOpndRegType_gp; 4478 4479 infoArray[4].regNum = PhysicalReg_EDX; 4480 infoArray[4].refCount = 2; //DU 4481 infoArray[4].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4482 infoArray[5].regNum = PhysicalReg_ECX; 4483 infoArray[5].refCount = 1+1; //DU 4484 infoArray[5].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4485 infoArray[6].regNum = PhysicalReg_EAX; 4486 infoArray[6].refCount = 2+1; //2 uses 4487 infoArray[6].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4488 4489 infoArray[7].regNum = 1; 4490 infoArray[7].refCount = 2; //DU 4491 infoArray[7].physicalType = LowOpndRegType_scratch; 4492 infoArray[8].regNum = 2; 4493 infoArray[8].refCount = 2; //DU 4494 infoArray[8].physicalType = LowOpndRegType_scratch; 4495 infoArray[9].regNum = 3; 4496 infoArray[9].refCount = 2; //DU 4497 infoArray[9].physicalType = LowOpndRegType_scratch; 4498 if(inst_op == OP_INVOKE_INTERFACE) 4499 k = updateInvokeNoRange(infoArray, 10); 4500 else 4501 k = updateInvokeRange(infoArray, 10); 4502 return k; 4503 #endif 4504 ////////////////////////////////////////////// ALU 4505 case OP_NEG_INT: 4506 case OP_NOT_INT: 4507 infoArray[0].regNum = 1; 4508 infoArray[0].refCount = 3; //define, update, use 4509 infoArray[0].physicalType = LowOpndRegType_gp; 4510 infoArray[0].shareWithVR = false; 4511 return 1; 4512 case OP_NEG_LONG: 4513 infoArray[0].regNum = 1; 4514 infoArray[0].refCount = 2; //define, use 4515 infoArray[0].physicalType = LowOpndRegType_xmm; 4516 infoArray[1].regNum = 2; 4517 infoArray[1].refCount = 4; //define, update, use 4518 infoArray[1].physicalType = LowOpndRegType_xmm; 4519 return 2; 4520 case OP_NOT_LONG: 4521 infoArray[0].regNum = 1; 4522 infoArray[0].refCount = 3; //define, update, use 4523 infoArray[0].physicalType = LowOpndRegType_xmm; 4524 infoArray[0].shareWithVR = false; 4525 infoArray[1].regNum = 2; 4526 infoArray[1].refCount = 2; 4527 infoArray[1].physicalType = LowOpndRegType_xmm; 4528 return 2; 4529 case OP_NEG_FLOAT: 4530 infoArray[0].regNum = 1; 4531 infoArray[0].refCount = 3; //define, update, use 4532 infoArray[0].physicalType = LowOpndRegType_gp; 4533 infoArray[0].shareWithVR = false; 4534 return 1; 4535 case OP_NEG_DOUBLE: 4536 infoArray[0].regNum = 1; 4537 infoArray[0].refCount = 2; //define, use 4538 infoArray[0].physicalType = LowOpndRegType_xmm; 4539 infoArray[1].regNum = 2; 4540 infoArray[1].refCount = 3; //define, update, use 4541 infoArray[1].physicalType = LowOpndRegType_xmm; 4542 return 2; 4543 case OP_INT_TO_LONG: //hard-code eax & edx 4544 infoArray[0].regNum = PhysicalReg_EAX; 4545 infoArray[0].refCount = 2+1; 4546 infoArray[0].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4547 infoArray[0].shareWithVR = false; 4548 infoArray[1].regNum = PhysicalReg_EDX; 4549 infoArray[1].refCount = 1+1; //cdq accesses edx & eax 4550 infoArray[1].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4551 return 2; 4552 case OP_INT_TO_FLOAT: 4553 case OP_INT_TO_DOUBLE: 4554 case OP_LONG_TO_FLOAT: 4555 case OP_LONG_TO_DOUBLE: 4556 case OP_FLOAT_TO_DOUBLE: 4557 case OP_DOUBLE_TO_FLOAT: 4558 return 0; //fp stack 4559 case OP_LONG_TO_INT: 4560 infoArray[0].regNum = 1; 4561 infoArray[0].refCount = 2; 4562 infoArray[0].physicalType = LowOpndRegType_gp; 4563 return 1; 4564 case OP_FLOAT_TO_INT: 4565 case OP_DOUBLE_TO_INT: //fp stack 4566 return 0; 4567 case OP_FLOAT_TO_LONG: 4568 case OP_DOUBLE_TO_LONG: 4569 infoArray[0].regNum = 1; 4570 infoArray[0].refCount = 2; //define, use 4571 infoArray[0].physicalType = LowOpndRegType_xmm; 4572 infoArray[1].regNum = 2; 4573 infoArray[1].refCount = 2; //define, use 4574 infoArray[1].physicalType = LowOpndRegType_xmm; 4575 infoArray[2].regNum = 3; 4576 infoArray[2].refCount = 2; //define, use 4577 infoArray[2].physicalType = LowOpndRegType_xmm; 4578 return 3; 4579 case OP_INT_TO_BYTE: 4580 case OP_INT_TO_CHAR: 4581 case OP_INT_TO_SHORT: 4582 infoArray[0].regNum = 1; 4583 infoArray[0].refCount = 4; //define, update, update, use 4584 infoArray[0].physicalType = LowOpndRegType_gp; 4585 infoArray[0].shareWithVR = false; 4586 return 1; 4587 4588 case OP_ADD_INT: 4589 case OP_SUB_INT: 4590 case OP_MUL_INT: 4591 case OP_AND_INT: 4592 case OP_OR_INT: 4593 case OP_XOR_INT: 4594 case OP_ADD_INT_2ADDR: 4595 case OP_SUB_INT_2ADDR: 4596 case OP_MUL_INT_2ADDR: 4597 case OP_AND_INT_2ADDR: 4598 case OP_OR_INT_2ADDR: 4599 case OP_XOR_INT_2ADDR: 4600 if(inst_op == OP_ADD_INT || inst_op == OP_SUB_INT || inst_op == OP_MUL_INT || 4601 inst_op == OP_AND_INT || inst_op == OP_OR_INT || inst_op == OP_XOR_INT) { 4602 vA = INST_AA(inst); 4603 v1 = *((u1*)rPC + 2); 4604 } else { 4605 vA = INST_A(inst); 4606 v1 = vA; 4607 } 4608 infoArray[0].regNum = 1; 4609 infoArray[0].refCount = 3; //define, update, use 4610 infoArray[0].physicalType = LowOpndRegType_gp; 4611 if(vA != v1) 4612 infoArray[0].shareWithVR = false; 4613 return 1; //common_alu_int 4614 4615 case OP_SHL_INT: 4616 case OP_SHR_INT: 4617 case OP_USHR_INT: 4618 case OP_SHL_INT_2ADDR: 4619 case OP_SHR_INT_2ADDR: 4620 case OP_USHR_INT_2ADDR: //use %cl or %ecx? 4621 if(inst_op == OP_SHL_INT || inst_op == OP_SHR_INT || inst_op == OP_USHR_INT) { 4622 vA = INST_AA(inst); 4623 v1 = *((u1*)rPC + 2); 4624 } else { 4625 vA = INST_A(inst); 4626 v1 = vA; 4627 } 4628 infoArray[0].regNum = 1; 4629 infoArray[0].refCount = 3; //define, update, use 4630 infoArray[0].physicalType = LowOpndRegType_gp; 4631 if(vA != v1) 4632 infoArray[0].shareWithVR = false; 4633 infoArray[1].regNum = PhysicalReg_ECX; 4634 infoArray[1].refCount = 2; //define, use 4635 infoArray[1].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4636 return 2;//common_shift_int 4637 4638 case OP_DIV_INT: 4639 case OP_REM_INT: 4640 case OP_DIV_INT_2ADDR: 4641 case OP_REM_INT_2ADDR: //hard-code %eax, %edx (dividend in edx:eax; quotient in eax; remainder in edx) 4642 infoArray[0].regNum = 2; 4643 infoArray[0].refCount = 4; //define, update, use 4644 infoArray[0].physicalType = LowOpndRegType_gp; 4645 infoArray[1].regNum = PhysicalReg_EAX; //dividend, quotient 4646 infoArray[1].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4647 infoArray[1].shareWithVR = false; 4648 infoArray[2].regNum = PhysicalReg_EDX; //export_pc, output for REM 4649 infoArray[2].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4650 infoArray[3].regNum = 1; 4651 infoArray[3].refCount = 2; //define, use 4652 infoArray[3].physicalType = LowOpndRegType_scratch; 4653 if(inst_op == OP_DIV_INT || inst_op == OP_DIV_INT_2ADDR) { 4654 infoArray[1].refCount = 5; 4655 infoArray[2].refCount = 4; 4656 } else { 4657 infoArray[1].refCount = 4; 4658 infoArray[2].refCount = 5; 4659 } 4660 return 4; 4661 4662 case OP_ADD_INT_LIT16: 4663 case OP_MUL_INT_LIT16: 4664 case OP_AND_INT_LIT16: 4665 case OP_OR_INT_LIT16: 4666 case OP_XOR_INT_LIT16: 4667 case OP_ADD_INT_LIT8: 4668 case OP_MUL_INT_LIT8: 4669 case OP_AND_INT_LIT8: 4670 case OP_OR_INT_LIT8: 4671 case OP_XOR_INT_LIT8: 4672 case OP_SHL_INT_LIT8: 4673 case OP_SHR_INT_LIT8: 4674 case OP_USHR_INT_LIT8: 4675 if(inst_op == OP_ADD_INT_LIT16 || inst_op == OP_MUL_INT_LIT16 || 4676 inst_op == OP_AND_INT_LIT16 || inst_op == OP_OR_INT_LIT16 || inst_op == OP_XOR_INT_LIT16) { 4677 vA = INST_A(inst); 4678 v1 = INST_B(inst); 4679 } else { 4680 vA = INST_AA(inst); 4681 v1 = (u2)FETCH(1) & 0xff; 4682 } 4683 infoArray[0].regNum = 1; 4684 infoArray[0].refCount = 3; //define, update, use 4685 infoArray[0].physicalType = LowOpndRegType_gp; 4686 if(vA != v1) 4687 infoArray[0].shareWithVR = false; 4688 return 1; 4689 4690 case OP_RSUB_INT_LIT8: 4691 case OP_RSUB_INT: 4692 vA = INST_AA(inst); 4693 v1 = (inst_op == OP_RSUB_INT) ? INST_B(inst) : ((u2)FETCH(1) & 0xff); 4694 infoArray[0].regNum = 1; 4695 infoArray[0].refCount = 2; 4696 infoArray[0].physicalType = LowOpndRegType_gp; 4697 if(vA != v1) 4698 infoArray[0].shareWithVR = false; 4699 infoArray[1].regNum = 2; 4700 infoArray[1].refCount = 3; 4701 infoArray[1].physicalType = LowOpndRegType_gp; 4702 if(vA != v1) 4703 infoArray[1].shareWithVR = false; 4704 return 2; 4705 4706 case OP_DIV_INT_LIT16: 4707 case OP_REM_INT_LIT16: 4708 case OP_DIV_INT_LIT8: 4709 case OP_REM_INT_LIT8: 4710 if(inst_op == OP_DIV_INT_LIT8 || inst_op == OP_REM_INT_LIT8) { 4711 tmp_s2 = (s2)FETCH(1) >> 8; 4712 } 4713 else { 4714 tmp_s4 = (s2)FETCH(1); 4715 tmp_s2 = tmp_s4; 4716 } 4717 if((inst_op == OP_DIV_INT_LIT8 || inst_op == OP_DIV_INT_LIT16)) { 4718 int power = isPowerOfTwo(tmp_s2); 4719 if(power >= 1) { /* divide by a power of 2 constant */ 4720 infoArray[0].regNum = 2; 4721 infoArray[0].refCount = 3; //define, use, use 4722 infoArray[0].physicalType = LowOpndRegType_gp; 4723 infoArray[1].regNum = 1; 4724 infoArray[1].physicalType = LowOpndRegType_gp; 4725 if(power == 1) infoArray[1].refCount = 5; 4726 else infoArray[1].refCount = 6; 4727 return 2; 4728 } 4729 } 4730 if(tmp_s2 == 0) { 4731 //export_pc 4732 infoArray[0].regNum = PhysicalReg_EDX; //export_pc, output for REM 4733 infoArray[0].refCount = 2; 4734 infoArray[0].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4735 return 1; 4736 } 4737 if(inst_op == OP_DIV_INT_LIT16 || inst_op == OP_DIV_INT_LIT8) { 4738 if(tmp_s2 == -1) 4739 infoArray[1].refCount = 4+1; 4740 else 4741 infoArray[1].refCount = 4; 4742 infoArray[2].refCount = 2; //edx 4743 } else { 4744 if(tmp_s2 == -1) 4745 infoArray[1].refCount = 3+1; 4746 else 4747 infoArray[1].refCount = 3; 4748 infoArray[2].refCount = 3; //edx 4749 } 4750 infoArray[0].regNum = 2; 4751 infoArray[0].refCount = 2; //define, use 4752 infoArray[0].physicalType = LowOpndRegType_gp; 4753 infoArray[1].regNum = PhysicalReg_EAX; //dividend, quotient 4754 infoArray[1].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4755 infoArray[1].shareWithVR = false; 4756 infoArray[2].regNum = PhysicalReg_EDX; //export_pc, output for REM 4757 infoArray[2].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4758 return 3; 4759 4760 case OP_ADD_LONG: 4761 case OP_SUB_LONG: 4762 case OP_AND_LONG: 4763 case OP_OR_LONG: 4764 case OP_XOR_LONG: 4765 case OP_ADD_LONG_2ADDR: 4766 case OP_SUB_LONG_2ADDR: 4767 case OP_AND_LONG_2ADDR: 4768 case OP_OR_LONG_2ADDR: 4769 case OP_XOR_LONG_2ADDR: 4770 infoArray[0].regNum = 1; 4771 infoArray[0].refCount = 3; //define, update, use 4772 infoArray[0].physicalType = LowOpndRegType_xmm; 4773 infoArray[0].shareWithVR = false; 4774 infoArray[1].regNum = 2; 4775 infoArray[1].refCount = 2; //define, use 4776 infoArray[1].physicalType = LowOpndRegType_xmm; 4777 return 2; 4778 4779 case OP_SHL_LONG: 4780 case OP_SHL_LONG_2ADDR: 4781 infoArray[0].regNum = 1; 4782 infoArray[0].refCount = 3; //define, update, use 4783 infoArray[0].physicalType = LowOpndRegType_xmm; 4784 infoArray[0].shareWithVR = false; 4785 infoArray[1].regNum = 2; 4786 infoArray[1].refCount = 3; //define, update, use 4787 infoArray[1].physicalType = LowOpndRegType_xmm; 4788 infoArray[1].shareWithVR = false; 4789 infoArray[2].regNum = 3; 4790 infoArray[2].refCount = 2; //define, use 4791 infoArray[2].physicalType = LowOpndRegType_xmm; 4792 return 3; 4793 4794 case OP_SHR_LONG: 4795 case OP_SHR_LONG_2ADDR: 4796 infoArray[0].regNum = 1; 4797 infoArray[0].refCount = 4; //define, update, use 4798 infoArray[0].physicalType = LowOpndRegType_xmm; 4799 infoArray[0].shareWithVR = false; 4800 infoArray[1].regNum = 2; 4801 infoArray[1].refCount = 4; //define, update, use 4802 infoArray[1].physicalType = LowOpndRegType_xmm; 4803 infoArray[1].shareWithVR = false; 4804 infoArray[2].regNum = 3; 4805 infoArray[2].refCount = 2; //define, use 4806 infoArray[2].physicalType = LowOpndRegType_xmm; 4807 infoArray[3].regNum = 4; 4808 infoArray[3].refCount = 3; 4809 infoArray[3].physicalType = LowOpndRegType_xmm; 4810 infoArray[4].regNum = 5; 4811 infoArray[4].refCount = 3; 4812 infoArray[4].physicalType = LowOpndRegType_xmm; 4813 return 5; 4814 4815 case OP_USHR_LONG: 4816 case OP_USHR_LONG_2ADDR: 4817 infoArray[0].regNum = 1; 4818 infoArray[0].refCount = 3; //define, update, use 4819 infoArray[0].physicalType = LowOpndRegType_xmm; 4820 infoArray[0].shareWithVR = false; 4821 infoArray[1].regNum = 2; 4822 infoArray[1].refCount = 3; //define, update, use 4823 infoArray[1].physicalType = LowOpndRegType_xmm; 4824 infoArray[1].shareWithVR = false; 4825 infoArray[2].regNum = 3; 4826 infoArray[2].refCount = 2; //define, use 4827 infoArray[2].physicalType = LowOpndRegType_xmm; 4828 return 3; 4829 4830 case OP_MUL_LONG: //general purpose register 4831 case OP_MUL_LONG_2ADDR: 4832 infoArray[0].regNum = 1; 4833 infoArray[0].refCount = 6; 4834 infoArray[0].physicalType = LowOpndRegType_gp; 4835 infoArray[0].shareWithVR = false; 4836 infoArray[1].regNum = 2; 4837 infoArray[1].refCount = 3; 4838 infoArray[1].physicalType = LowOpndRegType_gp; 4839 infoArray[2].regNum = 3; 4840 infoArray[2].refCount = 3; 4841 infoArray[2].physicalType = LowOpndRegType_gp; 4842 infoArray[3].regNum = PhysicalReg_EAX; 4843 infoArray[3].refCount = 2+1; //for mul_opc 4844 infoArray[3].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4845 infoArray[4].regNum = PhysicalReg_EDX; 4846 infoArray[4].refCount = 2; //for mul_opc 4847 infoArray[4].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4848 return 5; 4849 4850 case OP_DIV_LONG: 4851 case OP_REM_LONG: 4852 case OP_DIV_LONG_2ADDR: 4853 case OP_REM_LONG_2ADDR: 4854 infoArray[0].regNum = 1; 4855 infoArray[0].refCount = 3; 4856 infoArray[0].physicalType = LowOpndRegType_gp; 4857 infoArray[0].shareWithVR = false; 4858 infoArray[1].regNum = 2; 4859 infoArray[1].refCount = 3; 4860 infoArray[1].physicalType = LowOpndRegType_gp; 4861 infoArray[2].regNum = 1; 4862 infoArray[2].refCount = 2; 4863 infoArray[2].physicalType = LowOpndRegType_xmm; 4864 infoArray[3].regNum = PhysicalReg_EAX; 4865 infoArray[3].refCount = 2; //defined by function call 4866 infoArray[3].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4867 infoArray[4].regNum = PhysicalReg_EDX; 4868 infoArray[4].refCount = 2; //next version has 2 references 4869 infoArray[4].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 4870 infoArray[5].regNum = 1; 4871 infoArray[5].refCount = 2; 4872 infoArray[5].physicalType = LowOpndRegType_scratch; 4873 return 6; 4874 4875 case OP_ADD_FLOAT: 4876 case OP_SUB_FLOAT: 4877 case OP_MUL_FLOAT: 4878 case OP_ADD_FLOAT_2ADDR: 4879 case OP_SUB_FLOAT_2ADDR: 4880 case OP_MUL_FLOAT_2ADDR: 4881 case OP_ADD_DOUBLE: //PhysicalReg_FP TODO 4882 case OP_SUB_DOUBLE: 4883 case OP_MUL_DOUBLE: 4884 case OP_ADD_DOUBLE_2ADDR: 4885 case OP_SUB_DOUBLE_2ADDR: 4886 case OP_MUL_DOUBLE_2ADDR: 4887 case OP_DIV_FLOAT: 4888 case OP_DIV_FLOAT_2ADDR: 4889 case OP_DIV_DOUBLE: 4890 case OP_DIV_DOUBLE_2ADDR: 4891 infoArray[0].regNum = 1; 4892 infoArray[0].refCount = 3; 4893 infoArray[0].physicalType = LowOpndRegType_xmm; 4894 //for ALU ops with 2ADDR, the temp variable can share the same physical 4895 //reg as the virtual register, since the content of VR is updated by 4896 //the content of the temp variable 4897 if(inst_op == OP_ADD_FLOAT || inst_op == OP_SUB_FLOAT || 4898 inst_op == OP_MUL_FLOAT || inst_op == OP_ADD_DOUBLE || 4899 inst_op == OP_SUB_DOUBLE || inst_op == OP_MUL_DOUBLE || 4900 inst_op == OP_DIV_FLOAT || inst_op == OP_DIV_DOUBLE) 4901 infoArray[0].shareWithVR = false; 4902 infoArray[1].regNum = 2; 4903 infoArray[1].refCount = 2; 4904 infoArray[1].physicalType = LowOpndRegType_xmm; 4905 return 2; 4906 case OP_REM_FLOAT: 4907 case OP_REM_FLOAT_2ADDR: 4908 infoArray[0].regNum = 1; 4909 infoArray[0].refCount = 2; 4910 infoArray[0].physicalType = LowOpndRegType_gp; 4911 infoArray[1].regNum = 2; 4912 infoArray[1].refCount = 2; 4913 infoArray[1].physicalType = LowOpndRegType_gp; 4914 infoArray[2].regNum = 1; 4915 infoArray[2].refCount = 2; 4916 infoArray[2].physicalType = LowOpndRegType_scratch; 4917 return 3; 4918 4919 case OP_REM_DOUBLE: 4920 case OP_REM_DOUBLE_2ADDR: 4921 infoArray[0].regNum = 1; 4922 infoArray[0].refCount = 2; 4923 infoArray[0].physicalType = LowOpndRegType_xmm; 4924 infoArray[1].regNum = 2; 4925 infoArray[1].refCount = 2; 4926 infoArray[1].physicalType = LowOpndRegType_xmm; 4927 infoArray[2].regNum = 1; 4928 infoArray[2].refCount = 2; 4929 infoArray[2].physicalType = LowOpndRegType_scratch; 4930 return 3; 4931 4932 case OP_CMPL_FLOAT: 4933 case OP_CMPL_DOUBLE: 4934 infoArray[0].regNum = 1; 4935 infoArray[0].refCount = 2; 4936 infoArray[0].physicalType = LowOpndRegType_xmm; 4937 infoArray[1].regNum = 1; 4938 infoArray[1].refCount = 2; 4939 infoArray[1].physicalType = LowOpndRegType_gp; 4940 infoArray[2].regNum = 2; 4941 infoArray[2].refCount = 2; 4942 infoArray[2].physicalType = LowOpndRegType_gp; 4943 infoArray[3].regNum = 3; 4944 infoArray[3].refCount = 2; 4945 infoArray[3].physicalType = LowOpndRegType_gp; 4946 infoArray[4].regNum = 4; //return 4947 infoArray[4].refCount = 5; 4948 infoArray[4].physicalType = LowOpndRegType_gp; 4949 return 5; 4950 4951 case OP_CMPG_FLOAT: 4952 infoArray[0].regNum = 1; 4953 infoArray[0].refCount = 2; 4954 infoArray[0].physicalType = LowOpndRegType_xmm; 4955 infoArray[1].regNum = 1; 4956 infoArray[1].refCount = 2; 4957 infoArray[1].physicalType = LowOpndRegType_gp; 4958 infoArray[2].regNum = 2; 4959 infoArray[2].refCount = 3; 4960 infoArray[2].physicalType = LowOpndRegType_gp; 4961 infoArray[3].regNum = 3; 4962 infoArray[3].refCount = 5; 4963 infoArray[3].physicalType = LowOpndRegType_gp; 4964 return 4; 4965 break; 4966 case OP_CMPG_DOUBLE: 4967 infoArray[0].regNum = 1; 4968 infoArray[0].refCount = 2; 4969 infoArray[0].physicalType = LowOpndRegType_xmm; 4970 infoArray[1].regNum = 1; 4971 infoArray[1].refCount = 2; 4972 infoArray[1].physicalType = LowOpndRegType_gp; 4973 infoArray[2].regNum = 2; 4974 infoArray[2].refCount = 3; 4975 infoArray[2].physicalType = LowOpndRegType_gp; 4976 infoArray[3].regNum = 3; 4977 infoArray[3].refCount = 5; 4978 infoArray[3].physicalType = LowOpndRegType_gp; 4979 return 4; 4980 4981 case OP_CMP_LONG: 4982 infoArray[0].regNum = 1; 4983 infoArray[0].refCount = 2; 4984 infoArray[0].physicalType = LowOpndRegType_gp; 4985 infoArray[1].regNum = 2; 4986 infoArray[1].refCount = 2; 4987 infoArray[1].physicalType = LowOpndRegType_gp; 4988 infoArray[2].regNum = 3; 4989 infoArray[2].refCount = 3; 4990 infoArray[2].physicalType = LowOpndRegType_gp; 4991 infoArray[3].regNum = 4; 4992 infoArray[3].refCount = 3; 4993 infoArray[3].physicalType = LowOpndRegType_gp; 4994 infoArray[4].regNum = 5; 4995 infoArray[4].refCount = 2; 4996 infoArray[4].physicalType = LowOpndRegType_gp; 4997 infoArray[5].regNum = 6; 4998 infoArray[5].refCount = 7; 4999 infoArray[5].physicalType = LowOpndRegType_gp; 5000 return 6; 5001 5002 case OP_EXECUTE_INLINE: 5003 case OP_EXECUTE_INLINE_RANGE: 5004 if(inst_op == OP_EXECUTE_INLINE) 5005 num = INST_B(inst); 5006 else 5007 num = INST_AA(inst); 5008 tmp = FETCH(1); 5009 switch (tmp) { 5010 case INLINE_STRING_LENGTH: 5011 infoArray[0].regNum = 1; 5012 infoArray[0].refCount = 3; 5013 infoArray[0].physicalType = LowOpndRegType_gp; 5014 infoArray[1].regNum = 2; 5015 infoArray[1].refCount = 2; 5016 infoArray[1].physicalType = LowOpndRegType_gp; 5017 infoArray[2].regNum = 3; 5018 infoArray[2].refCount = 2; 5019 infoArray[2].physicalType = LowOpndRegType_gp; 5020 infoArray[3].regNum = 1; 5021 infoArray[3].refCount = 2; 5022 infoArray[3].physicalType = LowOpndRegType_scratch; 5023 return 4; 5024 case INLINE_STRING_IS_EMPTY: 5025 infoArray[0].regNum = 1; 5026 infoArray[0].refCount = 3; 5027 infoArray[0].physicalType = LowOpndRegType_gp; 5028 infoArray[1].regNum = 2; 5029 infoArray[1].refCount = 4; 5030 infoArray[1].physicalType = LowOpndRegType_gp; 5031 infoArray[2].regNum = 1; 5032 infoArray[2].refCount = 2; 5033 infoArray[2].physicalType = LowOpndRegType_scratch; 5034 return 3; 5035 case INLINE_STRING_FASTINDEXOF_II: 5036 #if defined(USE_GLOBAL_STRING_DEFS) 5037 break; 5038 #else 5039 infoArray[0].regNum = 1; 5040 infoArray[0].refCount = 14 * LOOP_COUNT; 5041 infoArray[0].physicalType = LowOpndRegType_gp; 5042 infoArray[1].regNum = 2; 5043 infoArray[1].refCount = 3 * LOOP_COUNT; 5044 infoArray[1].physicalType = LowOpndRegType_gp; 5045 infoArray[2].regNum = 3; 5046 infoArray[2].refCount = 11 * LOOP_COUNT; 5047 infoArray[2].physicalType = LowOpndRegType_gp; 5048 infoArray[3].regNum = 4; 5049 infoArray[3].refCount = 3 * LOOP_COUNT; 5050 infoArray[3].physicalType = LowOpndRegType_gp; 5051 infoArray[4].regNum = 5; 5052 infoArray[4].refCount = 9 * LOOP_COUNT; 5053 infoArray[4].physicalType = LowOpndRegType_gp; 5054 infoArray[5].regNum = 6; 5055 infoArray[5].refCount = 4 * LOOP_COUNT; 5056 infoArray[5].physicalType = LowOpndRegType_gp; 5057 infoArray[6].regNum = 7; 5058 infoArray[6].refCount = 2; 5059 infoArray[6].physicalType = LowOpndRegType_gp; 5060 infoArray[7].regNum = 1; 5061 infoArray[7].refCount = 2; 5062 infoArray[7].physicalType = LowOpndRegType_scratch; 5063 return 8; 5064 #endif 5065 case INLINE_MATH_ABS_LONG: 5066 infoArray[0].regNum = 1; 5067 infoArray[0].refCount = 7; 5068 infoArray[0].physicalType = LowOpndRegType_gp; 5069 infoArray[1].regNum = 2; 5070 infoArray[1].refCount = 2; 5071 infoArray[1].physicalType = LowOpndRegType_gp; 5072 infoArray[2].regNum = 3; 5073 infoArray[2].refCount = 3; 5074 infoArray[2].physicalType = LowOpndRegType_gp; 5075 infoArray[3].regNum = 4; 5076 infoArray[3].refCount = 3; 5077 infoArray[3].physicalType = LowOpndRegType_gp; 5078 infoArray[4].regNum = 5; 5079 infoArray[4].refCount = 2; 5080 infoArray[4].physicalType = LowOpndRegType_gp; 5081 infoArray[5].regNum = 6; 5082 infoArray[5].refCount = 5; 5083 infoArray[5].physicalType = LowOpndRegType_gp; 5084 return 6; 5085 case INLINE_MATH_ABS_INT: 5086 infoArray[0].regNum = 1; 5087 infoArray[0].refCount = 5; 5088 infoArray[0].physicalType = LowOpndRegType_gp; 5089 infoArray[1].regNum = 2; 5090 infoArray[1].refCount = 4; 5091 infoArray[1].physicalType = LowOpndRegType_gp; 5092 infoArray[2].regNum = 3; 5093 infoArray[2].refCount = 2; 5094 infoArray[2].physicalType = LowOpndRegType_gp; 5095 return 3; 5096 case INLINE_MATH_MAX_INT: 5097 infoArray[0].regNum = 1; 5098 infoArray[0].refCount = 4; 5099 infoArray[0].physicalType = LowOpndRegType_gp; 5100 infoArray[1].regNum = 2; 5101 infoArray[1].refCount = 3; 5102 infoArray[1].physicalType = LowOpndRegType_gp; 5103 infoArray[2].regNum = 3; 5104 infoArray[2].refCount = 2; 5105 infoArray[2].physicalType = LowOpndRegType_gp; 5106 return 3; 5107 case INLINE_MATH_ABS_FLOAT: 5108 infoArray[0].regNum = 1; 5109 infoArray[0].refCount = 3; 5110 infoArray[0].physicalType = LowOpndRegType_gp; 5111 infoArray[1].regNum = 2; 5112 infoArray[1].refCount = 2; 5113 infoArray[1].physicalType = LowOpndRegType_gp; 5114 return 2; 5115 case INLINE_MATH_ABS_DOUBLE: 5116 infoArray[0].regNum = 1; 5117 infoArray[0].refCount = 2; 5118 infoArray[0].physicalType = LowOpndRegType_gp; 5119 infoArray[1].regNum = 2; 5120 infoArray[1].refCount = 3; 5121 infoArray[1].physicalType = LowOpndRegType_gp; 5122 infoArray[2].regNum = 3; 5123 infoArray[2].refCount = 3; 5124 infoArray[2].physicalType = LowOpndRegType_gp; 5125 return 3; 5126 case INLINE_FLOAT_TO_RAW_INT_BITS: 5127 infoArray[0].regNum = 1; 5128 infoArray[0].refCount = 2; 5129 infoArray[0].physicalType = LowOpndRegType_gp; 5130 infoArray[1].regNum = 2; 5131 infoArray[1].refCount = 2; 5132 infoArray[1].physicalType = LowOpndRegType_gp; 5133 return 2; 5134 case INLINE_INT_BITS_TO_FLOAT: 5135 infoArray[0].regNum = 1; 5136 infoArray[0].refCount = 2; 5137 infoArray[0].physicalType = LowOpndRegType_gp; 5138 infoArray[1].regNum = 2; 5139 infoArray[1].refCount = 2; 5140 infoArray[1].physicalType = LowOpndRegType_gp; 5141 return 2; 5142 case INLINE_DOUBLE_TO_RAW_LONG_BITS: 5143 infoArray[0].regNum = 1; 5144 infoArray[0].refCount = 2; 5145 infoArray[0].physicalType = LowOpndRegType_gp; 5146 infoArray[1].regNum = 2; 5147 infoArray[1].refCount = 2; 5148 infoArray[1].physicalType = LowOpndRegType_gp; 5149 infoArray[2].regNum = 3; 5150 infoArray[2].refCount = 3; 5151 infoArray[2].physicalType = LowOpndRegType_gp; 5152 return 3; 5153 case INLINE_LONG_BITS_TO_DOUBLE: 5154 infoArray[0].regNum = 1; 5155 infoArray[0].refCount = 2; 5156 infoArray[0].physicalType = LowOpndRegType_gp; 5157 infoArray[1].regNum = 2; 5158 infoArray[1].refCount = 2; 5159 infoArray[1].physicalType = LowOpndRegType_gp; 5160 infoArray[2].regNum = 3; 5161 infoArray[2].refCount = 3; 5162 infoArray[2].physicalType = LowOpndRegType_gp; 5163 return 3; 5164 default: 5165 break; 5166 } 5167 5168 infoArray[0].regNum = 1; 5169 infoArray[0].refCount = 4; 5170 infoArray[0].physicalType = LowOpndRegType_gp; 5171 if(num >= 1) { 5172 infoArray[1].regNum = 2; 5173 infoArray[1].refCount = 2; 5174 infoArray[1].physicalType = LowOpndRegType_gp; 5175 } 5176 if(num >= 2) { 5177 infoArray[2].regNum = 3; 5178 infoArray[2].refCount = 2; 5179 infoArray[2].physicalType = LowOpndRegType_gp; 5180 } 5181 if(num >= 3) { 5182 infoArray[3].regNum = 4; 5183 infoArray[3].refCount = 2; 5184 infoArray[3].physicalType = LowOpndRegType_gp; 5185 } 5186 if(num >= 4) { 5187 infoArray[4].regNum = 5; 5188 infoArray[4].refCount = 2; 5189 infoArray[4].physicalType = LowOpndRegType_gp; 5190 } 5191 infoArray[num+1].regNum = 6; 5192 infoArray[num+1].refCount = 2; 5193 infoArray[num+1].physicalType = LowOpndRegType_gp; 5194 infoArray[num+2].regNum = PhysicalReg_EAX; 5195 infoArray[num+2].refCount = 2; 5196 infoArray[num+2].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 5197 infoArray[num+3].regNum = PhysicalReg_EDX; 5198 infoArray[num+3].refCount = 2; 5199 infoArray[num+3].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 5200 infoArray[num+4].regNum = 1; 5201 infoArray[num+4].refCount = 4; 5202 infoArray[num+4].physicalType = LowOpndRegType_scratch; 5203 return num+5; 5204 #if FIXME 5205 case OP_INVOKE_OBJECT_INIT_RANGE: 5206 return 0; 5207 #endif 5208 case OP_INVOKE_VIRTUAL_QUICK: 5209 case OP_INVOKE_VIRTUAL_QUICK_RANGE: 5210 #ifdef PREDICTED_CHAINING 5211 numTmps = updateGenPrediction(infoArray, false /*not interface*/); 5212 infoArray[numTmps].regNum = 1; 5213 infoArray[numTmps].refCount = 3; //DU 5214 infoArray[numTmps].physicalType = LowOpndRegType_gp; 5215 numTmps++; 5216 if(inst_op == OP_INVOKE_VIRTUAL_QUICK) 5217 k = updateInvokeNoRange(infoArray, numTmps); 5218 else 5219 k = updateInvokeRange(infoArray, numTmps); 5220 return k; 5221 #else 5222 infoArray[0].regNum = 1; 5223 infoArray[0].refCount = 3; 5224 infoArray[0].physicalType = LowOpndRegType_gp; 5225 infoArray[1].regNum = 2; 5226 infoArray[1].refCount = 2; 5227 infoArray[1].physicalType = LowOpndRegType_gp; 5228 infoArray[2].regNum = 3; 5229 infoArray[2].refCount = 2; 5230 infoArray[2].physicalType = LowOpndRegType_gp; 5231 5232 infoArray[3].regNum = PhysicalReg_ECX; 5233 infoArray[3].refCount = 1+1; 5234 infoArray[3].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 5235 infoArray[4].regNum = PhysicalReg_EDX; 5236 infoArray[4].refCount = 2; 5237 infoArray[4].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 5238 if(inst_op == OP_INVOKE_VIRTUAL_QUICK_RANGE) 5239 k = updateInvokeRange(infoArray, 5); 5240 else 5241 k = updateInvokeNoRange(infoArray, 5); 5242 return k; 5243 #endif 5244 case OP_INVOKE_SUPER_QUICK: 5245 case OP_INVOKE_SUPER_QUICK_RANGE: 5246 infoArray[0].regNum = 1; 5247 infoArray[0].refCount = 2; 5248 infoArray[0].physicalType = LowOpndRegType_gp; 5249 infoArray[1].regNum = 4; 5250 infoArray[1].refCount = 2; 5251 infoArray[1].physicalType = LowOpndRegType_gp; 5252 infoArray[2].regNum = 5; 5253 infoArray[2].refCount = 2; 5254 infoArray[2].physicalType = LowOpndRegType_gp; 5255 5256 infoArray[3].regNum = PhysicalReg_ECX; 5257 infoArray[3].refCount = 1+1; 5258 infoArray[3].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 5259 infoArray[4].regNum = PhysicalReg_EDX; 5260 infoArray[4].refCount = 2; 5261 infoArray[4].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 5262 5263 infoArray[5].regNum = 1; 5264 infoArray[5].refCount = 2; 5265 infoArray[5].physicalType = LowOpndRegType_scratch; 5266 infoArray[6].regNum = 2; 5267 infoArray[6].refCount = 2; 5268 infoArray[6].physicalType = LowOpndRegType_scratch; 5269 if(inst_op == OP_INVOKE_SUPER_QUICK_RANGE) 5270 k = updateInvokeRange(infoArray, 7); 5271 else 5272 k = updateInvokeNoRange(infoArray, 7); 5273 return k; 5274 #ifdef SUPPORT_HLO 5275 case kExtInstruction: 5276 switch(inst) { 5277 case OP_X_AGET_QUICK: 5278 case OP_X_AGET_OBJECT_QUICK: 5279 case OP_X_AGET_BOOLEAN_QUICK: 5280 case OP_X_AGET_BYTE_QUICK: 5281 case OP_X_AGET_CHAR_QUICK: 5282 case OP_X_AGET_SHORT_QUICK: 5283 vA = FETCH(1) & 0xff; 5284 infoArray[0].regNum = 1; 5285 infoArray[0].refCount = 2; //DU 5286 infoArray[0].physicalType = LowOpndRegType_gp; 5287 infoArray[1].regNum = 2; 5288 infoArray[1].refCount = 2; //DU 5289 infoArray[1].physicalType = LowOpndRegType_gp; 5290 infoArray[2].regNum = 3; 5291 infoArray[2].refCount = 2; //DU 5292 infoArray[2].physicalType = LowOpndRegType_gp; 5293 infoArray[3].regNum = 4; 5294 infoArray[3].refCount = 2; //DU 5295 infoArray[3].physicalType = LowOpndRegType_gp; 5296 infoArray[3].linkageToVR = vA; 5297 if(inst == OP_X_AGET_BYTE_QUICK || inst == OP_X_AGET_BOOLEAN_QUICK) 5298 infoArray[3].is8Bit = true; 5299 return 4; 5300 case OP_X_AGET_WIDE_QUICK: 5301 infoArray[0].regNum = 1; 5302 infoArray[0].refCount = 2; //DU 5303 infoArray[0].physicalType = LowOpndRegType_gp; 5304 infoArray[1].regNum = 2; 5305 infoArray[1].refCount = 2; //DU 5306 infoArray[1].physicalType = LowOpndRegType_gp; 5307 infoArray[2].regNum = 3; 5308 infoArray[2].refCount = 2; //DU 5309 infoArray[2].physicalType = LowOpndRegType_gp; 5310 infoArray[3].regNum = 1; 5311 infoArray[3].refCount = 2; //DU 5312 infoArray[3].physicalType = LowOpndRegType_xmm; 5313 return 4; 5314 case OP_X_APUT_QUICK: 5315 case OP_X_APUT_OBJECT_QUICK: 5316 case OP_X_APUT_BOOLEAN_QUICK: 5317 case OP_X_APUT_BYTE_QUICK: 5318 case OP_X_APUT_CHAR_QUICK: 5319 case OP_X_APUT_SHORT_QUICK: 5320 infoArray[0].regNum = 1; 5321 infoArray[0].refCount = 2; //DU 5322 infoArray[0].physicalType = LowOpndRegType_gp; 5323 infoArray[1].regNum = 2; 5324 infoArray[1].refCount = 2; //DU 5325 infoArray[1].physicalType = LowOpndRegType_gp; 5326 infoArray[2].regNum = 3; 5327 infoArray[2].refCount = 2; //DU 5328 infoArray[2].physicalType = LowOpndRegType_gp; 5329 infoArray[3].regNum = 4; 5330 infoArray[3].refCount = 2; //DU 5331 infoArray[3].physicalType = LowOpndRegType_gp; 5332 if(inst == OP_X_APUT_BYTE_QUICK || inst == OP_X_APUT_BOOLEAN_QUICK) 5333 infoArray[3].is8Bit = true; 5334 return 4; 5335 case OP_X_APUT_WIDE_QUICK: 5336 infoArray[0].regNum = 1; 5337 infoArray[0].refCount = 2; //DU 5338 infoArray[0].physicalType = LowOpndRegType_gp; 5339 infoArray[1].regNum = 2; 5340 infoArray[1].refCount = 2; //DU 5341 infoArray[1].physicalType = LowOpndRegType_gp; 5342 infoArray[2].regNum = 3; 5343 infoArray[2].refCount = 2; //DU 5344 infoArray[2].physicalType = LowOpndRegType_gp; 5345 infoArray[3].regNum = 1; 5346 infoArray[3].refCount = 2; //DU 5347 infoArray[3].physicalType = LowOpndRegType_xmm; 5348 return 4; 5349 case OP_X_DEREF_GET: 5350 case OP_X_DEREF_GET_OBJECT: 5351 case OP_X_DEREF_GET_BOOLEAN: 5352 case OP_X_DEREF_GET_BYTE: 5353 case OP_X_DEREF_GET_CHAR: 5354 case OP_X_DEREF_GET_SHORT: 5355 vA = FETCH(1) & 0xff; 5356 infoArray[0].regNum = 1; 5357 infoArray[0].refCount = 2; //DU 5358 infoArray[0].physicalType = LowOpndRegType_gp; 5359 infoArray[1].regNum = 2; 5360 infoArray[1].refCount = 2; //DU 5361 infoArray[1].physicalType = LowOpndRegType_gp; 5362 infoArray[1].linkageToVR = vA; 5363 if(inst == OP_X_DEREF_GET_BYTE || inst == OP_X_DEREF_GET_BOOLEAN) 5364 infoArray[1].is8Bit = true; 5365 return 2; 5366 case OP_X_DEREF_GET_WIDE: 5367 infoArray[0].regNum = 1; 5368 infoArray[0].refCount = 2; //DU 5369 infoArray[0].physicalType = LowOpndRegType_gp; 5370 infoArray[1].regNum = 1; 5371 infoArray[1].refCount = 2; //DU 5372 infoArray[1].physicalType = LowOpndRegType_xmm; 5373 return 2; 5374 case OP_X_DEREF_PUT: 5375 case OP_X_DEREF_PUT_OBJECT: 5376 case OP_X_DEREF_PUT_BOOLEAN: 5377 case OP_X_DEREF_PUT_BYTE: 5378 case OP_X_DEREF_PUT_CHAR: 5379 case OP_X_DEREF_PUT_SHORT: 5380 infoArray[0].regNum = 1; 5381 infoArray[0].refCount = 2; //DU 5382 infoArray[0].physicalType = LowOpndRegType_gp; 5383 infoArray[1].regNum = 2; 5384 infoArray[1].refCount = 2; //DU 5385 infoArray[1].physicalType = LowOpndRegType_gp; 5386 if(inst == OP_X_DEREF_PUT_BYTE || inst == OP_X_DEREF_PUT_BOOLEAN) 5387 infoArray[1].is8Bit = true; 5388 return 2; 5389 case OP_X_DEREF_PUT_WIDE: 5390 infoArray[0].regNum = 1; 5391 infoArray[0].refCount = 2; //DU 5392 infoArray[0].physicalType = LowOpndRegType_gp; 5393 infoArray[1].regNum = 1; 5394 infoArray[1].refCount = 2; //DU 5395 infoArray[1].physicalType = LowOpndRegType_xmm; 5396 return 2; 5397 case OP_X_ARRAY_CHECKS: 5398 infoArray[0].regNum = 1; 5399 infoArray[0].refCount = 3; //DU 5400 infoArray[0].physicalType = LowOpndRegType_gp; 5401 infoArray[1].regNum = 2; 5402 infoArray[1].refCount = 2; //DU 5403 infoArray[1].physicalType = LowOpndRegType_gp; 5404 return 2; 5405 case OP_X_CHECK_BOUNDS: 5406 infoArray[0].regNum = 1; 5407 infoArray[0].refCount = 2; //DU 5408 infoArray[0].physicalType = LowOpndRegType_gp; 5409 infoArray[1].regNum = 2; 5410 infoArray[1].refCount = 2; //DU 5411 infoArray[1].physicalType = LowOpndRegType_gp; 5412 return 2; 5413 case OP_X_CHECK_NULL: 5414 infoArray[0].regNum = 1; 5415 infoArray[0].refCount = 2; //DU 5416 infoArray[0].physicalType = LowOpndRegType_gp; 5417 infoArray[1].regNum = PhysicalReg_EDX; 5418 infoArray[1].refCount = 2; 5419 infoArray[1].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 5420 return 2; 5421 case OP_X_CHECK_TYPE: 5422 infoArray[0].regNum = 1; 5423 infoArray[0].refCount = 3; //DU 5424 infoArray[0].physicalType = LowOpndRegType_gp; 5425 infoArray[1].regNum = 2; 5426 infoArray[1].refCount = 3; //DU 5427 infoArray[1].physicalType = LowOpndRegType_gp; 5428 infoArray[2].regNum = 5; 5429 infoArray[2].refCount = 2; //DU 5430 infoArray[2].physicalType = LowOpndRegType_gp; 5431 infoArray[3].regNum = 6; 5432 infoArray[3].refCount = 2; //DU 5433 infoArray[3].physicalType = LowOpndRegType_gp; 5434 infoArray[4].regNum = 1; 5435 infoArray[4].refCount = 2; //DU 5436 infoArray[4].physicalType = LowOpndRegType_scratch; 5437 infoArray[5].regNum = PhysicalReg_EAX; 5438 infoArray[5].refCount = 2; 5439 infoArray[5].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 5440 return 6; 5441 case OP_X_ARRAY_OBJECT_CHECKS: 5442 infoArray[0].regNum = 1; 5443 infoArray[0].refCount = 3; //DU 5444 infoArray[0].physicalType = LowOpndRegType_gp; 5445 infoArray[1].regNum = 2; 5446 infoArray[1].refCount = 4; //DU 5447 infoArray[1].physicalType = LowOpndRegType_gp; 5448 infoArray[2].regNum = 3; 5449 infoArray[2].refCount = 2; //DU 5450 infoArray[2].physicalType = LowOpndRegType_gp; 5451 infoArray[3].regNum = 5; 5452 infoArray[3].refCount = 2; //DU 5453 infoArray[3].physicalType = LowOpndRegType_gp; 5454 infoArray[4].regNum = 6; 5455 infoArray[4].refCount = 2; //DU 5456 infoArray[4].physicalType = LowOpndRegType_gp; 5457 infoArray[5].regNum = 1; 5458 infoArray[5].refCount = 2; //DU 5459 infoArray[5].physicalType = LowOpndRegType_scratch; 5460 infoArray[6].regNum = PhysicalReg_EAX; 5461 infoArray[6].refCount = 2; 5462 infoArray[6].physicalType = LowOpndRegType_gp | LowOpndRegType_hard; 5463 return 7; 5464 } 5465 #endif 5466 } 5467 return -1; 5468 } 5469