1 /* 2 * QEMU/MIPS pseudo-board 3 * 4 * emulates a simple machine with ISA-like bus. 5 * ISA IO space mapped to the 0x14000000 (PHYS) and 6 * ISA memory at the 0x10000000 (PHYS, 16Mb in size). 7 * All peripherial devices are attached to this "bus" with 8 * the standard PC ISA addresses. 9 */ 10 #include "hw.h" 11 #include "mips.h" 12 #include "pc.h" 13 #include "isa.h" 14 #include "net.h" 15 #include "sysemu.h" 16 #include "boards.h" 17 #include "flash.h" 18 #include "qemu-log.h" 19 #include "mips-bios.h" 20 #include "ide.h" 21 #include "loader.h" 22 #include "elf.h" 23 24 #define PHYS_TO_VIRT(x) ((x) | ~(target_ulong)0x7fffffff) 25 26 #define VIRT_TO_PHYS_ADDEND (-((int64_t)(int32_t)0x80000000)) 27 28 #define MAX_IDE_BUS 2 29 30 static const int ide_iobase[2] = { 0x1f0, 0x170 }; 31 static const int ide_iobase2[2] = { 0x3f6, 0x376 }; 32 static const int ide_irq[2] = { 14, 15 }; 33 34 static PITState *pit; /* PIT i8254 */ 35 36 /* i8254 PIT is attached to the IRQ0 at PIC i8259 */ 37 38 static struct _loaderparams { 39 int ram_size; 40 const char *kernel_filename; 41 const char *kernel_cmdline; 42 const char *initrd_filename; 43 } loaderparams; 44 45 static void mips_qemu_writel (void *opaque, target_phys_addr_t addr, 46 uint32_t val) 47 { 48 if ((addr & 0xffff) == 0 && val == 42) 49 qemu_system_reset_request (); 50 else if ((addr & 0xffff) == 4 && val == 42) 51 qemu_system_shutdown_request (); 52 } 53 54 static uint32_t mips_qemu_readl (void *opaque, target_phys_addr_t addr) 55 { 56 return 0; 57 } 58 59 static CPUWriteMemoryFunc * const mips_qemu_write[] = { 60 &mips_qemu_writel, 61 &mips_qemu_writel, 62 &mips_qemu_writel, 63 }; 64 65 static CPUReadMemoryFunc * const mips_qemu_read[] = { 66 &mips_qemu_readl, 67 &mips_qemu_readl, 68 &mips_qemu_readl, 69 }; 70 71 static int mips_qemu_iomemtype = 0; 72 73 typedef struct ResetData { 74 CPUState *env; 75 uint64_t vector; 76 } ResetData; 77 78 static int64_t load_kernel(void) 79 { 80 int64_t entry, kernel_low, kernel_high; 81 long kernel_size, initrd_size, params_size; 82 ram_addr_t initrd_offset; 83 uint32_t *params_buf; 84 int big_endian; 85 86 #ifdef TARGET_WORDS_BIGENDIAN 87 big_endian = 1; 88 #else 89 big_endian = 0; 90 #endif 91 kernel_size = load_elf(loaderparams.kernel_filename, VIRT_TO_PHYS_ADDEND, 92 (uint64_t *)&entry, (uint64_t *)&kernel_low, 93 (uint64_t *)&kernel_high, big_endian, ELF_MACHINE, 1); 94 if (kernel_size >= 0) { 95 if ((entry & ~0x7fffffffULL) == 0x80000000) 96 entry = (int32_t)entry; 97 } else { 98 fprintf(stderr, "qemu: could not load kernel '%s'\n", 99 loaderparams.kernel_filename); 100 exit(1); 101 } 102 103 /* load initrd */ 104 initrd_size = 0; 105 initrd_offset = 0; 106 if (loaderparams.initrd_filename) { 107 initrd_size = get_image_size (loaderparams.initrd_filename); 108 if (initrd_size > 0) { 109 initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK; 110 if (initrd_offset + initrd_size > ram_size) { 111 fprintf(stderr, 112 "qemu: memory too small for initial ram disk '%s'\n", 113 loaderparams.initrd_filename); 114 exit(1); 115 } 116 initrd_size = load_image_targphys(loaderparams.initrd_filename, 117 initrd_offset, 118 ram_size - initrd_offset); 119 } 120 if (initrd_size == (target_ulong) -1) { 121 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n", 122 loaderparams.initrd_filename); 123 exit(1); 124 } 125 } 126 127 /* Store command line. */ 128 params_size = 264; 129 params_buf = qemu_malloc(params_size); 130 131 params_buf[0] = tswap32(ram_size); 132 params_buf[1] = tswap32(0x12345678); 133 134 if (initrd_size > 0) { 135 snprintf((char *)params_buf + 8, 256, "rd_start=0x" TARGET_FMT_lx " rd_size=%li %s", 136 PHYS_TO_VIRT((uint32_t)initrd_offset), 137 initrd_size, loaderparams.kernel_cmdline); 138 } else { 139 snprintf((char *)params_buf + 8, 256, "%s", loaderparams.kernel_cmdline); 140 } 141 142 rom_add_blob_fixed("params", params_buf, params_size, 143 (16 << 20) - 264); 144 145 return entry; 146 } 147 148 static void main_cpu_reset(void *opaque) 149 { 150 ResetData *s = (ResetData *)opaque; 151 CPUState *env = s->env; 152 153 cpu_reset(env); 154 env->active_tc.PC = s->vector; 155 } 156 157 static const int sector_len = 32 * 1024; 158 static 159 void mips_r4k_init (ram_addr_t ram_size, 160 const char *boot_device, 161 const char *kernel_filename, const char *kernel_cmdline, 162 const char *initrd_filename, const char *cpu_model) 163 { 164 char *filename; 165 ram_addr_t ram_offset; 166 ram_addr_t bios_offset; 167 int bios_size; 168 CPUState *env; 169 ResetData *reset_info; 170 RTCState *rtc_state; 171 int i; 172 qemu_irq *i8259; 173 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; 174 DriveInfo *dinfo; 175 176 /* init CPUs */ 177 if (cpu_model == NULL) { 178 #ifdef TARGET_MIPS64 179 cpu_model = "R4000"; 180 #else 181 cpu_model = "24Kf"; 182 #endif 183 } 184 env = cpu_init(cpu_model); 185 if (!env) { 186 fprintf(stderr, "Unable to find CPU definition\n"); 187 exit(1); 188 } 189 reset_info = qemu_mallocz(sizeof(ResetData)); 190 reset_info->env = env; 191 reset_info->vector = env->active_tc.PC; 192 qemu_register_reset(main_cpu_reset, reset_info); 193 194 /* allocate RAM */ 195 if (ram_size > (256 << 20)) { 196 fprintf(stderr, 197 "qemu: Too much memory for this machine: %d MB, maximum 256 MB\n", 198 ((unsigned int)ram_size / (1 << 20))); 199 exit(1); 200 } 201 ram_offset = qemu_ram_alloc(ram_size); 202 203 cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM); 204 205 if (!mips_qemu_iomemtype) { 206 mips_qemu_iomemtype = cpu_register_io_memory(mips_qemu_read, 207 mips_qemu_write, NULL); 208 } 209 cpu_register_physical_memory(0x1fbf0000, 0x10000, mips_qemu_iomemtype); 210 211 /* Try to load a BIOS image. If this fails, we continue regardless, 212 but initialize the hardware ourselves. When a kernel gets 213 preloaded we also initialize the hardware, since the BIOS wasn't 214 run. */ 215 if (bios_name == NULL) 216 bios_name = BIOS_FILENAME; 217 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); 218 if (filename) { 219 bios_size = get_image_size(filename); 220 } else { 221 bios_size = -1; 222 } 223 if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) { 224 bios_offset = qemu_ram_alloc(BIOS_SIZE); 225 cpu_register_physical_memory(0x1fc00000, BIOS_SIZE, 226 bios_offset | IO_MEM_ROM); 227 228 load_image_targphys(filename, 0x1fc00000, BIOS_SIZE); 229 } else if ((dinfo = drive_get(IF_PFLASH, 0, 0)) != NULL) { 230 uint32_t mips_rom = 0x00400000; 231 bios_offset = qemu_ram_alloc(mips_rom); 232 if (!pflash_cfi01_register(0x1fc00000, bios_offset, 233 dinfo->bdrv, sector_len, mips_rom / sector_len, 234 4, 0, 0, 0, 0)) { 235 fprintf(stderr, "qemu: Error registering flash memory.\n"); 236 } 237 } 238 else { 239 /* not fatal */ 240 fprintf(stderr, "qemu: Warning, could not load MIPS bios '%s'\n", 241 bios_name); 242 } 243 if (filename) { 244 qemu_free(filename); 245 } 246 247 if (kernel_filename) { 248 loaderparams.ram_size = ram_size; 249 loaderparams.kernel_filename = kernel_filename; 250 loaderparams.kernel_cmdline = kernel_cmdline; 251 loaderparams.initrd_filename = initrd_filename; 252 reset_info->vector = load_kernel(); 253 } 254 255 /* Init CPU internal devices */ 256 cpu_mips_irq_init_cpu(env); 257 cpu_mips_clock_init(env); 258 259 /* The PIC is attached to the MIPS CPU INT0 pin */ 260 i8259 = i8259_init(env->irq[2]); 261 isa_bus_new(NULL); 262 isa_bus_irqs(i8259); 263 264 rtc_state = rtc_init(2000); 265 266 /* Register 64 KB of ISA IO space at 0x14000000 */ 267 isa_mmio_init(0x14000000, 0x00010000); 268 isa_mem_base = 0x10000000; 269 270 pit = pit_init(0x40, i8259[0]); 271 272 for(i = 0; i < MAX_SERIAL_PORTS; i++) { 273 if (serial_hds[i]) { 274 serial_isa_init(i, serial_hds[i]); 275 } 276 } 277 278 isa_vga_init(); 279 280 if (nd_table[0].vlan) 281 isa_ne2000_init(0x300, 9, &nd_table[0]); 282 283 if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) { 284 fprintf(stderr, "qemu: too many IDE bus\n"); 285 exit(1); 286 } 287 288 for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) { 289 hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS); 290 } 291 292 for(i = 0; i < MAX_IDE_BUS; i++) 293 isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i], 294 hd[MAX_IDE_DEVS * i], 295 hd[MAX_IDE_DEVS * i + 1]); 296 297 isa_create_simple("i8042"); 298 } 299 300 static QEMUMachine mips_machine = { 301 .name = "mips", 302 .desc = "mips r4k platform", 303 .init = mips_r4k_init, 304 }; 305 306 static void mips_machine_init(void) 307 { 308 qemu_register_machine(&mips_machine); 309 } 310 311 machine_init(mips_machine_init); 312
