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  /external/llvm/lib/Target/ARM/
Thumb1FrameLowering.cpp 38 MachineBasicBlock::iterator &MBBI,
42 emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::SP, ARM::SP, NumBytes, TII,
83 MachineBasicBlock::iterator MBBI = MBB.begin();
95 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
109 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -ArgRegsSaveSize,
114 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -NumBytes,
153 if (MBBI != MBB.end() && MBBI->getOpcode() == ARM::tPUSH) {
154 ++MBBI;
    [all...]
Thumb2InstrInfo.h 41 MachineBasicBlock::iterator MBBI) const;
49 MachineBasicBlock::iterator MBBI,
55 MachineBasicBlock::iterator MBBI,
Thumb1InstrInfo.h 47 MachineBasicBlock::iterator MBBI,
53 MachineBasicBlock::iterator MBBI,
Thumb2RegisterInfo.h 33 MachineBasicBlock::iterator &MBBI,
Thumb2RegisterInfo.cpp 35 MachineBasicBlock::iterator &MBBI,
48 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2LDRpci))
Thumb2ITBlockPass.cpp 165 MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end();
166 while (MBBI != E) {
167 MachineInstr *MI = &*MBBI;
172 ++MBBI;
181 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII->get(ARM::t2IT))
190 ++MBBI;
197 for (; MBBI != E && Pos &&
198 (!MI->isBranch() && !MI->isReturn()) ; ++MBBI) {
199 if (MBBI->isDebugValue())
202 MachineInstr *NMI = &*MBBI;
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ARMLoadStoreOptimizer.cpp 84 MachineBasicBlock::iterator MBBI;
88 : Offset(o), Reg(r), isKill(k), Position(p), MBBI(i), Merged(false) {}
93 bool MergeOps(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
121 MachineBasicBlock::iterator &MBBI);
123 MachineBasicBlock::iterator MBBI,
128 MachineBasicBlock::iterator MBBI,
283 MachineBasicBlock::iterator MBBI,
338 BuildMI(MBB, MBBI, dl, TII->get(BaseOpc), NewBase)
349 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII->get(Opcode))
403 for (MIOperands MO(memOps[i].MBBI); MO.isValid(); ++MO)
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  /external/llvm/lib/Target/AArch64/
AArch64FrameLowering.cpp 51 MachineBasicBlock::iterator MBBI = MBB.begin();
54 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
89 emitSPUpdate(MBB, MBBI, DL, TII, AArch64::X16, -NumInitialBytes,
96 BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::PROLOG_LABEL))
109 for (; MBBI != MBB.end(); ++MBBI) {
114 if (FPNeedsSetting && MBBI->getOpcode() == AArch64::LSPair64_STR
115 && MBBI->getOperand(0).getReg() == AArch64::X29) {
116 int64_t X29FrameIdx = MBBI->getOperand(2).getIndex()
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AArch64BranchFixupPass.cpp 164 for (MachineFunction::iterator MBBI = MF->begin(), E = MF->end();
165 MBBI != E; ++MBBI) {
166 MachineBasicBlock *MBB = MBBI;
239 MachineFunction::iterator MBBI = MBB;
241 if (llvm::next(MBBI) == MBB->getParent()->end())
244 MachineBasicBlock *NextBB = llvm::next(MBBI);
274 for (MachineFunction::iterator MBBI = MF->begin(), E = MF->end();
275 MBBI != E; ++MBBI) {
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  /external/llvm/lib/Target/SystemZ/
SystemZElimCompare.cpp 193 MachineBasicBlock::iterator MBBI = Compare, MBBE = Branch;
194 for (++MBBI; MBBI != MBBE; ++MBBI)
195 if (getRegReferences(MBBI, SrcReg))
296 MachineBasicBlock::iterator MBBI = MI, MBBE = Compare;
297 for (++MBBI; MBBI != MBBE; ++MBBI)
298 MBBI->clearRegisterKills(SystemZ::CC, TRI)
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SystemZFrameLowering.cpp 125 MachineBasicBlock::iterator MBBI,
135 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
176 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(SystemZ::STMG));
204 TII->storeRegToStackSlot(MBB, MBBI, Reg, true, CSI[I].getFrameIdx(),
214 MachineBasicBlock::iterator MBBI,
224 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
230 TII->loadRegFromStackSlot(MBB, MBBI, Reg, CSI[I].getFrameIdx(),
246 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(SystemZ::LMG))
    [all...]
SystemZInstrInfo.h 150 MachineBasicBlock::iterator MBBI, DebugLoc DL,
155 MachineBasicBlock::iterator MBBI,
161 MachineBasicBlock::iterator MBBI,
167 MachineBasicBlock::iterator &MBBI,
178 expandPostRAPseudo(MachineBasicBlock::iterator MBBI) const LLVM_OVERRIDE;
223 // Emit code before MBBI in MI to move immediate value Value into
226 MachineBasicBlock::iterator MBBI,
  /external/llvm/lib/Target/MSP430/
MSP430FrameLowering.cpp 48 MachineBasicBlock::iterator MBBI = MBB.begin();
49 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
66 BuildMI(MBB, MBBI, DL, TII.get(MSP430::PUSH16r))
70 BuildMI(MBB, MBBI, DL, TII.get(MSP430::MOV16rr), MSP430::FPW)
82 while (MBBI != MBB.end() && (MBBI->getOpcode() == MSP430::PUSH16r))
83 ++MBBI;
85 if (MBBI != MBB.end())
86 DL = MBBI->getDebugLoc()
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MSP430BranchSelector.cpp 68 for (MachineBasicBlock::iterator MBBI = MBB->begin(), EE = MBB->end();
69 MBBI != EE; ++MBBI)
70 BlockSize += TII->GetInstSizeInBytes(MBBI);
  /external/llvm/lib/Target/Hexagon/
HexagonFrameLowering.cpp 79 MachineBasicBlock::iterator MBBI = MBB.begin();
82 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
139 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
140 unsigned RetOpcode = MBBI->getOpcode();
147 MachineBasicBlock::iterator MBBI = prior(MBB.end());
148 DebugLoc dl = MBBI->getDebugLoc();
154 MachineBasicBlock::iterator MBBI = prior(MBB.end());
159 if (MBBI->getOpcode() == Hexagon::EH_RETURN_JMPR) {
160 assert(MBBI->getOperand(0).isReg() && "Offset should be in register!")
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  /external/llvm/lib/Target/PowerPC/
PPCFrameLowering.cpp 52 MachineBasicBlock::iterator MBBI = MI;
53 ++MBBI;
54 assert(MBBI != Entry->end() && MBBI->getOpcode() == PPC::MTVRSAVE);
55 MBBI->eraseFromParent();
64 for (MBBI = I->end(); MBBI != I->begin(); ) {
65 --MBBI;
66 if (MBBI->getOpcode() == PPC::MTVRSAVE) {
67 MBBI->eraseFromParent(); // remove it
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  /external/llvm/lib/CodeGen/
ExpandISelPseudos.cpp 53 for (MachineBasicBlock::iterator MBBI = MBB->begin(), MBBE = MBB->end();
54 MBBI != MBBE; ) {
55 MachineInstr *MI = MBBI++;
66 MBBI = NewMBB->begin();
SlotIndexes.cpp 177 MachineBasicBlock::iterator MBBI = End;
179 while (ListI != ListB || MBBI != Begin || (includeStart && !pastStart)) {
185 MachineInstr *MI = (MBBI != MBB->end() && !pastStart) ? MBBI : 0;
186 bool MBBIAtBegin = MBBI == Begin && (!includeStart || pastStart);
190 if (MBBI != Begin)
191 --MBBI;
195 if (MBBI != Begin)
196 --MBBI;
  /external/llvm/lib/Target/Sparc/
SparcFrameLowering.cpp 43 MachineBasicBlock::iterator MBBI = MBB.begin();
44 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
60 BuildMI(MBB, MBBI, dl, TII.get(SAVEri), SP::O6)
66 BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1).addImm(OffHi);
68 BuildMI(MBB, MBBI, dl, TII.get(SP::ORri), SP::G1)
70 BuildMI(MBB, MBBI, dl, TII.get(SAVErr), SP::O6)
97 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
100 DebugLoc dl = MBBI->getDebugLoc();
101 assert(MBBI->getOpcode() == SP::RETL &
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  /external/llvm/lib/Target/X86/
X86PadShortFunction.cpp 68 MachineBasicBlock::iterator &MBBI,
181 for (MachineBasicBlock::iterator MBBI = MBB->begin();
182 MBBI != MBB->end(); ++MBBI) {
183 MachineInstr *MI = MBBI;
202 /// just prior to the return at MBBI
204 MachineBasicBlock::iterator &MBBI,
206 DebugLoc DL = MBBI->getDebugLoc();
209 BuildMI(*MBB, MBBI, DL, TII->get(X86::NOOP));
210 BuildMI(*MBB, MBBI, DL, TII->get(X86::NOOP))
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X86FrameLowering.cpp 90 MachineBasicBlock::iterator &MBBI,
107 unsigned Opc = MBBI->getOpcode();
121 for (unsigned i = 0, e = MBBI->getNumOperands(); i != e; ++i) {
122 MachineOperand &MO = MBBI->getOperand(i);
146 void emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
161 DebugLoc DL = MBB.findDebugLoc(MBBI);
169 : findDeadCallerSavedReg(MBB, MBBI, TRI, Is64Bit);
174 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opc))
186 MI = addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr),
189 MI = BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr
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  /external/llvm/include/llvm/CodeGen/
RegisterScavenging.h 36 MachineBasicBlock::iterator MBBI;
66 /// before MBBI. One bit per physical register. If bit is set that means it's
93 while (MBBI != I) forward();
102 while (MBBI != I) unprocess();
109 MBBI = I;
113 return MBBI;
157 return scavengeRegister(RegClass, MBBI, SPAdj);
  /external/llvm/lib/Target/XCore/
XCoreFrameLowering.cpp 92 MachineBasicBlock::iterator MBBI = MBB.begin();
98 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
104 loadFromStack(MBB, MBBI, XCore::R11, 0, dl, TII);
130 BuildMI(MBB, MBBI, dl, TII.get(Opcode)).addImm(FrameSize);
136 BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(FrameLabel);
141 storeToStack(MBB, MBBI, XCore::LR, LRSpillOffset + FrameSize*4, dl, TII);
146 BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(SaveLRLabel);
153 storeToStack(MBB, MBBI, XCore::R10, FPSpillOffset + FrameSize*4, dl, TII);
158 BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(SaveR10Label)
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  /external/llvm/lib/Target/NVPTX/
NVPTXFrameLowering.cpp 35 MachineBasicBlock::iterator MBBI = MBB.begin();
47 MBB, MBBI, dl, tm.getInstrInfo()->get(NVPTX::cvta_local_yes_64),
54 MBB, MBBI, dl, tm.getInstrInfo()->get(NVPTX::cvta_local_yes),
  /external/llvm/lib/Target/Mips/
Mips16FrameLowering.cpp 35 MachineBasicBlock::iterator MBBI = MBB.begin();
36 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
47 TII.makeFrame(Mips::SP, StackSize, MBB, MBBI);
51 BuildMI(MBB, MBBI, dl,
57 BuildMI(MBB, MBBI, dl,
72 BuildMI(MBB, MBBI, dl, TII.get(Mips::MoveR3216), Mips::S0)
79 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
83 DebugLoc dl = MBBI->getDebugLoc();
90 BuildMI(MBB, MBBI, dl, TII.get(Mips::Move32R16), Mips::SP
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