| /external/llvm/lib/Analysis/ |
| InstructionSimplify.cpp | 137 if (BinaryOperator *Op0 = dyn_cast<BinaryOperator>(LHS))
138 if (Op0->getOpcode() == OpcodeToExpand) {
140 Value *A = Op0->getOperand(0), *B = Op0->getOperand(1), *C = RHS;
197 BinaryOperator *Op0 = dyn_cast<BinaryOperator>(LHS);
200 if (!Op0 || Op0->getOpcode() != OpcodeToExtract ||
205 Value *A = Op0->getOperand(0), *B = Op0->getOperand(1);
268 BinaryOperator *Op0 = dyn_cast<BinaryOperator>(LHS)
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| FastISel.h | 191 unsigned Op0, bool Op0IsKill);
198 unsigned Op0, bool Op0IsKill,
207 unsigned Op0, bool Op0IsKill,
216 unsigned Op0, bool Op0IsKill,
225 unsigned Op0, bool Op0IsKill,
236 unsigned Op0, bool Op0IsKill,
263 unsigned Op0, bool Op0IsKill);
269 unsigned Op0, bool Op0IsKill,
276 unsigned Op0, bool Op0IsKill,
284 unsigned Op0, bool Op0IsKill
[all...] |
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineMulDivRem.cpp | 119 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
121 if (Value *V = SimplifyMulInst(Op0, Op1, TD))
128 return BinaryOperator::CreateNeg(Op0, I.getName());
163 if (Op0->hasOneUse() &&
164 match(Op0, m_Add(m_Value(X), m_ConstantInt(C1)))) {
178 if (Op0->hasOneUse()) {
181 if (match(Op0, m_Sub(m_Value(Y), m_Value(X))))
183 else if (match(Op0, m_Add(m_Value(Y), m_ConstantInt(C1))))
197 if (SelectInst *SI = dyn_cast<SelectInst>(Op0))
201 if (isa<PHINode>(Op0))
[all...] |
| InstCombineShifts.cpp | 24 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
31 if (isa<Constant>(Op0))
37 if (Instruction *Res = FoldShiftByConstant(Op0, CUI, I))
312 Instruction *InstCombiner::FoldShiftByConstant(Value *Op0, ConstantInt *Op1,
320 CanEvaluateShifted(Op0, Op1->getZExtValue(), isLeftShift, *this)) {
322 " to eliminate shift:\n IN: " << *Op0 << "\n SH: " << I <<"\n");
325 GetShiftedValue(Op0, Op1->getZExtValue(), isLeftShift, *this));
331 uint32_t TypeBits = Op0->getType()->getScalarSizeInBits();
338 return ReplaceInstUsesWith(I, Constant::getNullValue(Op0->getType()));
345 if (BinaryOperator *BO = dyn_cast<BinaryOperator>(Op0))
[all...] |
| InstCombineAndOrXor.cpp | 710 Value *Op0 = LHS->getOperand(0), *Op1 = LHS->getOperand(1);
713 return getNewICmpValue(isSigned, Code, Op0, Op1, Builder);
[all...] |
| InstCombineCompares.cpp | [all...] |
| InstCombineAddSub.cpp | [all...] |
| InstructionCombining.cpp | 213 BinaryOperator *Op0 = dyn_cast<BinaryOperator>(I.getOperand(0));
218 if (Op0 && Op0->getOpcode() == Opcode) {
219 Value *A = Op0->getOperand(0);
220 Value *B = Op0->getOperand(1);
231 (!Op0 || (isa<BinaryOperator>(Op0) && Op0->hasNoSignedWrap()))) {
233 // the operands to Op0.
269 if (Op0 && Op0->getOpcode() == Opcode)
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| FastISel.cpp | 398 unsigned Op0 = getRegForValue(I->getOperand(0));
399 if (Op0 == 0) // Unhandled operand. Halt "fast" selection and bail.
423 unsigned ResultReg = FastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0,
435 ISDOpcode, Op0, Op0IsKill, CF);
453 Op0, Op0IsKill,
789 unsigned Op0 = getRegForValue(I->getOperand(0));
790 if (Op0 == 0)
805 ResultReg).addReg(Op0);
811 ResultReg = FastEmit_r(SrcVT, DstVT, ISD::BITCAST, Op0, Op0IsKill);
[all...] |
| TargetLowering.cpp | [all...] |
| /external/llvm/include/llvm/Support/ |
| GetElementPtrTypeIterator.h | 102 gep_type_begin(Type *Op0, ArrayRef<T> A) {
103 return generic_gep_type_iterator<const T *>::begin(Op0, A.begin());
108 gep_type_end(Type * /*Op0*/, ArrayRef<T> A) {
|
| PatternMatch.h | [all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelDAGToDAG.cpp | 269 // If Op0 is null, then Node is a constant that can be loaded using:
273 // If Op0 is nonnull, then Node can be implemented using:
275 // (Opcode (Opcode Op0 UpperVal) LowerVal)
276 SDNode *splitLargeImmediate(unsigned Opcode, SDNode *Node, SDValue Op0,
363 // The base or index of AM is equivalent to Op0 + Op1, where IsBase selects
366 SDValue Op0, ConstantSDNode *Op1) {
370 changeComponent(AM, IsBase, Op0);
389 SDValue Op0 = N.getOperand(0);
392 unsigned Op0Code = Op0->getOpcode();
398 return expandAdjDynAlloc(AM, IsBase, Op0);
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelDAGToDAG.cpp | 198 SDValue Op0, Op1;
202 if (!SelectADDRrr(Op, Op0, Op1))
203 SelectADDRri(Op, Op0, Op1);
207 OutOps.push_back(Op0);
|
| /external/llvm/lib/Target/X86/ |
| X86FloatingPoint.cpp | [all...] |
| /external/llvm/include/llvm/Analysis/ |
| InstructionSimplify.h | 128 Value *SimplifyShlInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW,
135 Value *SimplifyLShrInst(Value *Op0, Value *Op1, bool isExact,
142 Value *SimplifyAShrInst(Value *Op0, Value *Op1, bool isExact,
|
| ScalarEvolution.h | 594 const SCEV *getAddExpr(const SCEV *Op0, const SCEV *Op1, const SCEV *Op2,
597 Ops.push_back(Op0);
612 const SCEV *getMulExpr(const SCEV *Op0, const SCEV *Op1, const SCEV *Op2,
615 Ops.push_back(Op0);
[all...] |
| /external/llvm/lib/Transforms/Scalar/ |
| CorrelatedValuePropagation.cpp | 163 Value *Op0 = C->getOperand(0);
164 if (isa<Instruction>(Op0) &&
165 cast<Instruction>(Op0)->getParent() == C->getParent())
|
| /external/llvm/lib/ExecutionEngine/ |
| ExecutionEngine.cpp | 576 Constant *Op0 = CE->getOperand(0);
580 GenericValue Result = getConstantValue(Op0);
589 GenericValue GV = getConstantValue(Op0);
595 GenericValue GV = getConstantValue(Op0);
601 GenericValue GV = getConstantValue(Op0);
608 GenericValue GV = getConstantValue(Op0);
614 GenericValue GV = getConstantValue(Op0);
619 GenericValue GV = getConstantValue(Op0);
634 GenericValue GV = getConstantValue(Op0);
650 GenericValue GV = getConstantValue(Op0);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMLoadStoreOptimizer.cpp | [all...] |
| ARMFastISel.cpp | 109 unsigned Op0, bool Op0IsKill);
112 unsigned Op0, bool Op0IsKill,
116 unsigned Op0, bool Op0IsKill,
121 unsigned Op0, bool Op0IsKill,
125 unsigned Op0, bool Op0IsKill,
129 unsigned Op0, bool Op0IsKill,
140 unsigned Op0, bool Op0IsKill,
305 unsigned Op0, bool Op0IsKill) {
311 .addReg(Op0, Op0IsKill * RegState::Kill));
314 .addReg(Op0, Op0IsKill * RegState::Kill))
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonPeephole.cpp | 247 MachineOperand &Op0 = MI->getOperand(0);
248 unsigned Reg0 = Op0.getReg();
251 // Handle instructions that have a prediate register in op0
|
| /external/llvm/lib/ExecutionEngine/Interpreter/ |
| Execution.cpp | [all...] |
| /external/llvm/lib/IR/ |
| AutoUpgrade.cpp | 272 Value *Op0 = CI->getArgOperand(0);
293 Rep = Builder.CreateShuffleVector(Op0, Op0, ConstantVector::get(Idxs));
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelDAGToDAG.cpp | 289 SDValue Op0, Op1;
293 if (!SelectAddr(Op, Op0, Op1))
298 OutOps.push_back(Op0);
|
