| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeTypes.h | 87 SmallDenseMap<SDValue, SDValue, 8> PromotedIntegers;
91 SmallDenseMap<SDValue, std::pair<SDValue, SDValue>, 8> ExpandedIntegers;
95 SmallDenseMap<SDValue, SDValue, 8> SoftenedFloats;
99 SmallDenseMap<SDValue, std::pair<SDValue, SDValue>, 8> ExpandedFloats
[all...] |
| /external/llvm/lib/Target/R600/ |
| R600ISelLowering.h | 29 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
30 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
32 SmallVectorImpl<SDValue> &Results,
34 virtual SDValue LowerFormalArguments(
35 SDValue Chain,
40 SmallVectorImpl<SDValue> &InVals) const;
48 SDValue LowerImplicitParameter(SelectionDAG &DAG, EVT VT,
53 SDValue OptimizeSwizzle(SDValue BuildVector, SDValue Swz[], SelectionDAG &DAG) const
[all...] |
| AMDGPUISelLowering.h | 28 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
29 SDValue LowerUDIVREM(SDValue Op, SelectionDAG &DAG) const;
37 virtual SDValue CreateLiveInRegister(SelectionDAG &DAG,
40 SDValue LowerGlobalAddress(AMDGPUMachineFunction *MFI, SDValue Op,
43 bool isHWTrueValue(SDValue Op) const;
44 bool isHWFalseValue(SDValue Op) const;
55 virtual SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv
[all...] |
| SIISelLowering.h | 24 SDValue LowerParameter(SelectionDAG &DAG, EVT VT, SDLoc DL,
25 SDValue Chain, unsigned Offset) const;
26 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
27 SDValue LowerSIGN_EXTEND(SDValue Op, SelectionDAG &DAG) const;
28 SDValue LowerZERO_EXTEND(SDValue Op, SelectionDAG &DAG) const;
29 SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZSelectionDAGInfo.h | 29 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc DL, SDValue Chain,
30 SDValue Dst, SDValue Src,
31 SDValue Size, unsigned Align,
37 virtual SDValue
39 SDValue Chain, SDValue Dst, SDValue Byte,
40 SDValue Size, unsigned Align, bool IsVolatile
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86SelectionDAGInfo.h | 37 SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
38 SDValue Chain,
39 SDValue Dst, SDValue Src,
40 SDValue Size, unsigned Align,
45 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
46 SDValue Chain,
47 SDValue Dst, SDValue Src,
48 SDValue Size, unsigned Align
[all...] |
| X86ISelLowering.h | 489 bool isZeroNode(SDValue Elt);
520 virtual SDValue getPICJumpTableRelocBase(SDValue Table,
563 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
568 virtual void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
572 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
584 virtual bool IsDesirableToPromoteOp(SDValue Op, EVT &PVT) const;
601 virtual void computeMaskedBitsForTargetNode(const SDValue Op,
609 virtual unsigned ComputeNumSignBitsForTargetNode(SDValue Op
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| /external/llvm/lib/Target/Hexagon/ |
| HexagonSelectionDAGInfo.h | 29 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
30 SDValue Chain,
31 SDValue Dst, SDValue Src,
32 SDValue Size, unsigned Align,
|
| HexagonISelLowering.h | 84 IsEligibleForTailCallOptimization(SDValue Callee,
91 const SmallVectorImpl<SDValue> &OutVals,
100 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
103 SDValue LowerBR_JT(SDValue Op, SelectionDAG &DAG) const;
104 SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const;
105 SDValue LowerINLINEASM(SDValue Op, SelectionDAG &DAG) const
[all...] |
| HexagonSelectionDAGInfo.cpp | 28 SDValue
30 EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl, SDValue Chain,
31 SDValue Dst, SDValue Src, SDValue Size, unsigned Align,
45 return SDValue();
|
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelDAGToDAG.h | 56 const SDValue &Op, char ConstraintCode, std::vector<SDValue> &OutOps);
71 inline SDValue getI32Imm(unsigned Imm) {
76 bool SelectDirectAddr(SDValue N, SDValue &Address);
78 bool SelectADDRri_imp(SDNode *OpNode, SDValue Addr, SDValue &Base,
79 SDValue &Offset, MVT mvt);
80 bool SelectADDRri(SDNode *OpNode, SDValue Addr, SDValue &Base
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| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.h | 79 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
85 SDValue LowerShifts(SDValue Op, SelectionDAG &DAG) const;
86 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
87 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
88 SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.h | 333 SDValue get_VSPLTI_elt(SDNode *N, unsigned ByteSize, SelectionDAG &DAG);
354 virtual bool getPreIndexedAddressParts(SDNode *N, SDValue &Base,
355 SDValue &Offset,
362 bool SelectAddressRegReg(SDValue N, SDValue &Base, SDValue &Index,
369 bool SelectAddressRegImm(SDValue N, SDValue &Disp, SDValue &Base,
374 bool SelectAddressRegRegOnly(SDValue N, SDValue &Base, SDValue &Index
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| /external/llvm/include/llvm/Target/ |
| TargetSelectionDAGInfo.h | 47 /// SDValue if the target declines to use custom code and a different
56 virtual SDValue
58 SDValue Chain,
59 SDValue Op1, SDValue Op2,
60 SDValue Op3, unsigned Align, bool isVolatile,
64 return SDValue();
71 /// SDValue if the target declines to use custom code and a different
73 virtual SDValue
75 SDValue Chain
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| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDGPUISelLowering.h | 27 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
28 SDValue LowerUDIVREM(SDValue Op, SelectionDAG &DAG) const;
35 SDValue CreateLiveInRegister(SelectionDAG &DAG, const TargetRegisterClass *RC,
38 bool isHWTrueValue(SDValue Op) const;
39 bool isHWFalseValue(SDValue Op) const;
44 virtual SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
48 SmallVectorImpl<SDValue> &InVals) const
[all...] |
| R600ISelLowering.h | 29 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
38 SDValue LowerImplicitParameter(SelectionDAG &DAG, EVT VT,
44 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
47 SDValue LowerROTL(SDValue Op, SelectionDAG &DAG) const;
49 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
50 SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDGPUISelLowering.h | 27 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
28 SDValue LowerUDIVREM(SDValue Op, SelectionDAG &DAG) const;
35 SDValue CreateLiveInRegister(SelectionDAG &DAG, const TargetRegisterClass *RC,
38 bool isHWTrueValue(SDValue Op) const;
39 bool isHWFalseValue(SDValue Op) const;
44 virtual SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
48 SmallVectorImpl<SDValue> &InVals) const
[all...] |
| R600ISelLowering.h | 29 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
38 SDValue LowerImplicitParameter(SelectionDAG &DAG, EVT VT,
44 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
47 SDValue LowerROTL(SDValue Op, SelectionDAG &DAG) const;
49 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
50 SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.h | 151 SDValue LowerFormalArguments(SDValue Chain,
155 SmallVectorImpl<SDValue> &InVals) const;
157 SDValue LowerReturn(SDValue Chain,
160 const SmallVectorImpl<SDValue> &OutVals,
163 SDValue LowerCall(CallLoweringInfo &CLI,
164 SmallVectorImpl<SDValue> &InVals) const;
166 SDValue LowerCallResult(SDValue Chain, SDValue InFlag
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| /external/llvm/include/llvm/CodeGen/ |
| SelectionDAG.h | 142 SDValue Root;
282 const SDValue &getRoot() const { return Root; }
286 SDValue getEntryNode() const {
287 return SDValue(const_cast<SDNode *>(&EntryNode), 0);
292 const SDValue &setRoot(SDValue N) {
358 SDValue getConstant(uint64_t Val, EVT VT, bool isTarget = false);
359 SDValue getConstant(const APInt &Val, EVT VT, bool isTarget = false);
360 SDValue getConstant(const ConstantInt &Val, EVT VT, bool isTarget = false);
361 SDValue getIntPtrConstant(uint64_t Val, bool isTarget = false)
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| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.h | 90 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
95 virtual void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
114 SDValue LowerCCCArguments(SDValue Chain,
119 SmallVectorImpl<SDValue> &InVals) const;
120 SDValue LowerCCCCallTo(SDValue Chain, SDValue Callee,
124 const SmallVectorImpl<SDValue> &OutVals
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelDAGToDAG.h | 57 virtual bool selectAddrRegImm(SDValue Addr, SDValue &Base,
58 SDValue &Offset) const;
61 virtual bool selectAddrDefault(SDValue Addr, SDValue &Base,
62 SDValue &Offset) const;
65 virtual bool selectIntAddr(SDValue Addr, SDValue &Base,
66 SDValue &Offset) const;
68 virtual bool selectAddr16(SDNode *Parent, SDValue N, SDValue &Base
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMSelectionDAGInfo.h | 48 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
49 SDValue Chain,
50 SDValue Dst, SDValue Src,
51 SDValue Size, unsigned Align,
58 SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
59 SDValue Chain,
60 SDValue Op1, SDValue Op2,
61 SDValue Op3, unsigned Align
[all...] |
| ARMISelLowering.h | 257 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
262 virtual void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
282 SDValue PerformCMOVCombine(SDNode *N, SelectionDAG &DAG) const;
283 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
299 virtual bool isZExtFree(SDValue Val, EVT VT2) const;
324 virtual bool getPreIndexedAddressParts(SDNode *N, SDValue &Base,
325 SDValue &Offset,
333 SDValue &Base, SDValue &Offset
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| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.h | 52 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
57 virtual void computeMaskedBitsForTargetNode(const SDValue Op,
76 virtual SDValue
77 LowerFormalArguments(SDValue Chain,
82 SmallVectorImpl<SDValue> &InVals) const;
83 SDValue LowerFormalArguments_32(SDValue Chain,
88 SmallVectorImpl<SDValue> &InVals) const;
89 SDValue LowerFormalArguments_64(SDValue Chain
[all...] |
