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  /external/llvm/lib/Target/Mips/
MipsFrameLowering.cpp 21 #include "llvm/CodeGen/MachineFunction.h"
96 bool MipsFrameLowering::hasFP(const MachineFunction &MF) const {
102 uint64_t MipsFrameLowering::estimateStackSize(const MachineFunction &MF) const {
MipsISelDAGToDAG.h 42 virtual bool runOnMachineFunction(MachineFunction &MF);
80 virtual void processFunctionAfterISel(MachineFunction &MF) = 0;
MipsRegisterInfo.cpp 25 #include "llvm/CodeGen/MachineFunction.h"
53 MachineFunction &MF) const {
78 getCalleeSavedRegs(const MachineFunction *MF) const {
108 getReservedRegs(const MachineFunction &MF) const {
176 MipsRegisterInfo::requiresRegisterScavenging(const MachineFunction &MF) const {
181 MipsRegisterInfo::trackLivenessAfterRegAlloc(const MachineFunction &MF) const {
192 MachineFunction &MF = *MI.getParent()->getParent();
209 getFrameRegister(const MachineFunction &MF) const {
MipsSERegisterInfo.cpp 24 #include "llvm/CodeGen/MachineFunction.h"
47 requiresRegisterScavenging(const MachineFunction &MF) const {
52 requiresFrameIndexScavenging(const MachineFunction &MF) const {
70 MachineFunction &MF = *MI.getParent()->getParent();
  /external/llvm/lib/Target/R600/
SIRegisterInfo.cpp 26 BitVector SIRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
32 MachineFunction &MF) const {
AMDGPUInstrInfo.cpp 80 AMDGPUInstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
122 AMDGPUInstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
130 AMDGPUInstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
144 AMDGPUInstrInfo::unfoldMemoryOperand(MachineFunction &MF, MachineInstr *MI,
227 void AMDGPUInstrInfo::convertToISA(MachineInstr & MI, MachineFunction &MF,
  /external/llvm/lib/Target/XCore/
XCoreRegisterInfo.cpp 20 #include "llvm/CodeGen/MachineFunction.h"
57 bool XCoreRegisterInfo::needsFrameMoves(const MachineFunction &MF) {
62 const uint16_t* XCoreRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF)
72 BitVector XCoreRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
87 XCoreRegisterInfo::requiresRegisterScavenging(const MachineFunction &MF) const {
95 XCoreRegisterInfo::trackLivenessAfterRegAlloc(const MachineFunction &MF) const {
100 XCoreRegisterInfo::useFPForScavengingIndex(const MachineFunction &MF) const {
114 MachineFunction &MF = *MI.getParent()->getParent();
257 unsigned XCoreRegisterInfo::getFrameRegister(const MachineFunction &MF) const {
  /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
AMDGPUInstrInfo.cpp 79 AMDGPUInstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
141 AMDGPUInstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
149 AMDGPUInstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
164 AMDGPUInstrInfo::unfoldMemoryOperand(MachineFunction &MF, MachineInstr *MI,
238 void AMDGPUInstrInfo::convertToISA(MachineInstr & MI, MachineFunction &MF,
AMDGPUAsmPrinter.cpp 40 bool AMDGPUAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
54 void AMDGPUAsmPrinter::EmitProgramInfo(MachineFunction &MF) {
61 for (MachineFunction::iterator BB = MF.begin(), BB_E = MF.end();
R600ExpandSpecialInstrs.cpp 36 virtual bool runOnMachineFunction(MachineFunction &MF);
51 bool R600ExpandSpecialInstrsPass::runOnMachineFunction(MachineFunction &MF) {
55 for (MachineFunction::iterator BB = MF.begin(), BB_E = MF.end();
  /external/llvm/lib/Target/AArch64/
AArch64RegisterInfo.cpp 37 AArch64RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
61 AArch64RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
87 MachineFunction &MF = *MBB.getParent();
157 AArch64RegisterInfo::getFrameRegister(const MachineFunction &MF) const {
167 AArch64RegisterInfo::useFPForScavengingIndex(const MachineFunction &MF) const {
  /external/llvm/lib/Target/ARM/
ARMBaseRegisterInfo.cpp 25 #include "llvm/CodeGen/MachineFunction.h"
53 ARMBaseRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
102 getReservedRegs(const MachineFunction &MF) const {
154 ARMBaseRegisterInfo::getPointerRegClass(const MachineFunction &MF, unsigned Kind)
168 MachineFunction &MF) const {
199 const MachineFunction &MF,
247 MachineFunction &MF) const {
288 bool ARMBaseRegisterInfo::hasBasePointer(const MachineFunction &MF) const {
319 bool ARMBaseRegisterInfo::canRealignStack(const MachineFunction &MF) const {
344 needsStackRealignment(const MachineFunction &MF) const
    [all...]
  /external/llvm/lib/Target/Sparc/
SparcRegisterInfo.cpp 21 #include "llvm/CodeGen/MachineFunction.h"
41 const uint16_t* SparcRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF)
47 BitVector SparcRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
72 SparcRegisterInfo::getPointerRegClass(const MachineFunction &MF,
88 MachineFunction &MF = *MI.getParent()->getParent();
122 unsigned SparcRegisterInfo::getFrameRegister(const MachineFunction &MF) const {
  /external/llvm/lib/Target/X86/
X86VZeroUpper.cpp 37 virtual bool runOnMachineFunction(MachineFunction &MF);
39 bool processBasicBlock(MachineFunction &MF, MachineBasicBlock &MBB);
153 bool VZeroUpperInserter::runOnMachineFunction(MachineFunction &MF) {
187 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
202 bool VZeroUpperInserter::processBasicBlock(MachineFunction &MF,
X86InstrInfo.h 218 virtual MachineInstr *convertToThreeAddress(MachineFunction::iterator &MFI,
256 virtual void storeRegToAddr(MachineFunction &MF, unsigned SrcReg, bool isKill,
269 virtual void loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
284 virtual MachineInstr* foldMemoryOperandImpl(MachineFunction &MF,
292 virtual MachineInstr* foldMemoryOperandImpl(MachineFunction &MF,
305 virtual bool unfoldMemoryOperand(MachineFunction &MF, MachineInstr *MI,
363 unsigned getGlobalBaseReg(MachineFunction *MF) const;
375 MachineInstr* foldMemoryOperandImpl(MachineFunction &MF,
417 MachineFunction::iterator &MFI,
  /external/mesa3d/src/gallium/drivers/radeon/
AMDGPUInstrInfo.cpp 79 AMDGPUInstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
141 AMDGPUInstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
149 AMDGPUInstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
164 AMDGPUInstrInfo::unfoldMemoryOperand(MachineFunction &MF, MachineInstr *MI,
238 void AMDGPUInstrInfo::convertToISA(MachineInstr & MI, MachineFunction &MF,
AMDGPUAsmPrinter.cpp 40 bool AMDGPUAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
54 void AMDGPUAsmPrinter::EmitProgramInfo(MachineFunction &MF) {
61 for (MachineFunction::iterator BB = MF.begin(), BB_E = MF.end();
R600ExpandSpecialInstrs.cpp 36 virtual bool runOnMachineFunction(MachineFunction &MF);
51 bool R600ExpandSpecialInstrsPass::runOnMachineFunction(MachineFunction &MF) {
55 for (MachineFunction::iterator BB = MF.begin(), BB_E = MF.end();
  /external/llvm/lib/Target/MSP430/
MSP430FrameLowering.cpp 18 #include "llvm/CodeGen/MachineFunction.h"
29 bool MSP430FrameLowering::hasFP(const MachineFunction &MF) const {
37 bool MSP430FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
41 void MSP430FrameLowering::emitPrologue(MachineFunction &MF) const {
74 for (MachineFunction::iterator I = llvm::next(MF.begin()), E = MF.end();
106 void MSP430FrameLowering::emitEpilogue(MachineFunction &MF,
190 MachineFunction &MF = *MBB.getParent();
216 MachineFunction &MF = *MBB.getParent();
226 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
288 MSP430FrameLowering::processFunctionBeforeFrameFinalized(MachineFunction &MF
    [all...]
  /external/llvm/include/llvm/CodeGen/
FunctionLoweringInfo.h 41 class MachineFunction;
55 MachineFunction *MF;
126 /// and its associated MachineFunction.
128 void set(const Function &Fn, MachineFunction &MF);
RegAllocPBQP.h 30 class MachineFunction;
126 /// the given MachineFunction.
127 virtual PBQPRAProblem *build(MachineFunction *mf, const LiveIntervals *lis,
145 /// the given MachineFunction.
146 virtual PBQPRAProblem *build(MachineFunction *mf, const LiveIntervals *lis,
LiveRegMatrix.h 63 virtual bool runOnMachineFunction(MachineFunction&);
  /external/llvm/lib/CodeGen/
MachineBlockPlacement.cpp 37 #include "llvm/CodeGen/MachineFunction.h"
210 MachineFunction &F,
212 MachineFunction::iterator &PrevUnplacedBlockIt,
219 MachineBasicBlock *findBestLoopExit(MachineFunction &F,
222 void buildLoopChains(MachineFunction &F, MachineLoop &L);
225 void buildCFGChains(MachineFunction &F);
233 bool runOnMachineFunction(MachineFunction &F);
474 MachineFunction &F, const BlockChain &PlacedChain,
475 MachineFunction::iterator &PrevUnplacedBlockIt,
477 for (MachineFunction::iterator I = PrevUnplacedBlockIt, E = F.end(); I != E
    [all...]
AllocationOrder.cpp 19 #include "llvm/CodeGen/MachineFunction.h"
33 const MachineFunction &MF = VRM.getMachineFunction();
MachineDominators.cpp 37 bool MachineDominatorTree::runOnMachineFunction(MachineFunction &F) {

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