| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_draw_upload.c | 308 copy_array_to_vbo_array(struct brw_context *brw,
321 intel_upload_data(&brw->intel, element->glarray->Ptr,
336 intel_upload_data(&brw->intel, src, size, dst_stride,
339 char * const map = intel_upload_map(&brw->intel, size, dst_stride);
347 intel_upload_unmap(&brw->intel, map, size, dst_stride,
353 static void brw_prepare_vertices(struct brw_context *brw)
355 struct gl_context *ctx = &brw->intel.ctx;
358 GLbitfield64 vs_inputs = brw->vs.prog_data->inputs_read;
361 unsigned int min_index = brw->vb.min_index;
362 unsigned int max_index = brw->vb.max_index
[all...] |
| brw_sf_state.c | 42 static void upload_sf_vp(struct brw_context *brw)
44 struct intel_context *intel = &brw->intel;
52 sfv = brw_state_batch(brw, AUB_TRACE_SF_VP_STATE,
53 sizeof(*sfv), 32, &brw->sf.vp_offset);
113 brw->state.dirty.cache |= CACHE_NEW_SF_VP;
121 .brw = BRW_NEW_BATCH,
140 static void upload_sf_unit( struct brw_context *brw )
142 struct intel_context *intel = &brw->intel;
147 bool render_to_fbo = _mesa_is_user_fbo(brw->intel.ctx.DrawBuffer);
149 sf = brw_state_batch(brw, AUB_TRACE_SF_STATE
[all...] |
| brw_state_cache.c | 138 struct brw_context *brw = cache->brw; local
157 brw->state.dirty.cache |= (1 << cache_id);
167 struct brw_context *brw = cache->brw; local
168 struct intel_context *intel = &brw->intel;
187 brw->state.dirty.brw |= BRW_NEW_PROGRAM_CACHE;
317 cache->brw->state.dirty.cache |= 1 << cache_id;
321 brw_init_caches(struct brw_context *brw)
[all...] |
| brw_wm_sampler_state.c | 82 upload_default_color(struct brw_context *brw, struct gl_sampler_object *sampler,
85 struct intel_context *intel = &brw->intel;
111 sdc = brw_state_batch(brw, AUB_TRACE_SAMPLER_DEFAULT_COLOR,
112 sizeof(*sdc), 32, &brw->wm.sdc_offset[ss_index]);
148 sdc = brw_state_batch(brw, AUB_TRACE_SAMPLER_DEFAULT_COLOR,
149 sizeof(*sdc), 32, &brw->wm.sdc_offset[ss_index]);
159 static void brw_update_sampler_state(struct brw_context *brw,
164 struct intel_context *intel = &brw->intel;
304 upload_default_color(brw, gl_sampler, unit, ss_index);
307 sampler->ss2.default_color_pointer = brw->wm.sdc_offset[ss_index] >> 5
[all...] |
| brw_cc.c | 41 brw_upload_cc_vp(struct brw_context *brw)
43 struct gl_context *ctx = &brw->intel.ctx;
46 ccv = brw_state_batch(brw, AUB_TRACE_CC_VP_STATE,
47 sizeof(*ccv), 32, &brw->cc.vp_offset);
59 brw->state.dirty.cache |= CACHE_NEW_CC_VP;
65 .brw = BRW_NEW_BATCH,
96 static void upload_cc_unit(struct brw_context *brw)
98 struct intel_context *intel = &brw->intel;
99 struct gl_context *ctx = &brw->intel.ctx;
102 cc = brw_state_batch(brw, AUB_TRACE_CC_STATE
[all...] |
| gen7_clip_state.c | 32 upload_clip_state(struct brw_context *brw)
34 struct intel_context *intel = &brw->intel;
42 bool render_to_fbo = _mesa_is_user_fbo(brw->intel.ctx.DrawBuffer);
45 if (brw->wm.prog_data->barycentric_interp_modes &
119 .brw = BRW_NEW_CONTEXT,
|
| brw_vs.c | 63 struct brw_context *brw = c->func.brw; local
64 const struct intel_context *intel = &brw->intel;
191 do_vs_prog(struct brw_context *brw,
196 struct gl_context *ctx = &brw->intel.ctx;
197 struct intel_context *intel = &brw->intel;
210 brw_init_compile(brw, &c.func, mem_ctx);
268 brw_get_scratch_bo(intel, &brw->vs.scratch_bo,
269 c.prog_data.total_scratch * brw->max_vs_threads);
290 brw_upload_cache(&brw->cache, BRW_VS_PROG
460 struct brw_context *brw = brw_context(ctx); local
[all...] |
| gen6_cc.c | 36 gen6_upload_blend_state(struct brw_context *brw)
39 struct gl_context *ctx = &brw->intel.ctx;
55 blend = brw_state_batch(brw, AUB_TRACE_BLEND_STATE,
56 size, 64, &brw->cc.blend_state_offset);
188 blend[b].blend1.alpha_to_coverage_dither = (brw->intel.gen >= 7);
196 brw->state.dirty.cache |= CACHE_NEW_BLEND_STATE;
204 .brw = BRW_NEW_BATCH,
211 gen6_upload_color_calc_state(struct brw_context *brw)
213 struct gl_context *ctx = &brw->intel.ctx;
216 cc = brw_state_batch(brw, AUB_TRACE_CC_STATE
[all...] |
| brw_fs_reg_allocate.cpp | 75 brw_alloc_reg_set_for_classes(struct brw_context *brw,
81 struct intel_context *intel = &brw->intel;
89 ralloc_free(brw->wm.ra_reg_to_grf);
90 brw->wm.ra_reg_to_grf = ralloc_array(brw, uint8_t, ra_reg_count);
91 ralloc_free(brw->wm.regs);
92 brw->wm.regs = ra_alloc_reg_set(brw, ra_reg_count);
93 ralloc_free(brw->wm.classes);
94 brw->wm.classes = ralloc_array(brw, int, class_count + 1)
[all...] |
| gen7_sampler_state.c | 36 gen7_update_sampler_state(struct brw_context *brw, int unit, int ss_index,
39 struct intel_context *intel = &brw->intel;
171 upload_default_color(brw, gl_sampler, unit, ss_index);
173 sampler->ss2.default_color_pointer = brw->wm.sdc_offset[ss_index] >> 5;
187 gen7_upload_samplers(struct brw_context *brw)
189 struct gl_context *ctx = &brw->intel.ctx;
193 struct gl_program *vs = (struct gl_program *) brw->vertex_program;
194 struct gl_program *fs = (struct gl_program *) brw->fragment_program;
198 brw->sampler.count = _mesa_fls(SamplersUsed);
200 if (brw->sampler.count == 0
[all...] |
| brw_vec4_reg_allocate.cpp | 32 using namespace brw;
34 namespace brw { namespace
100 brw_alloc_reg_set_for_classes(struct brw_context *brw,
111 ralloc_free(brw->vs.ra_reg_to_grf);
112 brw->vs.ra_reg_to_grf = ralloc_array(brw, uint8_t, ra_reg_count);
113 ralloc_free(brw->vs.regs);
114 brw->vs.regs = ra_alloc_reg_set(brw, ra_reg_count);
115 ralloc_free(brw->vs.classes)
[all...] |
| brw_wm.c | 95 brw_wm_non_glsl_emit(struct brw_context *brw, struct brw_wm_compile *c)
133 brw_compute_barycentric_interp_modes(struct brw_context *brw,
160 * brw->needs_unlit_centroid_workaround is set, centroid interpolation
169 if (!is_centroid || brw->needs_unlit_centroid_workaround) {
180 if (!is_centroid || brw->needs_unlit_centroid_workaround) {
192 brw_wm_payload_setup(struct brw_context *brw,
195 struct intel_context *intel = &brw->intel;
261 bool do_wm_prog(struct brw_context *brw,
266 struct intel_context *intel = &brw->intel;
271 c = brw->wm.compile_data
[all...] |
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
| brw_sf_state.c | 42 static void upload_sf_vp(struct brw_context *brw)
44 struct intel_context *intel = &brw->intel;
52 sfv = brw_state_batch(brw, AUB_TRACE_SF_VP_STATE,
53 sizeof(*sfv), 32, &brw->sf.vp_offset);
113 brw->state.dirty.cache |= CACHE_NEW_SF_VP;
121 .brw = BRW_NEW_BATCH,
140 static void upload_sf_unit( struct brw_context *brw )
142 struct intel_context *intel = &brw->intel;
147 bool render_to_fbo = _mesa_is_user_fbo(brw->intel.ctx.DrawBuffer);
149 sf = brw_state_batch(brw, AUB_TRACE_SF_STATE
[all...] |
| brw_state_cache.c | 138 struct brw_context *brw = cache->brw; local
157 brw->state.dirty.cache |= (1 << cache_id);
167 struct brw_context *brw = cache->brw; local
168 struct intel_context *intel = &brw->intel;
187 brw->state.dirty.brw |= BRW_NEW_PROGRAM_CACHE;
317 cache->brw->state.dirty.cache |= 1 << cache_id;
321 brw_init_caches(struct brw_context *brw)
[all...] |
| brw_wm_sampler_state.c | 82 upload_default_color(struct brw_context *brw, struct gl_sampler_object *sampler,
85 struct intel_context *intel = &brw->intel;
111 sdc = brw_state_batch(brw, AUB_TRACE_SAMPLER_DEFAULT_COLOR,
112 sizeof(*sdc), 32, &brw->wm.sdc_offset[ss_index]);
148 sdc = brw_state_batch(brw, AUB_TRACE_SAMPLER_DEFAULT_COLOR,
149 sizeof(*sdc), 32, &brw->wm.sdc_offset[ss_index]);
159 static void brw_update_sampler_state(struct brw_context *brw,
164 struct intel_context *intel = &brw->intel;
304 upload_default_color(brw, gl_sampler, unit, ss_index);
307 sampler->ss2.default_color_pointer = brw->wm.sdc_offset[ss_index] >> 5
[all...] |
| brw_cc.c | 41 brw_upload_cc_vp(struct brw_context *brw)
43 struct gl_context *ctx = &brw->intel.ctx;
46 ccv = brw_state_batch(brw, AUB_TRACE_CC_VP_STATE,
47 sizeof(*ccv), 32, &brw->cc.vp_offset);
59 brw->state.dirty.cache |= CACHE_NEW_CC_VP;
65 .brw = BRW_NEW_BATCH,
96 static void upload_cc_unit(struct brw_context *brw)
98 struct intel_context *intel = &brw->intel;
99 struct gl_context *ctx = &brw->intel.ctx;
102 cc = brw_state_batch(brw, AUB_TRACE_CC_STATE
[all...] |
| gen7_clip_state.c | 32 upload_clip_state(struct brw_context *brw)
34 struct intel_context *intel = &brw->intel;
42 bool render_to_fbo = _mesa_is_user_fbo(brw->intel.ctx.DrawBuffer);
45 if (brw->wm.prog_data->barycentric_interp_modes &
119 .brw = BRW_NEW_CONTEXT,
|
| brw_vs.c | 63 struct brw_context *brw = c->func.brw; local
64 const struct intel_context *intel = &brw->intel;
191 do_vs_prog(struct brw_context *brw,
196 struct gl_context *ctx = &brw->intel.ctx;
197 struct intel_context *intel = &brw->intel;
210 brw_init_compile(brw, &c.func, mem_ctx);
268 brw_get_scratch_bo(intel, &brw->vs.scratch_bo,
269 c.prog_data.total_scratch * brw->max_vs_threads);
290 brw_upload_cache(&brw->cache, BRW_VS_PROG
460 struct brw_context *brw = brw_context(ctx); local
[all...] |
| gen6_cc.c | 36 gen6_upload_blend_state(struct brw_context *brw)
39 struct gl_context *ctx = &brw->intel.ctx;
55 blend = brw_state_batch(brw, AUB_TRACE_BLEND_STATE,
56 size, 64, &brw->cc.blend_state_offset);
188 blend[b].blend1.alpha_to_coverage_dither = (brw->intel.gen >= 7);
196 brw->state.dirty.cache |= CACHE_NEW_BLEND_STATE;
204 .brw = BRW_NEW_BATCH,
211 gen6_upload_color_calc_state(struct brw_context *brw)
213 struct gl_context *ctx = &brw->intel.ctx;
216 cc = brw_state_batch(brw, AUB_TRACE_CC_STATE
[all...] |
| brw_fs_reg_allocate.cpp | 75 brw_alloc_reg_set_for_classes(struct brw_context *brw,
81 struct intel_context *intel = &brw->intel;
89 ralloc_free(brw->wm.ra_reg_to_grf);
90 brw->wm.ra_reg_to_grf = ralloc_array(brw, uint8_t, ra_reg_count);
91 ralloc_free(brw->wm.regs);
92 brw->wm.regs = ra_alloc_reg_set(brw, ra_reg_count);
93 ralloc_free(brw->wm.classes);
94 brw->wm.classes = ralloc_array(brw, int, class_count + 1)
[all...] |
| gen7_sampler_state.c | 36 gen7_update_sampler_state(struct brw_context *brw, int unit, int ss_index,
39 struct intel_context *intel = &brw->intel;
171 upload_default_color(brw, gl_sampler, unit, ss_index);
173 sampler->ss2.default_color_pointer = brw->wm.sdc_offset[ss_index] >> 5;
187 gen7_upload_samplers(struct brw_context *brw)
189 struct gl_context *ctx = &brw->intel.ctx;
193 struct gl_program *vs = (struct gl_program *) brw->vertex_program;
194 struct gl_program *fs = (struct gl_program *) brw->fragment_program;
198 brw->sampler.count = _mesa_fls(SamplersUsed);
200 if (brw->sampler.count == 0
[all...] |
| brw_vec4_reg_allocate.cpp | 32 using namespace brw;
34 namespace brw { namespace
100 brw_alloc_reg_set_for_classes(struct brw_context *brw,
111 ralloc_free(brw->vs.ra_reg_to_grf);
112 brw->vs.ra_reg_to_grf = ralloc_array(brw, uint8_t, ra_reg_count);
113 ralloc_free(brw->vs.regs);
114 brw->vs.regs = ra_alloc_reg_set(brw, ra_reg_count);
115 ralloc_free(brw->vs.classes)
[all...] |
| brw_wm.c | 95 brw_wm_non_glsl_emit(struct brw_context *brw, struct brw_wm_compile *c)
133 brw_compute_barycentric_interp_modes(struct brw_context *brw,
160 * brw->needs_unlit_centroid_workaround is set, centroid interpolation
169 if (!is_centroid || brw->needs_unlit_centroid_workaround) {
180 if (!is_centroid || brw->needs_unlit_centroid_workaround) {
192 brw_wm_payload_setup(struct brw_context *brw,
195 struct intel_context *intel = &brw->intel;
261 bool do_wm_prog(struct brw_context *brw,
266 struct intel_context *intel = &brw->intel;
271 c = brw->wm.compile_data
[all...] |
| brw_clip.c | 51 static void compile_clip_prog( struct brw_context *brw,
54 struct intel_context *intel = &brw->intel;
67 brw_init_compile(brw, &c.func, mem_ctx);
72 c.vue_map = brw->vs.prog_data->vue_map;
124 brw_upload_cache(&brw->cache,
129 &brw->clip.prog_offset, &brw->clip.prog_data);
136 brw_upload_clip_prog(struct brw_context *brw)
138 struct intel_context *intel = &brw->intel;
147 key.primitive = brw->intel.reduced_primitive
[all...] |
| brw_program.c | 48 struct brw_context *brw = brw_context(ctx); local
52 brw->state.dirty.brw |= BRW_NEW_VERTEX_PROGRAM;
55 brw->state.dirty.brw |= BRW_NEW_FRAGMENT_PROGRAM;
64 struct brw_context *brw = brw_context(ctx); local
70 prog->id = brw->program_id++;
82 prog->id = brw->program_id++;
129 struct brw_context *brw = brw_context(ctx); local
136 brw_fragment_program_const(brw->fragment_program)
[all...] |
