1 // Copyright (c) 2012 The Chromium Authors. All rights reserved. 2 // Use of this source code is governed by a BSD-style license that can be 3 // found in the LICENSE file. 4 5 // For atomic operations on reference counts, see atomic_refcount.h. 6 // For atomic operations on sequence numbers, see atomic_sequence_num.h. 7 8 // The routines exported by this module are subtle. If you use them, even if 9 // you get the code right, it will depend on careful reasoning about atomicity 10 // and memory ordering; it will be less readable, and harder to maintain. If 11 // you plan to use these routines, you should have a good reason, such as solid 12 // evidence that performance would otherwise suffer, or there being no 13 // alternative. You should assume only properties explicitly guaranteed by the 14 // specifications in this file. You are almost certainly _not_ writing code 15 // just for the x86; if you assume x86 semantics, x86 hardware bugs and 16 // implementations on other archtectures will cause your code to break. If you 17 // do not know what you are doing, avoid these routines, and use a Mutex. 18 // 19 // It is incorrect to make direct assignments to/from an atomic variable. 20 // You should use one of the Load or Store routines. The NoBarrier 21 // versions are provided when no barriers are needed: 22 // NoBarrier_Store() 23 // NoBarrier_Load() 24 // Although there are currently no compiler enforcement, you are encouraged 25 // to use these. 26 // 27 28 #ifndef BASE_ATOMICOPS_H_ 29 #define BASE_ATOMICOPS_H_ 30 31 #include "base/basictypes.h" 32 #include "build/build_config.h" 33 34 #if defined(OS_WIN) && defined(ARCH_CPU_64_BITS) 35 // windows.h #defines this (only on x64). This causes problems because the 36 // public API also uses MemoryBarrier at the public name for this fence. So, on 37 // X64, undef it, and call its documented 38 // (http://msdn.microsoft.com/en-us/library/windows/desktop/ms684208.aspx) 39 // implementation directly. 40 #undef MemoryBarrier 41 #endif 42 43 namespace base { 44 namespace subtle { 45 46 typedef int32 Atomic32; 47 #ifdef ARCH_CPU_64_BITS 48 // We need to be able to go between Atomic64 and AtomicWord implicitly. This 49 // means Atomic64 and AtomicWord should be the same type on 64-bit. 50 #if defined(__ILP32__) || defined(OS_NACL) 51 // NaCl's intptr_t is not actually 64-bits on 64-bit! 52 // http://code.google.com/p/nativeclient/issues/detail?id=1162 53 typedef int64_t Atomic64; 54 #else 55 typedef intptr_t Atomic64; 56 #endif 57 #endif 58 59 // Use AtomicWord for a machine-sized pointer. It will use the Atomic32 or 60 // Atomic64 routines below, depending on your architecture. 61 typedef intptr_t AtomicWord; 62 63 // Atomically execute: 64 // result = *ptr; 65 // if (*ptr == old_value) 66 // *ptr = new_value; 67 // return result; 68 // 69 // I.e., replace "*ptr" with "new_value" if "*ptr" used to be "old_value". 70 // Always return the old value of "*ptr" 71 // 72 // This routine implies no memory barriers. 73 Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr, 74 Atomic32 old_value, 75 Atomic32 new_value); 76 77 // Atomically store new_value into *ptr, returning the previous value held in 78 // *ptr. This routine implies no memory barriers. 79 Atomic32 NoBarrier_AtomicExchange(volatile Atomic32* ptr, Atomic32 new_value); 80 81 // Atomically increment *ptr by "increment". Returns the new value of 82 // *ptr with the increment applied. This routine implies no memory barriers. 83 Atomic32 NoBarrier_AtomicIncrement(volatile Atomic32* ptr, Atomic32 increment); 84 85 Atomic32 Barrier_AtomicIncrement(volatile Atomic32* ptr, 86 Atomic32 increment); 87 88 // These following lower-level operations are typically useful only to people 89 // implementing higher-level synchronization operations like spinlocks, 90 // mutexes, and condition-variables. They combine CompareAndSwap(), a load, or 91 // a store with appropriate memory-ordering instructions. "Acquire" operations 92 // ensure that no later memory access can be reordered ahead of the operation. 93 // "Release" operations ensure that no previous memory access can be reordered 94 // after the operation. "Barrier" operations have both "Acquire" and "Release" 95 // semantics. A MemoryBarrier() has "Barrier" semantics, but does no memory 96 // access. 97 Atomic32 Acquire_CompareAndSwap(volatile Atomic32* ptr, 98 Atomic32 old_value, 99 Atomic32 new_value); 100 Atomic32 Release_CompareAndSwap(volatile Atomic32* ptr, 101 Atomic32 old_value, 102 Atomic32 new_value); 103 104 void MemoryBarrier(); 105 void NoBarrier_Store(volatile Atomic32* ptr, Atomic32 value); 106 void Acquire_Store(volatile Atomic32* ptr, Atomic32 value); 107 void Release_Store(volatile Atomic32* ptr, Atomic32 value); 108 109 Atomic32 NoBarrier_Load(volatile const Atomic32* ptr); 110 Atomic32 Acquire_Load(volatile const Atomic32* ptr); 111 Atomic32 Release_Load(volatile const Atomic32* ptr); 112 113 // 64-bit atomic operations (only available on 64-bit processors). 114 #ifdef ARCH_CPU_64_BITS 115 Atomic64 NoBarrier_CompareAndSwap(volatile Atomic64* ptr, 116 Atomic64 old_value, 117 Atomic64 new_value); 118 Atomic64 NoBarrier_AtomicExchange(volatile Atomic64* ptr, Atomic64 new_value); 119 Atomic64 NoBarrier_AtomicIncrement(volatile Atomic64* ptr, Atomic64 increment); 120 Atomic64 Barrier_AtomicIncrement(volatile Atomic64* ptr, Atomic64 increment); 121 122 Atomic64 Acquire_CompareAndSwap(volatile Atomic64* ptr, 123 Atomic64 old_value, 124 Atomic64 new_value); 125 Atomic64 Release_CompareAndSwap(volatile Atomic64* ptr, 126 Atomic64 old_value, 127 Atomic64 new_value); 128 void NoBarrier_Store(volatile Atomic64* ptr, Atomic64 value); 129 void Acquire_Store(volatile Atomic64* ptr, Atomic64 value); 130 void Release_Store(volatile Atomic64* ptr, Atomic64 value); 131 Atomic64 NoBarrier_Load(volatile const Atomic64* ptr); 132 Atomic64 Acquire_Load(volatile const Atomic64* ptr); 133 Atomic64 Release_Load(volatile const Atomic64* ptr); 134 #endif // ARCH_CPU_64_BITS 135 136 } // namespace base::subtle 137 } // namespace base 138 139 // Include our platform specific implementation. 140 #if defined(THREAD_SANITIZER) 141 #include "base/atomicops_internals_tsan.h" 142 #elif defined(OS_WIN) && defined(COMPILER_MSVC) && defined(ARCH_CPU_X86_FAMILY) 143 #include "base/atomicops_internals_x86_msvc.h" 144 #elif defined(OS_MACOSX) 145 #include "base/atomicops_internals_mac.h" 146 #elif defined(OS_NACL) 147 #include "base/atomicops_internals_gcc.h" 148 #elif defined(COMPILER_GCC) && defined(ARCH_CPU_ARM_FAMILY) 149 #include "base/atomicops_internals_arm_gcc.h" 150 #elif defined(COMPILER_GCC) && defined(ARCH_CPU_X86_FAMILY) 151 #include "base/atomicops_internals_x86_gcc.h" 152 #elif defined(COMPILER_GCC) && defined(ARCH_CPU_MIPS_FAMILY) 153 #include "base/atomicops_internals_mips_gcc.h" 154 #else 155 #error "Atomic operations are not supported on your platform" 156 #endif 157 158 // On some platforms we need additional declarations to make 159 // AtomicWord compatible with our other Atomic* types. 160 #if defined(OS_MACOSX) || defined(OS_OPENBSD) 161 #include "base/atomicops_internals_atomicword_compat.h" 162 #endif 163 164 #endif // BASE_ATOMICOPS_H_ 165
