1 //===-- NVPTX.h - Top-level interface for NVPTX representation --*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file contains the entry points for global functions defined in 11 // the LLVM NVPTX back-end. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #ifndef LLVM_TARGET_NVPTX_H 16 #define LLVM_TARGET_NVPTX_H 17 18 #include "MCTargetDesc/NVPTXBaseInfo.h" 19 #include "llvm/ADT/StringMap.h" 20 #include "llvm/IR/Module.h" 21 #include "llvm/IR/Value.h" 22 #include "llvm/Support/ErrorHandling.h" 23 #include "llvm/Target/TargetMachine.h" 24 #include <cassert> 25 #include <iosfwd> 26 27 namespace llvm { 28 class NVPTXTargetMachine; 29 class FunctionPass; 30 class MachineFunctionPass; 31 class formatted_raw_ostream; 32 33 namespace NVPTXCC { 34 enum CondCodes { 35 EQ, 36 NE, 37 LT, 38 LE, 39 GT, 40 GE 41 }; 42 } 43 44 inline static const char *NVPTXCondCodeToString(NVPTXCC::CondCodes CC) { 45 switch (CC) { 46 case NVPTXCC::NE: 47 return "ne"; 48 case NVPTXCC::EQ: 49 return "eq"; 50 case NVPTXCC::LT: 51 return "lt"; 52 case NVPTXCC::LE: 53 return "le"; 54 case NVPTXCC::GT: 55 return "gt"; 56 case NVPTXCC::GE: 57 return "ge"; 58 } 59 llvm_unreachable("Unknown condition code"); 60 } 61 62 FunctionPass * 63 createNVPTXISelDag(NVPTXTargetMachine &TM, llvm::CodeGenOpt::Level OptLevel); 64 ModulePass *createGenericToNVVMPass(); 65 ModulePass *createNVVMReflectPass(); 66 ModulePass *createNVVMReflectPass(const StringMap<int>& Mapping); 67 MachineFunctionPass *createNVPTXPrologEpilogPass(); 68 69 bool isImageOrSamplerVal(const Value *, const Module *); 70 71 extern Target TheNVPTXTarget32; 72 extern Target TheNVPTXTarget64; 73 74 namespace NVPTX { 75 enum DrvInterface { 76 NVCL, 77 CUDA 78 }; 79 80 // A field inside TSFlags needs a shift and a mask. The usage is 81 // always as follows : 82 // ((TSFlags & fieldMask) >> fieldShift) 83 // The enum keeps the mask, the shift, and all valid values of the 84 // field in one place. 85 enum VecInstType { 86 VecInstTypeShift = 0, 87 VecInstTypeMask = 0xF, 88 89 VecNOP = 0, 90 VecLoad = 1, 91 VecStore = 2, 92 VecBuild = 3, 93 VecShuffle = 4, 94 VecExtract = 5, 95 VecInsert = 6, 96 VecDest = 7, 97 VecOther = 15 98 }; 99 100 enum SimpleMove { 101 SimpleMoveMask = 0x10, 102 SimpleMoveShift = 4 103 }; 104 enum LoadStore { 105 isLoadMask = 0x20, 106 isLoadShift = 5, 107 isStoreMask = 0x40, 108 isStoreShift = 6 109 }; 110 111 namespace PTXLdStInstCode { 112 enum AddressSpace { 113 GENERIC = 0, 114 GLOBAL = 1, 115 CONSTANT = 2, 116 SHARED = 3, 117 PARAM = 4, 118 LOCAL = 5 119 }; 120 enum FromType { 121 Unsigned = 0, 122 Signed, 123 Float 124 }; 125 enum VecType { 126 Scalar = 1, 127 V2 = 2, 128 V4 = 4 129 }; 130 } 131 132 /// PTXCvtMode - Conversion code enumeration 133 namespace PTXCvtMode { 134 enum CvtMode { 135 NONE = 0, 136 RNI, 137 RZI, 138 RMI, 139 RPI, 140 RN, 141 RZ, 142 RM, 143 RP, 144 145 BASE_MASK = 0x0F, 146 FTZ_FLAG = 0x10, 147 SAT_FLAG = 0x20 148 }; 149 } 150 151 /// PTXCmpMode - Comparison mode enumeration 152 namespace PTXCmpMode { 153 enum CmpMode { 154 EQ = 0, 155 NE, 156 LT, 157 LE, 158 GT, 159 GE, 160 LO, 161 LS, 162 HI, 163 HS, 164 EQU, 165 NEU, 166 LTU, 167 LEU, 168 GTU, 169 GEU, 170 NUM, 171 // NAN is a MACRO 172 NotANumber, 173 174 BASE_MASK = 0xFF, 175 FTZ_FLAG = 0x100 176 }; 177 } 178 } 179 } // end namespace llvm; 180 181 // Defines symbolic names for NVPTX registers. This defines a mapping from 182 // register name to register number. 183 #define GET_REGINFO_ENUM 184 #include "NVPTXGenRegisterInfo.inc" 185 186 // Defines symbolic names for the NVPTX instructions. 187 #define GET_INSTRINFO_ENUM 188 #include "NVPTXGenInstrInfo.inc" 189 190 #endif 191
