1 ; RUN: llc -O0 -mcpu=pwr7 -mtriple=powerpc64-unknown-linux-gnu -fast-isel=false < %s | FileCheck %s 2 ; RUN: llc -O0 -mcpu=g4 -mtriple=powerpc-apple-darwin8 < %s | FileCheck -check-prefix=DARWIN32 %s 3 ; RUN: llc -O0 -mcpu=ppc970 -mtriple=powerpc64-apple-darwin8 < %s | FileCheck -check-prefix=DARWIN64 %s 4 5 ; Test case for PR 14779: anonymous aggregates are not handled correctly. 6 ; Darwin bug report PR 15821 is similar. 7 ; The bug is triggered by passing a byval structure after an anonymous 8 ; aggregate. 9 10 %tarray = type { i64, i8* } 11 12 define i8* @func1({ i64, i8* } %array, i8* %ptr) { 13 entry: 14 %array_ptr = extractvalue {i64, i8* } %array, 1 15 %cond = icmp eq i8* %array_ptr, %ptr 16 br i1 %cond, label %equal, label %unequal 17 equal: 18 ret i8* %array_ptr 19 unequal: 20 ret i8* %ptr 21 } 22 23 ; CHECK-LABEL: func1: 24 ; CHECK: cmpld {{[0-9]+}}, 4, 5 25 ; CHECK-DAG: std 4, -[[OFFSET1:[0-9]+]] 26 ; CHECK-DAG: std 5, -[[OFFSET2:[0-9]+]] 27 ; CHECK: ld 3, -[[OFFSET1]](1) 28 ; CHECK: ld 3, -[[OFFSET2]](1) 29 30 ; DARWIN32: _func1: 31 ; DARWIN32: mr 32 ; DARWIN32: mr r[[REG1:[0-9]+]], r[[REGA:[0-9]+]] 33 ; DARWIN32: mr r[[REG2:[0-9]+]], r[[REGB:[0-9]+]] 34 ; DARWIN32: cmplw cr{{[0-9]+}}, r[[REGA]], r[[REGB]] 35 ; DARWIN32: stw r[[REG1]], -[[OFFSET1:[0-9]+]] 36 ; DARWIN32: stw r[[REG2]], -[[OFFSET2:[0-9]+]] 37 ; DARWIN32: lwz r3, -[[OFFSET1]] 38 ; DARWIN32: lwz r3, -[[OFFSET2]] 39 40 ; DARWIN64: _func1: 41 ; DARWIN64: mr 42 ; DARWIN64: mr r[[REG1:[0-9]+]], r[[REGA:[0-9]+]] 43 ; DARWIN64: mr r[[REG2:[0-9]+]], r[[REGB:[0-9]+]] 44 ; DARWIN64: cmpld cr{{[0-9]+}}, r[[REGA]], r[[REGB]] 45 ; DARWIN64: std r[[REG1]], -[[OFFSET1:[0-9]+]] 46 ; DARWIN64: std r[[REG2]], -[[OFFSET2:[0-9]+]] 47 ; DARWIN64: ld r3, -[[OFFSET1]] 48 ; DARWIN64: ld r3, -[[OFFSET2]] 49 50 51 define i8* @func2({ i64, i8* } %array1, %tarray* byval %array2) { 52 entry: 53 %array1_ptr = extractvalue {i64, i8* } %array1, 1 54 %tmp = getelementptr inbounds %tarray* %array2, i32 0, i32 1 55 %array2_ptr = load i8** %tmp 56 %cond = icmp eq i8* %array1_ptr, %array2_ptr 57 br i1 %cond, label %equal, label %unequal 58 equal: 59 ret i8* %array1_ptr 60 unequal: 61 ret i8* %array2_ptr 62 } 63 64 ; CHECK-LABEL: func2: 65 ; CHECK: addi [[REG1:[0-9]+]], 1, 64 66 ; CHECK: ld [[REG2:[0-9]+]], 8([[REG1]]) 67 ; CHECK: cmpld {{[0-9]+}}, 4, [[REG2]] 68 ; CHECK-DAG: std [[REG2]], -[[OFFSET1:[0-9]+]] 69 ; CHECK-DAG: std 4, -[[OFFSET2:[0-9]+]] 70 ; CHECK: ld 3, -[[OFFSET2]](1) 71 ; CHECK: ld 3, -[[OFFSET1]](1) 72 73 ; DARWIN32: _func2: 74 ; DARWIN32: addi r[[REG1:[0-9]+]], r[[REGSP:[0-9]+]], 36 75 ; DARWIN32: lwz r[[REG2:[0-9]+]], 44(r[[REGSP]]) 76 ; DARWIN32: mr 77 ; DARWIN32: mr r[[REG3:[0-9]+]], r[[REGA:[0-9]+]] 78 ; DARWIN32: cmplw cr{{[0-9]+}}, r[[REGA]], r[[REG2]] 79 ; DARWIN32: stw r[[REG3]], -[[OFFSET1:[0-9]+]] 80 ; DARWIN32: stw r[[REG2]], -[[OFFSET2:[0-9]+]] 81 ; DARWIN32: lwz r3, -[[OFFSET1]] 82 ; DARWIN32: lwz r3, -[[OFFSET2]] 83 84 ; DARWIN64: _func2: 85 ; DARWIN64: addi r[[REG1:[0-9]+]], r1, 64 86 ; DARWIN64: ld r[[REG2:[0-9]+]], 8(r[[REG1]]) 87 ; DARWIN64: mr 88 ; DARWIN64: mr r[[REG3:[0-9]+]], r[[REGA:[0-9]+]] 89 ; DARWIN64: cmpld cr{{[0-9]+}}, r[[REGA]], r[[REG2]] 90 ; DARWIN64: std r[[REG3]], -[[OFFSET1:[0-9]+]] 91 ; DARWIN64: std r[[REG2]], -[[OFFSET2:[0-9]+]] 92 ; DARWIN64: ld r3, -[[OFFSET1]] 93 ; DARWIN64: ld r3, -[[OFFSET2]] 94 95 96 define i8* @func3({ i64, i8* }* byval %array1, %tarray* byval %array2) { 97 entry: 98 %tmp1 = getelementptr inbounds { i64, i8* }* %array1, i32 0, i32 1 99 %array1_ptr = load i8** %tmp1 100 %tmp2 = getelementptr inbounds %tarray* %array2, i32 0, i32 1 101 %array2_ptr = load i8** %tmp2 102 %cond = icmp eq i8* %array1_ptr, %array2_ptr 103 br i1 %cond, label %equal, label %unequal 104 equal: 105 ret i8* %array1_ptr 106 unequal: 107 ret i8* %array2_ptr 108 } 109 110 ; CHECK-LABEL: func3: 111 ; CHECK: addi [[REG1:[0-9]+]], 1, 64 112 ; CHECK: addi [[REG2:[0-9]+]], 1, 48 113 ; CHECK: ld [[REG3:[0-9]+]], 8([[REG1]]) 114 ; CHECK: ld [[REG4:[0-9]+]], 8([[REG2]]) 115 ; CHECK: cmpld {{[0-9]+}}, [[REG4]], [[REG3]] 116 ; CHECK: std [[REG3]], -[[OFFSET1:[0-9]+]](1) 117 ; CHECK: std [[REG4]], -[[OFFSET2:[0-9]+]](1) 118 ; CHECK: ld 3, -[[OFFSET2]](1) 119 ; CHECK: ld 3, -[[OFFSET1]](1) 120 121 ; DARWIN32: _func3: 122 ; DARWIN32: addi r[[REG1:[0-9]+]], r[[REGSP:[0-9]+]], 40 123 ; DARWIN32: addi r[[REG2:[0-9]+]], r[[REGSP]], 24 124 ; DARWIN32: lwz r[[REG3:[0-9]+]], 48(r[[REGSP]]) 125 ; DARWIN32: lwz r[[REG4:[0-9]+]], 32(r[[REGSP]]) 126 ; DARWIN32: cmplw cr{{[0-9]+}}, r[[REG4]], r[[REG3]] 127 ; DARWIN32: stw r[[REG3]], -[[OFFSET1:[0-9]+]] 128 ; DARWIN32: stw r[[REG4]], -[[OFFSET2:[0-9]+]] 129 ; DARWIN32: lwz r3, -[[OFFSET2]] 130 ; DARWIN32: lwz r3, -[[OFFSET1]] 131 132 ; DARWIN64: _func3: 133 ; DARWIN64: addi r[[REG1:[0-9]+]], r1, 64 134 ; DARWIN64: addi r[[REG2:[0-9]+]], r1, 48 135 ; DARWIN64: ld r[[REG3:[0-9]+]], 8(r[[REG1]]) 136 ; DARWIN64: ld r[[REG4:[0-9]+]], 8(r[[REG2]]) 137 ; DARWIN64: cmpld cr{{[0-9]+}}, r[[REG4]], r[[REG3]] 138 ; DARWIN64: std r[[REG3]], -[[OFFSET1:[0-9]+]] 139 ; DARWIN64: std r[[REG4]], -[[OFFSET2:[0-9]+]] 140 ; DARWIN64: ld r3, -[[OFFSET2]] 141 ; DARWIN64: ld r3, -[[OFFSET1]] 142 143 144 define i8* @func4(i64 %p1, i64 %p2, i64 %p3, i64 %p4, 145 i64 %p5, i64 %p6, i64 %p7, i64 %p8, 146 { i64, i8* } %array1, %tarray* byval %array2) { 147 entry: 148 %array1_ptr = extractvalue {i64, i8* } %array1, 1 149 %tmp = getelementptr inbounds %tarray* %array2, i32 0, i32 1 150 %array2_ptr = load i8** %tmp 151 %cond = icmp eq i8* %array1_ptr, %array2_ptr 152 br i1 %cond, label %equal, label %unequal 153 equal: 154 ret i8* %array1_ptr 155 unequal: 156 ret i8* %array2_ptr 157 } 158 159 ; CHECK-LABEL: func4: 160 ; CHECK: addi [[REG1:[0-9]+]], 1, 128 161 ; CHECK: ld [[REG2:[0-9]+]], 120(1) 162 ; CHECK: ld [[REG3:[0-9]+]], 8([[REG1]]) 163 ; CHECK: cmpld {{[0-9]+}}, [[REG2]], [[REG3]] 164 ; CHECK: std [[REG2]], -[[OFFSET1:[0-9]+]](1) 165 ; CHECK: std [[REG3]], -[[OFFSET2:[0-9]+]](1) 166 ; CHECK: ld 3, -[[OFFSET1]](1) 167 ; CHECK: ld 3, -[[OFFSET2]](1) 168 169 ; DARWIN32: _func4: 170 ; DARWIN32: lwz r[[REG4:[0-9]+]], 96(r1) 171 ; DARWIN32: addi r[[REG1:[0-9]+]], r1, 100 172 ; DARWIN32: lwz r[[REG3:[0-9]+]], 108(r1) 173 ; DARWIN32: mr r[[REG2:[0-9]+]], r[[REG4]] 174 ; DARWIN32: cmplw cr{{[0-9]+}}, r[[REG4]], r[[REG3]] 175 ; DARWIN32: stw r[[REG4]], -[[OFFSET1:[0-9]+]] 176 ; DARWIN32: stw r[[REG3]], -[[OFFSET2:[0-9]+]] 177 ; DARWIN32: lwz r[[REG1]], -[[OFFSET1]] 178 ; DARWIN32: lwz r[[REG1]], -[[OFFSET2]] 179 180 ; DARWIN64: _func4: 181 ; DARWIN64: addi r[[REG1:[0-9]+]], r1, 128 182 ; DARWIN64: ld r[[REG2:[0-9]+]], 120(r1) 183 ; DARWIN64: ld r[[REG3:[0-9]+]], 8(r[[REG1]]) 184 ; DARWIN64: mr r[[REG4:[0-9]+]], r[[REG2]] 185 ; DARWIN64: cmpld cr{{[0-9]+}}, r[[REG2]], r[[REG3]] 186 ; DARWIN64: std r[[REG4]], -[[OFFSET1:[0-9]+]] 187 ; DARWIN64: std r[[REG3]], -[[OFFSET2:[0-9]+]] 188 ; DARWIN64: ld r3, -[[OFFSET1]] 189 ; DARWIN64: ld r3, -[[OFFSET2]] 190
