libm.so.6 __gmon_start__ _Jv_RegisterClasses libz.so.1 compressBound inflate inflateReset compress inflateInit_ inflateEnd libnsl.so.1 libc.so.6 _IO_stdin_used fflush strcpy vasprintf fnmatch _IO_putc fopen strncmp ftruncate optind strrchr perror mmap64 ftell strncpy signal time unlink realloc abort _exit vsprintf memchr strpbrk tolower strspn strdup chmod sbrk strtol isatty mmap calloc sigemptyset memset strstr strcspn __errno_location fseek chdir memcmp longjmp _setjmp stdout fputc fseeko64 getrusage fputs lseek memcpy fclose strtoul vprintf malloc strcat umask strcasecmp ftello64 realpath getgid getenv __ctype_b_loc sscanf optarg stderr system munmap getuid getopt_long strncasecmp strncat strtoull fileno fwrite fread sigaction rename atoi strchr fdopen qsort fcntl memmove fopen64 strcmp strerror __libc_start_main ferror vfprintf snprintf free __environ __xstat __fxstat __lxstat __xstat64 __fxstat64 __lxstat64 ZLIB_1.2.0 GLIBC_2.2.3 GLIBC_2.3 GLIBC_2.1 GLIBC_2.2 GLIBC_2.0
Quit! step Internal error - bad magic number in simulator struct %s: can't open "%s": %s %s: "%s" is not an object file: %s %s %s %s: can't change directory to "%s" program stopped with signal %d. program in undefined state (%d:%d) Usage: %s [options] program [program args] Run `%s --help' for full list of options. r st_dev st_ino st_mode st_nlink st_uid st_gid st_rdev st_size st_blksize st_blocks st_atime st_mtime st_ctime $ | " W ~ 5 ~ S LITTLE_ENDIAN BIG_ENDIAN 0 UNKNOWN DONT_USE_STDIO DO_USE_STDIO ALL_ENVIRONMENT USER_ENVIRONMENT VIRTUAL_ENVIRONMENT OPERATING_ENVIRONMENT MIXED_ALIGNMENT NONSTRICT_ALIGNMENT STRICT_ALIGNMENT FORCED_ALIGNMENT SOFT_FLOATING_POINT HARD_FLOATING_POINT /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/../common/sim-config.c STATE_MAGIC (sd) == SIM_MAGIC_NUMBER %s:%d: assertion failed - %s host (%s) and configured (%s) byte order in conflict Target byte order unspecified Target (%s) and specified (%s) byte order in conflict Target standard IO unspecified Target (%s) and configured (%s) alignment in conflict Target (%s) and configured (%s) floating-point in conflict 10:58:35 Sep 7 2012 4.6.x-google 20120106 (prerelease) Compiled by GCC %s on %s %s WITH_TARGET_BYTE_ORDER = %s WITH_DEFAULT_TARGET_BYTE_ORDER = %s WITH_HOST_BYTE_ORDER = %s WITH_STDIO = %s WITH_TARGET_WORD_MSB = %d WITH_TARGET_WORD_BITSIZE = %d WITH_TARGET_ADDRESS_BITSIZE = %d WITH_TARGET_CELL_BITSIZE = %d WITH_TARGET_FLOATING_POINT_BITSIZE = %d WITH_ENVIRONMENT = %s WITH_ALIGNMENT = %s WITH_DEFAULT_ALIGNMENT = %s WITH_XOR_ENDIAN = %d WITH_FLOATING_POINT = %s WITH_SMP = %d WITH_RESERVED_BITS = %d WITH_PROFILE = %d sim_io_write_stdout: unaccounted switch sim_io_flush_stdout: unaccounted switch sim_io_write_stderr: unaccounted switch sim_io_flush_stderr: unaccounted switch sim_io_read_stdin: unaccounted switch sim_io_poll_read sim_io_read_stdin /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/../common/sim-info.c STATE_MAGIC (sd) == SIM_MAGIC_NUMBER %s:%d: assertion failed - %s ` 1 y' V /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/../common/sim-module.c STATE_MAGIC (sd) == SIM_MAGIC_NUMBER %s:%d: assertion failed - %s STATE_MODULES (sd) == NULL cpu%d STATE_MODULES (sd) != NULL verbose Verbose output endian big|little Set endianness alignment strict|nonstrict|forced Set memory access alignment debug Print debugging messages debug-insn Print instruction debugging messages debug-file FILE NAME Specify debugging output file do-command COMMAND help Print help information architecture MACHINE Specify the architecture to use architecture-info List supported architectures info-architecture target BFDNAME Specify the object-code format for the object files load-lma Use VMA or LMA addresses when loading image (default VMA) load-{lma,vma} load-vma sysroot SYSROOT Root for system calls with absolute file-names and cwd at start v E " : V D \ u H @ R o " * 4 big little Invalid endian specification `%s' user virtual operating Invalid environment specification `%s' Simulator compiled for the %s environment only. strict nonstrict forced Invalid alignment specification `%s' Simulator compiled for nonstrict alignment only. Debugging not compiled in, `-D' ignored Debugging not compiled in, `--debug-insn' ignored Debugging not compiled in, `--debug-file' ignored Architecture `%s' unknown Possible architectures: %s [ s e l v C /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/../common/sim-options.c STATE_MAGIC (sd) == SIM_MAGIC_NUMBER %s:%d: assertion failed - %s internal error, short cpu specific option %s-%s internal error, out of memory , %s-%c [%s] - -- %s%s%s%s%s [=%s] %*s %*s %.*s %*s %s Usage: %s [options] program [program args] Options: Commands: CPU %s specific options: option command Note: Depending on the simulator configuration some %ss may not be applicable program args Arguments to pass to simulated program. Note: Very few simulators support this. Command `%s' takes no arguments Command `%s' requires no more than one argument Command `%s' requires an argument Command `%s' requires only one argument profile on|off Perform profiling profile-insn Perform instruction profiling profile-memory Perform memory profiling profile-core Perform CORE profiling profile-model Perform model profiling profile-cpu-frequency CPU FREQUENCY Specify the speed of the simulated cpu clock profile-file FILE NAME Specify profile output file profile-pc Perform PC profiling profile-pc-frequency PC PROFILE FREQUENCY Specified PC profiling frequency profile-pc-size PC PROFILE SIZE Specify PC profiling size profile-pc-granularity PC PROFILE GRANULARITY Specify PC profiling sample coverage profile-pc-range BASE,BOUND Specify PC profiling address range p p ( / A ( N l ( { ( ( 1 > H d ( o F F S S " < a r yes on 1 no off 0 Argument `%s' for `--profile%s' invalid, one of `on', `off', `yes', `no' expected Invalid argument for --profile-cpu-frequency: %s -insn Memory profiling not compiled in, `--profile-memory' ignored -core Model profiling not compiled in, `--profile-model' ignored w Unable to open profile output file `%s' -pc PC profiling granularity not a power of two PC profiling granularity too small --profile-pc-range missing BOUND argument 7 L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L J # b Program Counter Statistics: Total samples: %s Granularity: %s bytes per bucket Size: %s buckets Frequency: %s cycles per sample Range: 0x%lx 0x%lx overflow %10s: 0x%08lx: %*s %4.1f : wb gmon.out Failed to open "gmon.out" profile file Failed to write to "gmon.out" profile file Instruction Statistics Total: %s insns %*s: %*s: CORE Statistics Total: %s accesses %*s: * Simulator Execution Speed Total instructions: %s Total execution time: < 1 second Total execution time : %.2f seconds Simulator speed: %s insns/second Simulated cpu frequency: %.2f MHz Simulated cpu frequency: %.2f Hz Summary profiling results: /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/../common/sim-profile.c STATE_MAGIC (sd) == SIM_MAGIC_NUMBER %s:%d: assertion failed - %s Y@ @ @ ? @ .Asim_signal_to_host: unknown signal: %d t { f m ! ! ! ! trace on|off Trace useful things trace-insn Perform instruction tracing trace-decode Trace instruction decoding trace-extract Trace instruction extraction trace-linenum Perform line number tracing (implies --trace-insn) trace-memory Trace memory operations trace-alu Trace ALU operations trace-fpu Trace FPU operations trace-vpu Trace VPU operations trace-branch Trace branching trace-semantics Perform ALU, FPU, MEMORY, and BRANCH tracing trace-model Include model performance data trace-core Trace core operations trace-events Trace events trace-debug Add information useful for debugging the simulator to the tracing output trace-file FILE NAME Specify tracing output file t t # # # # ; L # # # # # # 0 # ] l # # # # ( 2 # yes on 1 no off 0 Argument `%s' for `--trace%s' invalid, one of `on', `off', `yes', `no' expected -insn -decode -extract -linenum -memory -model -alu -core -events -fpu -vpu -branch -semantics -debug w Unable to open trace output file `%s' # r' r' r' r' r' r' r' r' r' r' r' r' r' $ ($ O$ v$ $ $ % G% n% % % & r' r' & ' % /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/../common/sim-trace.c STATE_MAGIC (sd) == SIM_MAGIC_NUMBER %s:%d: assertion failed - %s trace buffer overflow (instruction incomplete) 0x%08lx 0x%08lx%08lx size == sizeof (int) true false %-8s %8g (0x%08lx) (0x%08lx%08lx) , * + , , + * m* alu: insn: decode: extract: memory: core: events: fpu: branch: vpu: ?%d? <- , - - <- - <- , - - '- 5- .- %s %s :: %*s %s:%-*d 0x%.*lx 0x%.*lx could not read symbols could not canonicalize symbols #%-*d %-*s --- %s 0x%.*x %-*.*s - : %-*s %s:%-*d 0x%.*lx %-*s 0x%.*x %-*.*s /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/../common/sim-utils.c sd->base.magic == SIM_MAGIC_NUMBER %s:%d: assertion failed - %s %s STATE_MAGIC (sd) == SIM_MAGIC_NUMBER %s: can't open "%s": %s %s: "%s" is not an object file: %s .text %s: asprintf failed for `%s' read write exec io (%ld) invalid read_write read_exec write_exec read_write_exec read_io write_io read_write_io exec_io read_exec_io write_exec_io read_write_exec_io K K K L K L L L K L %L ,L 3L :L AL HL (error) @ @ @@ /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/../common/sim-watch.c type >= 0 && type < nr_watchpoint_types %s:%d: assertion failed - %s pc clock cycles (invalid-type) WN BN IN PN WN (invalid-interrupt) breakpoint Watchpoints: %3d: watch %s %s + ! 0x%lx ,0x%lx handle_watchpoint - internal error - bad switch Watchpoint %d not found all No PC watchpoints found No CLOCK watchpoints found No CYCLES watchpoints found Unknown watchpoint type `%s' Unknown watch option %d watch-delete IDENT|all|pc|cycles|clock Delete a watchpoint watch-info List scheduled watchpoints R _ y @S @S int STATE_MAGIC (sd) == SIM_MAGIC_NUMBER watch-%s-%s Watch the simulator, take ACTION in COUNT cycles (`+' for every COUNT cycles), ACTION is watch-cycles-ACTION [+]COUNT watch-pc-ACTION [!]ADDRESS Watch the PC, take ACTION when matches ADDRESS (in range ADDRESS,ADDRESS), `!' negates test watch-clock-ACTION [+]MILLISECONDS Watch the clock, take ACTION after MILLISECONDS (`+' for every MILLISECONDS) trace.din yes no on off Unrecognized dinero-trace option `%s' Failed to allocate buffer for tracefile name "%s" Placing trace information into file "%s" [ \ ] ] ] dinero-trace on|off Enable dinero tracing dinero-file FILE Write dinero trace to FILE firmware [idt|pmon|lsipmon|none][@ADDRESS] Emulate ROM monitor board none|jmr3904|jmr3904pal|jmr3904debug|bsp Customize simulation for a particular board. info-memory List configured memory regions memory-info d[ d[ d[ * 0 \ d[ d[ d[ /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/interp.c STATE_MAGIC (sd) == SIM_MAGIC_NUMBER %s:%d: assertion failed - %s memory region 0x7fff8000,0x8000 memory delete %d:0x%lx@%d memory alias 0x%lx@1,0x%lx%%0x%lx,0x%0x bsp memory alias 0x%lx@1,0x%lx,0x%0x ol != NULL memory region 0x%x,0x%x idt_monitor_base != 0 e f f f Hf %f Hf Hf 1f Hf Hf =f wb+ Failed to create file "%s", writing trace information to stderr. Invalid register width for %d (register store ignored) Invalid register width for %d (register fetch ignored) Error: "%s" is not a valid MIPS simulator command. Invalid address given to the`sim firmware NAME@ADDRESS' command: %s idt pmon lsipmon none The `sim firmware none' command does not take an `ADDRESS' argument. Unrecognized name given to the `sim firmware NAME' command: %s Recognized firmware names are: `idt', `pmon', `lsipmon', and `none'. Invalid return from character read sim_monitor(17): _exit(int reason) to be coded match != NULL dobxXulscefg% %% %c (null) dobxXu ll %%%s%c eEfgG %%%d.%d%c %d %s ; width %d ; sim_monitor: unhandled reason = %d, pc = 0x%s ReservedInstruction at PC = 0x%s FATAL: Simulator error "%s" I , I , , , , , , , , , , , , , , UNPREDICTABLE: PC = 0x%s Warning: ERET when SR[ERL] set not handled yet Delay slot already activated (branch in delay slot?) Unrecognised COP0 instruction 0x%08X at PC = 0x%s : No handler present COP2 instruction 0x%08X at PC = 0x%s : No handler present %08lx %08lx%08lx read write mips-core: %d byte %s to unmapped address 0x%lx at 0x%lx mips-core: %d byte %s to unaligned address 0x%lx at 0x%lx mips_core_signal - internal error - bad switch cpu != NULL Warning, nested exception triggered (%d) Warning, nested exception signal (%d then %d) Warning, resuming but ignoring pending exception signal (%d) Warning, resuming with mismatched exception signal (%d vs %d) Warning, ignoring spontanous exception signal (%d) LOAD AccessLength of %d would extend over %d bit aligned boundary for physical address 0x%s X ( s G STORE AccessLength of %d would extend over %d bit aligned boundary for physical address 0x%s V ) Y Instruction CACHE operation %d to be coded Data CACHE operation %d to be coded PENDING_DRAIN - Mis-match on pending update pointers /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/../common/sim-hload.c STATE_MAGIC (sd) == SIM_MAGIC_NUMBER %s:%d: assertion failed - %s STATE_PROG_BFD (sd) != NULL /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/../common/sim-engine.c STATE_MAGIC (sd) == SIM_MAGIC_NUMBER %s:%d: assertion failed - %s sim_halt - bad long jump sim_restart - bad long jump sd == NULL || STATE_MAGIC (sd) == SIM_MAGIC_NUMBER Quit Quit Simulator /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/../common/sim-stop.c STATE_MAGIC (sd) == SIM_MAGIC_NUMBER %s:%d: assertion failed - %s /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/../common/sim-resume.c STATE_MAGIC (sd) == SIM_MAGIC_NUMBER %s:%d: assertion failed - %s /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/../common/sim-reason.c STATE_MAGIC (sd) == SIM_MAGIC_NUMBER %s:%d: assertion failed - %s 32 f dsp dsp2 mdmx mips16 mips16e mips32 mips32r2 mips3d mips64 mips64r2 mipsI mipsII mipsIII mipsIV mipsV r3900 sb1 smartmips vr4100 vr4120 vr5000 vr5400 vr5500 6.0x0,5.*,5.*,5.*,5.OP,6.0x5 SPECIAL RSVD mips.igen 6.0x0,5.RS,5.RT,5.RD,5.0x0,6.0x20 mips32,mips32r2,mips64,mips64r2,mipsI,mipsII,mipsIII,mipsIV,mipsV,r3900,vr4100,vr5000 ADD 6.0x8,5.RS,5.RT,16.IMMEDIATE NORMAL ADDI 6.0x9,5.RS,5.RT,16.IMMEDIATE ADDIU 6.0x0,5.RS,5.RT,5.RD,5.0x0,6.0x21 ADDU 6.0x0,5.RS,5.RT,5.RD,5.0x0,6.0x24 AND 6.0xc,5.RS,5.RT,16.IMMEDIATE ANDI 6.0x4,5.RS,5.RT,16.OFFSET BEQ 6.0x14,5.RS,5.RT,16.OFFSET mips32,mips32r2,mips64,mips64r2,mipsII,mipsIII,mipsIV,mipsV,r3900,vr4100,vr5000 BEQL 6.0x1,5.RS,5.0x1,16.OFFSET REGIMM BGEZ 6.0x1,5.RS,5.0x11,16.OFFSET BGEZAL 6.0x1,5.RS,5.0x13,16.OFFSET BGEZALL 6.0x1,5.RS,5.0x3,16.OFFSET BGEZL 6.0x7,5.RS,5.0x0,16.OFFSET BGTZ 6.0x17,5.RS,5.0x0,16.OFFSET BGTZL 6.0x6,5.RS,5.0x0,16.OFFSET BLEZ 6.0x16,5.RS,5.0x0,16.OFFSET BLEZL 6.0x1,5.RS,5.0x0,16.OFFSET BLTZ 6.0x1,5.RS,5.0x10,16.OFFSET BLTZAL 6.0x1,5.RS,5.0x12,16.OFFSET BLTZALL 6.0x1,5.RS,5.0x2,16.OFFSET BLTZL 6.0x5,5.RS,5.RT,16.OFFSET BNE 6.0x15,5.RS,5.RT,16.OFFSET BNEL 6.0x0,20.CODE,6.0xd BREAK 6.0x0,5.RS,5.RT,10.0x0,6.0x1a DIV 6.0x0,5.RS,5.RT,10.0x0,6.0x1b DIVU 6.0x2,26.INSTR_INDEX J 6.0x3,26.INSTR_INDEX JAL 6.0x0,5.RS,5.0x0,5.RD,5.0x0,6.0x9 JALR 6.0x0,5.RS,10.0x0,5.0x0,6.0x8 JR 6.0x20,5.BASE,5.RT,16.OFFSET LB 6.0x24,5.BASE,5.RT,16.OFFSET LBU 6.0x21,5.BASE,5.RT,16.OFFSET LH 6.0x25,5.BASE,5.RT,16.OFFSET LHU 6.0x30,5.BASE,5.RT,16.OFFSET mips32,mips32r2,mips64,mips64r2,mipsII,mipsIII,mipsIV,mipsV,vr4100,vr5000 LL 6.0xf,5.0x0,5.RT,16.IMMEDIATE LUI 6.0x23,5.BASE,5.RT,16.OFFSET LW 4.0xc,2.ZZ,5.BASE,5.RT,16.OFFSET LWCz 6.0x22,5.BASE,5.RT,16.OFFSET LWL 6.0x26,5.BASE,5.RT,16.OFFSET LWR 6.0x0,10.0x0,5.RD,5.0x0,6.0x10 mips32,mips64,mipsI,mipsII,mipsIII,mipsIV,mipsV,r3900,vr4100,vr5000 MFHI 6.0x0,10.0x0,5.RD,5.0x0,6.0x12 MFLO 6.0x0,5.RS,5.RT,5.RD,5.0x0,6.0xb mips32,mips32r2,mips64,mips64r2,mipsIV,mipsV,vr5000 MOVN 6.0x0,5.RS,5.RT,5.RD,5.0x0,6.0xa MOVZ 6.0x0,5.RS,15.0x0,6.0x11 MTHI 6.0x0,5.RS,15.0x0,6.0x13 MTLO 6.0x0,5.RS,5.RT,10.0x0,6.0x18 mips32,mips64,mipsI,mipsII,mipsIII,mipsIV,mipsV,vr4100 MULT 6.0x0,5.RS,5.RT,10.0x0,6.0x19 MULTU 6.0x0,5.RS,5.RT,5.RD,5.0x0,6.0x27 NOR 6.0x0,5.RS,5.RT,5.RD,5.0x0,6.0x25 OR 6.0xd,5.RS,5.RT,16.IMMEDIATE ORI 6.0x33,5.BASE,5.HINT,16.OFFSET PREF 6.0x28,5.BASE,5.RT,16.OFFSET SB 6.0x38,5.BASE,5.RT,16.OFFSET SC 6.0x29,5.BASE,5.RT,16.OFFSET SH 6.0x0,5.0x0,5.RT,5.RD,5.SHIFT,6.0x0 mipsI,mipsII,mipsIII,mipsIV,mipsV,r3900,vr4100,vr5000 SLLa 6.0x0,5.RS,5.RT,5.RD,5.0x0,6.0x4 SLLV 6.0x0,5.RS,5.RT,5.RD,5.0x0,6.0x2a SLT 6.0xa,5.RS,5.RT,16.IMMEDIATE SLTI 6.0xb,5.RS,5.RT,16.IMMEDIATE SLTIU 6.0x0,5.RS,5.RT,5.RD,5.0x0,6.0x2b SLTU 6.0x0,5.0x0,5.RT,5.RD,5.SHIFT,6.0x3 SRA 6.0x0,5.RS,5.RT,5.RD,5.0x0,6.0x7 SRAV 6.0x0,5.0x0,5.RT,5.RD,5.SHIFT,6.0x2 SRL 6.0x0,5.RS,5.RT,5.RD,5.0x0,6.0x6 SRLV 6.0x0,5.RS,5.RT,5.RD,5.0x0,6.0x22 SUB 6.0x0,5.RS,5.RT,5.RD,5.0x0,6.0x23 SUBU 6.0x2b,5.BASE,5.RT,16.OFFSET SW 4.0xe,2.ZZ,5.BASE,5.RT,16.OFFSET SWCz 6.0x2a,5.BASE,5.RT,16.OFFSET SWL 6.0x2e,5.BASE,5.RT,16.OFFSET SWR 6.0x0,15.0x0,5.STYPE,6.0xf SYNC 6.0x0,20.CODE,6.0xc SYSCALL 6.0x0,5.RS,5.RT,10.CODE,6.0x34 TEQ 6.0x1,5.RS,5.0xc,16.IMMEDIATE TEQI 6.0x0,5.RS,5.RT,10.CODE,6.0x30 TGE 6.0x1,5.RS,5.0x8,16.IMMEDIATE TGEI 6.0x1,5.RS,5.0x9,16.IMMEDIATE TGEIU 6.0x0,5.RS,5.RT,10.CODE,6.0x31 TGEU 6.0x0,5.RS,5.RT,10.CODE,6.0x32 TLT 6.0x1,5.RS,5.0xa,16.IMMEDIATE TLTI 6.0x1,5.RS,5.0xb,16.IMMEDIATE TLTIU 6.0x0,5.RS,5.RT,10.CODE,6.0x33 TLTU 6.0x0,5.RS,5.RT,10.CODE,6.0x36 TNE 6.0x1,5.RS,5.0xe,16.IMMEDIATE TNEI 6.0x0,5.RS,5.RT,5.RD,5.0x0,6.0x26 XOR 6.0xe,5.RS,5.RT,16.IMMEDIATE XORI 6.0x11,2.0x2,3.FMT,5.0x0,5.FS,5.FD,6.0x5 COP1 32,f ABS.fmt 6.0x11,2.0x2,3.FMT,5.FT,5.FS,5.FD,6.0x0 ADD.fmt 6.0x11,5.0x8,3.CC,1.ND,1.TF,16.OFFSET COP1S mips32,mips32r2,mips64,mips64r2,mipsIV,mipsV,r3900,vr5000 BC1b 6.0x11,2.0x2,3.FMT,5.FT,5.FS,3.CC,2.0x0,2.0x3,4.COND mips32,mips32r2,mips64,mips64r2,mipsIV,mipsV,r3900,vr4100,vr5000 C.cond.fmtb 6.0x11,2.0x2,3.FMT,5.0x0,5.FS,5.FD,6.0xa mips32r2,mips64,mips64r2,mipsIII,mipsIV,mipsV,r3900,vr4100,vr5000 CEIL.L.fmt 6.0x11,2.0x2,3.FMT,5.0x0,5.FS,5.FD,6.0xe CEIL.W 6.0x11,5.0x2,5.RT,5.FS,11.0x0 mipsIV,r3900,vr4100,vr5000 CFC1b 6.0x11,5.0x6,5.RT,5.FS,11.0x0 CTC1b 6.0x11,2.0x2,3.FMT,5.0x0,5.FS,5.FD,6.0x21 CVT.D.fmt 6.0x11,2.0x2,3.FMT,5.0x0,5.FS,5.FD,6.0x25 CVT.L.fmt 6.0x11,2.0x2,3.FMT,5.0x0,5.FS,5.FD,6.0x20 CVT.S.fmt 6.0x11,2.0x2,3.FMT,5.0x0,5.FS,5.FD,6.0x24 CVT.W.fmt 6.0x11,2.0x2,3.FMT,5.FT,5.FS,5.FD,6.0x3 DIV.fmt 6.0x11,2.0x2,3.FMT,5.0x0,5.FS,5.FD,6.0xb FLOOR.L.fmt 6.0x11,2.0x2,3.FMT,5.0x0,5.FS,5.FD,6.0xf FLOOR.W.fmt 6.0x35,5.BASE,5.FT,16.OFFSET mips64,mips64r2,mipsIII,mipsIV,mipsV,r3900,vr4100,vr5000 LDC1b 6.0x31,5.BASE,5.FT,16.OFFSET LWC1 6.0x13,5.BASE,5.INDEX,5.0x0,5.FD,6.0x0 COP1X mips32r2,mips64,mips64r2,mipsIV,mipsV,vr5000 LWXC1 6.0x13,5.FR,5.FT,5.FS,5.FD,3.0x4,3.FMT MADD.fmt 6.0x11,5.0x0,5.RT,5.FS,11.0x0 MFC1b 6.0x11,2.0x2,3.FMT,5.0x0,5.FS,5.FD,6.0x6 MOV.fmt 6.0x0,5.RS,3.CC,1.0x0,1.TF,5.RD,5.0x0,6.0x1 MOVtf 6.0x11,2.0x2,3.FMT,3.CC,1.0x0,1.TF,5.FS,5.FD,6.0x11 MOVtf.fmt 6.0x11,2.0x2,3.FMT,5.RT,5.FS,5.FD,6.0x13 MOVN.fmt 6.0x11,2.0x2,3.FMT,5.RT,5.FS,5.FD,6.0x12 MOVZ.fmt 6.0x13,5.FR,5.FT,5.FS,5.FD,3.0x5,3.FMT MSUB.fmt 6.0x11,5.0x4,5.RT,5.FS,11.0x0 MTC1b 6.0x11,2.0x2,3.FMT,5.FT,5.FS,5.FD,6.0x2 MUL.fmt 6.0x11,2.0x2,3.FMT,5.0x0,5.FS,5.FD,6.0x7 NEG.fmt 6.0x13,5.FR,5.FT,5.FS,5.FD,3.0x6,3.FMT NMADD.fmt 6.0x13,5.FR,5.FT,5.FS,5.FD,3.0x7,3.FMT NMSUB.fmt 6.0x13,5.BASE,5.INDEX,5.HINT,5.0x0,6.0xf PREFX 6.0x11,2.0x2,3.FMT,5.0x0,5.FS,5.FD,6.0x15 RECIP.fmt 6.0x11,2.0x2,3.FMT,5.0x0,5.FS,5.FD,6.0x8 ROUND.L.fmt 6.0x11,2.0x2,3.FMT,5.0x0,5.FS,5.FD,6.0xc ROUND.W.fmt 6.0x11,2.0x2,3.FMT,5.0x0,5.FS,5.FD,6.0x16 RSQRT.fmt 6.0x3d,5.BASE,5.FT,16.OFFSET SDC1b 6.0x11,2.0x2,3.FMT,5.0x0,5.FS,5.FD,6.0x4 SQRT.fmt 6.0x11,2.0x2,3.FMT,5.FT,5.FS,5.FD,6.0x1 SUB.fmt 6.0x39,5.BASE,5.FT,16.OFFSET SWC1 6.0x13,5.BASE,5.INDEX,5.FS,5.0x0,6.0x8 SWXC1 6.0x11,2.0x2,3.FMT,5.0x0,5.FS,5.FD,6.0x9 TRUNC.L.fmt 6.0x11,2.0x2,3.FMT,5.0x0,5.FS,5.FD,6.0xd TRUNC.W 6.0x10,5.0x8,5.0x0,16.OFFSET COP0 mips32,mips32r2,mips64,mips64r2,mipsI,mipsII,mipsIII,mipsIV,mipsV,vr4100,vr5000 BC0F 6.0x10,5.0x8,5.0x2,16.OFFSET BC0FL 6.0x10,5.0x8,5.0x1,16.OFFSET mips32,mips32r2,mips64,mips64r2,mipsI,mipsII,mipsIII,mipsIV,mipsV,vr4100 BC0T 6.0x10,5.0x8,5.0x3,16.OFFSET BC0TL 6.0x2f,5.BASE,5.OP,16.OFFSET mips32,mips32r2,mips64,mips64r2,mipsIII,mipsIV,mipsV,r3900,vr4100,vr5000 CACHE 6.0x10,1.0x1,19.0x0,6.0x18 mips32,mips32r2,mips64,mips64r2,mipsIII,mipsIV,mipsV,vr4100,vr5000 ERET 6.0x10,5.0x0,5.RT,5.RD,5.0x0,6.REGX MFC0 6.0x10,5.0x4,5.RT,5.RD,5.0x0,6.REGX MTC0 6.0x10,1.0x1,19.0x0,6.0x10 RFE 4.0x4,2.ZZ,5.COP_FUN0,5.COP_FUN1,16.COP_FUN2 mips32,mips32r2,mips64,mips64r2,mipsI,mipsII,mipsIII,mipsIV,mipsV,r3900,vr4100 COPz 6.0x10,1.0x1,19.0x0,6.0x8 TLBP 6.0x10,1.0x1,19.0x0,6.0x1 TLBR 6.0x10,1.0x1,19.0x0,6.0x2 TLBWI 6.0x10,1.0x1,19.0x0,6.0x6 TLBWR /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/../common/sim-n-endian.h offset + sizeof_word <= sizeof(unsigned_N) %s:%d: assertion failed - %s word < (sizeof (unsigned_N) / sizeof_word) (sizeof (unsigned_N) % sizeof_word) == 0 /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/../common/sim-core.c STATE_MAGIC (sd) == SIM_MAGIC_NUMBER tbd->buffer != NULL read write core: %d byte %s to unmapped address 0x%lx at 0x%lx core: %d byte misaligned %s to address 0x%lx at 0x%lx sim_core_signal - internal error - bad switch (client == NULL) != (buffer == NULL) (client == NULL) >= (free_buffer != NULL) called on sim_core_map_attach with size zero next_mapping == NULL || next_mapping->level >= level memory map %d:0x%lx..0x%lx (%ld bytes) overlaps %d:0x%lx..0x%lx (%ld bytes) sim_core_map_attach - processor specific memory map not yet supported sim_core_attach - internal error - modulo and callback memory conflict sim_core_attach - internal error - modulo %lx not power of two sim_core_attach - internal error - conflicting buffer and attach arguments (addr & (nr_bytes - 1)) == 0 (addr + (nr_bytes - 1)) >= addr !abort || cpu != NULL Attempted to enable xor-endian mode when permenantly disabled. -> <- sim-n-core.h:%d: %s-%d %s:0x%08lx %s 0x%08lx%08lx%08lx%08lx %s-%d %s:0x%08lx %s 0x%08lx%08lx %s-%d %s:0x%08lx %s 0x%08lx %s-%d %s:0x%08lx %s 0x%04lx %s-%d %s:0x%08lx %s 0x%02lx next_event_queue - bad queue /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/../common/sim-events.c STATE_MAGIC (sd) == SIM_MAGIC_NUMBER %s:%d: assertion failed - %s events->resume_wallclock == 0 events->resume_wallclock != 0 events->queue != NULL %s:%d: , event time-from-event - time %ld, delta %ld - event %d, tag 0x%lx, time %ld, handler 0x%lx, data 0x%lx%s%s current_time == sim_events_time (sd) what is past is past! curr->next == NULL || curr->time_of_event <= curr->next->time_of_event curr == NULL || time_of_event < curr->time_of_event event scheduled at %ld - tag 0x%lx - time %ld, handler 0x%lx, data 0x%lx%s%s sim_events_schedule_after_signal - buffer oveflow signal scheduled at %ld - tag 0x%lx - time %ld, handler 0x%lx, data 0x%lx event watching clock at %ld - tag 0x%lx - wallclock %ld, handler 0x%lx, data 0x%lx sim_events_watch_sim - invalid nr bytes sim_events_watch_sim - invalid byte order event watching host at %ld - tag 0x%lx - host-addr 0x%lx, 0x%lx..0x%lx, handler 0x%lx, data 0x%lx sim_events_watch_core - invalid nr bytes sim_events_watch_core - invalid byte order event/watch descheduled at %ld - tag 0x%lx - time %ld, handler 0x%lx, data 0x%lx%s%s (events->time_from_event >= 0) == (events->queue != NULL) event/watch descheduled at %ld - tag 0x%lx - not found sim_watch_valid - bad switch ) E . J 3 O 8 t w n > 0 slip > 0 events->nr_ticks_to_process != 0 events_were_next event issued at %ld - tag 0x%lx - handler 0x%lx, data 0x%lx%s%s events->time_from_event >= events->nr_ticks_to_process , 1 0 /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/../common/sim-fpu.c src->fraction >= IMPLICIT_1 %s:%d: assertion failed - %s src->fraction < IMPLICIT_2 (exp == EXPMAX) <= ((fraction & ~IMPLICIT_1) == 0) $ 5# " *$ *$ # val.i == packed val == org s->fraction >= IMPLICIT_1 / 0 / U0 0 val == i v9 9 9 9 9 8: B: w: M: b: o; y; (< < < f->fraction < IMPLICIT_2 f->fraction >= IMPLICIT_1 (f->class == sim_fpu_class_number || f->class == sim_fpu_class_denorm) <= (f->fraction < IMPLICIT_2 && f->fraction >= IMPLICIT_1) f->fraction >= IMPLICIT_1 && f->fraction < IMPLICIT_2 high < LSBIT64 (((NR_FRAC_GUARD + 1) * 2) - 64) high >= LSBIT64 ((NR_FRAC_GUARD * 2) - 64) high >= IMPLICIT_1 && high < IMPLICIT_2 numerator >= denominator l->sign == r->sign y >= IMPLICIT_1 && y < IMPLICIT_4 y >= IMPLICIT_1 && y < (IMPLICIT_2 << 1) q >= IMPLICIT_1 && q < IMPLICIT_2 mm m m =m Um %m - + %s 0. *QuietNaN *SignalNaN 0.0 INF 1. *2^%+d r vr r s s r %sD %sSNaN %sQNaN %sISI %sIDI %sZDZ %sIMZ %sCVI %sCMP %sSQRT %sX %sO %sU %s/ %sR %s: can't open "%s": %s %s: "%s" is not an object file: %s %s: insufficient memory to load "%s" lma vma Loading section %s, size 0x%lx %s %s: no loadable sections "%s" Start address Transfer rate: %ld bits/sec %ld bits in <1 sec . 0x%lx memory-delete ADDRESS|all Delete memory at ADDRESS (all addresses) delete-memory ADDRESS memory-region ADDRESS,SIZE[,MODULO] Add a memory region memory-alias ADDRESS,SIZE{,ADDRESS} Add memory shadow memory-size [in bytes, Kb (k suffix), Mb (m suffix) or Gb (g suffix)] Add memory at address zero memory-fill VALUE Fill subsequently added memory regions memory-clear Clear subsequently added memory regions memory-mapfile FILE Memory-map next memory region from file memory-info List configurable memory regions info-memory map-info List mapped regions E S [ i 3 ? H o | " Error, unable to stat file: %s Error, cannot confirm that mmap file is large enough (>= %ld bytes) Error, cannot mmap file (%s). /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/../common/sim-memopt.c fill_buffer != 0 %s:%d: assertion failed - %s Memory at 0x%lx not found, not deleted all Missing size for memory-region Missing fill value between 0 and 255 Duplicate memory-mapfile option Cannot open file `%s': %s Memory maps: memory region alias 0x%lx: 0x%08lx @0x%lx ,0x%lx %%0x%lx ,0x%08lx %s maps: map 0x%x: @0x%x %%0x%x Unknown memory option %d 9 B A \ STATE_MAGIC (sd) == SIM_MAGIC_NUMBER FPR %d (format %s) being accessed with format %s - setting to unknown (PC = 0x%s) Unrecognised FP format in ValueFPR () p Unrecognised FP format in StoreFPR () q q q q q q q q q q q q q q q q q q q q q q q q ! q 4 q q ] Bad switch single double word long ps ? ? ? ? ? ? ? ? /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/../common/sim-bits.c start >= stop %s:%d: assertion failed - %s start <= stop sign_bit < 64 /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/../common/sim-n-bits.h shift <= N sign_bit < N /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/../common/sim-n-endian.h offset + sizeof_word <= sizeof(unsigned_N) word < (sizeof (unsigned_N) / sizeof_word) (sizeof (unsigned_N) % sizeof_word) == 0 /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/../common/sim-core.c (addr & (nr_bytes - 1)) == 0 (addr + (nr_bytes - 1)) >= addr !abort || cpu != NULL read write -> <- sim-n-core.h:%d: %s-%d %s:0x%08lx %s 0x%08lx%08lx%08lx%08lx %s-%d %s:0x%08lx %s 0x%08lx%08lx %s-%d %s:0x%08lx %s 0x%08lx %s-%d %s:0x%08lx %s 0x%04lx %s-%d %s:0x%08lx %s 0x%02lx /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/../common/sim-events.c %s:%d: , event time-from-event - time %ld, delta %ld - event %d, tag 0x%lx, time %ld, handler 0x%lx, data 0x%lx%s%s current_time == sim_events_time (sd) sim_watch_valid - bad switch K+ G L! ! " # Q$ $ % 4& & & L' ' 0( ( A) ) #* * &+ n > 0 slip > 0 events->nr_ticks_to_process != 0 events_were_next event issued at %ld - tag 0x%lx - handler 0x%lx, data 0x%lx%s%s events->time_from_event >= events->nr_ticks_to_process events->queue != NULL , 1 0 /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/../common/sim-fpu.c src->fraction >= IMPLICIT_1 src->fraction < IMPLICIT_2 (exp == EXPMAX) <= ((fraction & ~IMPLICIT_1) == 0) 5 '5 4 6 6 5 val.i == packed val == org s->fraction >= IMPLICIT_1 A B A GB B val == i hK rK K }K K *L 4L iL ?L TL aM kM N M N f->fraction < IMPLICIT_2 f->fraction >= IMPLICIT_1 (f->class == sim_fpu_class_number || f->class == sim_fpu_class_denorm) <= (f->fraction < IMPLICIT_2 && f->fraction >= IMPLICIT_1) f->fraction >= IMPLICIT_1 && f->fraction < IMPLICIT_2 high < LSBIT64 (((NR_FRAC_GUARD + 1) * 2) - 64) high >= LSBIT64 ((NR_FRAC_GUARD * 2) - 64) high >= IMPLICIT_1 && high < IMPLICIT_2 numerator >= denominator l->sign == r->sign y >= IMPLICIT_1 && y < IMPLICIT_4 y >= IMPLICIT_1 && y < (IMPLICIT_2 << 1) q >= IMPLICIT_1 && q < IMPLICIT_2 u & E ] - - + %s 0. *QuietNaN *SignalNaN 0.0 INF 1. *2^%+d ~ ! %sD %sSNaN %sQNaN %sISI %sIDI %sZDZ %sIMZ %sCVI %sCMP %sSQRT %sX %sO %sU %s/ %sR LOAD AccessLength of %d would extend over %d bit aligned boundary for physical address 0x%s { K j > STORE AccessLength of %d would extend over %d bit aligned boundary for physical address 0x%s y L | Instruction CACHE operation %d to be coded Data CACHE operation %d to be coded PENDING_DRAIN - Mis-match on pending update pointers Internal function must longjump load instruction HILO: %s: %s at 0x%08lx too close to MF at 0x%08lx MT HILO: %s: MF at 0x%08lx following OP at 0x%08lx corrupted by MT at 0x%08lx OP s d w l ps ? Z a } } h o v t f un eq ueq olt ult ole ule sf ngle seq ngl lt nge le ngt % , 3 save: aregs=%d causes unpredictable results _ _ _ _ h h h h q q q _ z z \ d # } } } } } hi u invalid multiplication operand at 0x%08lx engine.c current_cpu == 0 nr_cpus == 1 Internal error - bad switch generated C 5 V w = ^ ( 7 7 8 9 -9 N9 o9 o9 o9 o9 o9 o9 o9 o9 9 9 9 9 : .: O: o9 p: : : : o9 o9 : ; 6; W; x; ; o9 ; o9 o9 ; ; < o9 o9 5< o9 o9 p 6 W x k > _ k k k k % F k k k k g - N k k o k k k k / k M u u u u 7 X y u u 9 W u " % ) * * ,+ + 8, , L- - \. . h/ / t0 0 1 2 '2 2 ;3 2 3 K4 2 2 2 2 2 2 2 2 2 4 ^5 2 2 5 q6 2 2 2 2 2 2 2 2 2 2 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 C) ) d) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) 7 8 8 8 8 8 8 8 8 8 8 8 8 8 8 78 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 X8 X8 8 8 8 8 X8 8 v8 v8 8 8 8 8 v8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/../common/sim-bits.c start >= stop %s:%d: assertion failed - %s start <= stop sign_bit < 64 /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/../common/sim-n-bits.h shift <= N sign_bit < N /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/../common/sim-n-endian.h offset + sizeof_word <= sizeof(unsigned_N) word < (sizeof (unsigned_N) / sizeof_word) (sizeof (unsigned_N) % sizeof_word) == 0 /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/../common/sim-core.c (addr & (nr_bytes - 1)) == 0 (addr + (nr_bytes - 1)) >= addr !abort || cpu != NULL read write -> <- sim-n-core.h:%d: %s-%d %s:0x%08lx %s 0x%08lx%08lx%08lx%08lx %s-%d %s:0x%08lx %s 0x%08lx%08lx %s-%d %s:0x%08lx %s 0x%08lx %s-%d %s:0x%08lx %s 0x%04lx %s-%d %s:0x%08lx %s 0x%02lx /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/../common/sim-events.c %s:%d: , event time-from-event - time %ld, delta %ld - event %d, tag 0x%lx, time %ld, handler 0x%lx, data 0x%lx%s%s current_time == sim_events_time (sd) sim_watch_valid - bad switch R W \ F ] v X n > 0 slip > 0 events->nr_ticks_to_process != 0 events_were_next event issued at %ld - tag 0x%lx - handler 0x%lx, data 0x%lx%s%s events->time_from_event >= events->nr_ticks_to_process events->queue != NULL , 1 0 /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/../common/sim-fpu.c src->fraction >= IMPLICIT_1 src->fraction < IMPLICIT_2 (exp == EXPMAX) <= ((fraction & ~IMPLICIT_1) == 0) ^ x val.i == packed val == org s->fraction >= IMPLICIT_1 J val == i , 6 k A V - % / f->fraction < IMPLICIT_2 f->fraction >= IMPLICIT_1 (f->class == sim_fpu_class_number || f->class == sim_fpu_class_denorm) <= (f->fraction < IMPLICIT_2 && f->fraction >= IMPLICIT_1) f->fraction >= IMPLICIT_1 && f->fraction < IMPLICIT_2 high < LSBIT64 (((NR_FRAC_GUARD + 1) * 2) - 64) high >= LSBIT64 ((NR_FRAC_GUARD * 2) - 64) high >= IMPLICIT_1 && high < IMPLICIT_2 numerator >= denominator l->sign == r->sign y >= IMPLICIT_1 && y < IMPLICIT_4 y >= IMPLICIT_1 && y < (IMPLICIT_2 << 1) q >= IMPLICIT_1 && q < IMPLICIT_2 9 ! - + %s 0. *QuietNaN *SignalNaN 0.0 INF 1. *2^%+d B %sD %sSNaN %sQNaN %sISI %sIDI %sZDZ %sIMZ %sCVI %sCMP %sSQRT %sX %sO %sU %s/ %sR LOAD AccessLength of %d would extend over %d bit aligned boundary for physical address 0x%s ? Z . o o o o o o o v STORE AccessLength of %d would extend over %d bit aligned boundary for physical address 0x%s g = t @ Instruction CACHE operation %d to be coded Data CACHE operation %d to be coded PENDING_DRAIN - Mis-match on pending update pointers Internal function must longjump load instruction HILO: %s: %s at 0x%08lx too close to MF at 0x%08lx MT HILO: %s: MF at 0x%08lx following OP at 0x%08lx corrupted by MT at 0x%08lx OP s d w l ps ? T %T AT AT ,T 3T :T t f un eq ueq olt ult ole ule sf ngle seq ngl lt nge le ngt T T T T T T T T T T T T T T T T save: aregs=%d causes unpredictable results #V #V #V #V ,V ,V ,V ,V 5V 5V 5V #V >V >V GV Y ^Y Y X X fX (X W AZ JZ SZ \Z AZ JZ SZ \Z AZ JZ SZ eZ AZ JZ AZ hi u invalid multiplication operand at 0x%08lx rsvd %ld %s syscall %#lx break %#lx tge r%ld, r%ld tgeu r%ld, r%ld tlt r%ld, r%ld tltu r%ld, r%ld teq r%ld, r%ld tne r%ld, r%ld sllv r%ld, r%ld, r%ld srlv r%ld, r%ld, r%ld srav r%ld, r%ld, r%ld movz r%ld, r%ld, r%ld movn r%ld, r%ld, r%ld add r%ld, r%ld, r%ld addu r%ld, r%ld, r%ld sub r%ld, r%ld, r%ld subu r%ld, r%ld, r%ld and r%ld, r%ld, r%ld or r%ld, r%ld, r%ld xor r%ld, r%ld, r%ld nor r%ld, r%ld, r%ld slt r%ld, r%ld, r%ld sltu r%ld, r%ld, r%ld mult r%ld, r%ld multu r%ld, r%ld div r%ld, r%ld divu r%ld, r%ld mov%s r%ld, r%ld, %ld jalr r%ld jalr r%ld, r%ld jr r%ld mthi r%ld mtlo r%ld nop sll r%ld, r%ld, %ld srl r%ld, r%ld, %ld sra r%ld, r%ld, %ld mfhi r%ld mflo r%ld sync sync %ld bltz r%ld, %ld bgez r%ld, %ld bltzl r%ld, %ld bgezl r%ld, %ld tgei r%ld, %ld tgeiu r%ld, %ld tlti r%ld, %ld tltiu r%ld, %ld teqi r%ld, %ld tnei r%ld, %ld bltzal r%ld, %ld bgezal r%ld, %ld bltzall r%ld, %ld bgezall r%ld, %ld j %ld jal %ld beq r%ld, r%ld, %ld bne r%ld, r%ld, %ld blez r%ld, %ld bgtz r%ld, %ld addi r%ld, r%ld, %ld addiu r%ld, r%ld, %ld slti r%ld, r%ld, %ld sltiu r%ld, r%ld, %ld andi r%ld, r%ld, %#lx ori r%ld, r%ld, %#lx xori r%ld, r%ld, %#lx lui r%ld, %#lx cop%ld %ld%ld%ld mfc0 r%ld, r%ld # %ld mtc0 r%ld, r%ld # %ld bc0f %ld mips.igen:5679:0x%08lx:%s unimplemented bc0t %ld mips.igen:5717:0x%08lx:%s unimplemented bc0fl %ld mips.igen:5702:0x%08lx:%s unimplemented bc0tl %ld mips.igen:5731:0x%08lx:%s unimplemented tlbr mips.igen:5912:0x%08lx:%s unimplemented tlbwi mips.igen:5927:0x%08lx:%s unimplemented tlbwr mips.igen:5942:0x%08lx:%s unimplemented tlbp mips.igen:5897:0x%08lx:%s unimplemented rfe eret Warning: ERET when SR[ERL] set not supported mfc1 r%ld, f%ld cfc1 r%ld, f%ld mtc1 r%ld, f%ld ctc1 r%ld, f%ld bc1%s%s %ld bc1%s%s %ld, %ld add.%s f%ld, f%ld, f%ld sub.%s f%ld, f%ld, f%ld mul.%s f%ld, f%ld, f%ld div.%s f%ld, f%ld, f%ld movz.%s f%ld, f%ld, r%ld movn.%s f%ld, f%ld, r%ld c.%s.%s f%ld, f%ld c.%s.%s %ld, f%ld, f%ld mov%s.%s f%ld, f%ld, %ld sqrt.%s f%ld, f%ld abs.%s f%ld, f%ld mov.%s f%ld, f%ld neg.%s f%ld, f%ld round.l.%s f%ld, f%ld trunc.l.%s f%ld, f%ld ceil.l.%s f%ld, f%ld floor.l.%s f%ld, f%ld round.w.%s f%ld, f%ld trunc.w.%s f%ld, f%ld ceil.w.%s f%ld, f%ld floor.w.%s f%ld, f%ld recip.%s f%ld, f%ld rsqrt.%s f%ld, f%ld cvt.s.%s f%ld, f%ld cvt.d.%s f%ld, f%ld cvt.w.%s f%ld, f%ld cvt.l.%s f%ld, f%ld madd.%s f%ld, f%ld, f%ld, f%ld msub.%s f%ld, f%ld, f%ld, f%ld nmadd.%s f%ld, f%ld, f%ld, f%ld nmsub.%s f%ld, f%ld, f%ld, f%ld swxc1 f%ld, r%ld(r%ld) prefx %ld, r%ld(r%ld) lwxc1 f%ld, r%ld(r%ld) beql r%ld, r%ld, %ld bnel r%ld, r%ld, %ld bgtzl r%ld, %ld lb r%ld, %ld(r%ld) lh r%ld, %ld(r%ld) lwl r%ld, %ld(r%ld) lw r%ld, %ld(r%ld) lbu r%ld, %ld(r%ld) lhu r%ld, %ld(r%ld) lwr r%ld, %ld(r%ld) sb r%ld, %ld(r%ld) sh r%ld, %ld(r%ld) swl r%ld, %ld(r%ld) sw r%ld, %ld(r%ld) swr r%ld, %ld(r%ld) cache %ld, %ld(r%ld) lwc%ld r%ld, %ld(r%ld) ll r%ld, %ld(r%ld) lwc1 f%ld, %ld(r%ld) pref %ld, %ld(r%ld) ldc1 f%ld, %ld(r%ld) swc%ld r%ld, %ld(r%ld) sc r%ld, %ld(r%ld) swc1 f%ld, %ld(r%ld) sdc1 f%ld, %ld(r%ld) /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/../common/sim-bits.c start >= stop %s:%d: assertion failed - %s start <= stop sign_bit < 64 /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/../common/sim-n-bits.h shift <= N sign_bit < N /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/../common/sim-n-endian.h offset + sizeof_word <= sizeof(unsigned_N) word < (sizeof (unsigned_N) / sizeof_word) (sizeof (unsigned_N) % sizeof_word) == 0 /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/../common/sim-core.c (addr & (nr_bytes - 1)) == 0 (addr + (nr_bytes - 1)) >= addr !abort || cpu != NULL read write -> <- sim-n-core.h:%d: %s-%d %s:0x%08lx %s 0x%08lx%08lx%08lx%08lx %s-%d %s:0x%08lx %s 0x%08lx%08lx %s-%d %s:0x%08lx %s 0x%08lx %s-%d %s:0x%08lx %s 0x%04lx %s-%d %s:0x%08lx %s 0x%02lx /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/../common/sim-events.c %s:%d: , event time-from-event - time %ld, delta %ld - event %d, tag 0x%lx, time %ld, handler 0x%lx, data 0x%lx%s%s current_time == sim_events_time (sd) sim_watch_valid - bad switch _5 & ' [( ) ) * `+ , , - e. / / H0 0 0 `1 1 D2 2 U3 3 74 4 :5 n > 0 slip > 0 events->nr_ticks_to_process != 0 events_were_next event issued at %ld - tag 0x%lx - handler 0x%lx, data 0x%lx%s%s events->time_from_event >= events->nr_ticks_to_process events->queue != NULL , 1 0 /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/sim/mips/../common/sim-fpu.c src->fraction >= IMPLICIT_1 src->fraction < IMPLICIT_2 (exp == EXPMAX) <= ((fraction & ~IMPLICIT_1) == 0) @ ;? > 0@ 0@ ? val.i == packed val == org s->fraction >= IMPLICIT_1 K L K [L L val == i |U U U U U >V HV }V SV hV uW W .X X X f->fraction < IMPLICIT_2 f->fraction >= IMPLICIT_1 (f->class == sim_fpu_class_number || f->class == sim_fpu_class_denorm) <= (f->fraction < IMPLICIT_2 && f->fraction >= IMPLICIT_1) f->fraction >= IMPLICIT_1 && f->fraction < IMPLICIT_2 high < LSBIT64 (((NR_FRAC_GUARD + 1) * 2) - 64) high >= LSBIT64 ((NR_FRAC_GUARD * 2) - 64) high >= IMPLICIT_1 && high < IMPLICIT_2 numerator >= denominator l->sign == r->sign y >= IMPLICIT_1 && y < IMPLICIT_4 y >= IMPLICIT_1 && y < (IMPLICIT_2 << 1) q >= IMPLICIT_1 && q < IMPLICIT_2 : 3 Y q A - + %s 0. *QuietNaN *SignalNaN 0.0 INF 1. *2^%+d 5 %sD %sSNaN %sQNaN %sISI %sIDI %sZDZ %sIMZ %sCVI %sCMP %sSQRT %sX %sO %sU %s/ %sR LOAD AccessLength of %d would extend over %d bit aligned boundary for physical address 0x%s _ 2 ~ R STORE AccessLength of %d would extend over %d bit aligned boundary for physical address 0x%s ` , $ Instruction CACHE operation %d to be coded Data CACHE operation %d to be coded PENDING_DRAIN - Mis-match on pending update pointers Internal function must longjump load instruction HILO: %s: %s at 0x%08lx too close to MF at 0x%08lx MT HILO: %s: MF at 0x%08lx following OP at 0x%08lx corrupted by MT at 0x%08lx OP s d w l ps ? n u | t f un eq ueq olt ult ole ule sf ngle seq ngl lt nge le ngt $ + 2 9 @ G save: aregs=%d causes unpredictable results s s s s | | | | s p 2 x 7 hi u invalid multiplication operand at 0x%08lx Internal error - bad switch generated % F g - N o ]1 @ <@ _A A A A A A A A A A A A A B ?B `B B B B A B C &C GC A A hC C C C C D A .D A A OD mD D A A D A A & G h . O p 6 W x > _ % F g ' H i / P q ! % ( + *. 1 2 3 3 &4 4 65 5 J6 6 V7 7 b8 8 n9 9 z: : %; ; z: 9< < z: z: z: z: z: z: z: z: z: E= = z: z: _> > z: z: z: z: z: z: z: z: z: z: k? k? k? k? k? k? k? k? k? k? k? k? k? k? k? k? 1 q2 1 q2 1 q2 2 q2 52 q2 q2 q2 q2 q2 q2 q2 S2 S2 q2 q2 q2 q2 S2 i@ DA DA DA DA DA DA DA @ DA DA DA DA DA DA @ DA DA DA DA DA DA DA DA DA DA DA DA DA DA DA DA @ @ DA DA DA DA @ DA @ @ DA DA DA DA @ DA A A DA DA DA DA A DA &A &A DA DA DA DA &A @^ binary unknown /4 /4 G G UNKNOWN! No error System call error Invalid bfd target File in wrong format Archive object file in wrong format Invalid operation Memory exhausted No symbols Archive has no index; run ranlib to add one No more archived files Malformed archive File format not recognized File format is ambiguous Section has no contents Nonrepresentable section on output Symbol needs debug section which does not exist Bad value File truncated File too big Error reading %s: %s # 4 4 4 4 4 4 4 5 5 D5 [5 m5 5 5 5 5 6 6 )6 66 K6 /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/bfd/bfd.c %s %s: %s %s: BFD: %s(%s) %s %s[%s] (GNU Binutils) 2.21.51.20110403 BFD %s assertion fail %s:%d BFD %s internal error, aborting at %s line %d in %s BFD %s internal error, aborting at %s line %d Please report this bug. coff-go32 pe-i386 pei-i386 pe-x86-64 pei-x86-64 pe-arm-wince-little pei-arm-wince-little mach-o %08lx %016llx _bfd_set_gp_value _bfd_default_error_handler bfd_set_error /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/bfd/cache.c reopening %B: %s h i f 9g lj j j Rk r r+ w+ cache_bmmap bfd_cache_lookup_worker /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/bfd/coffgen.c strange .file .debug %B: bad string table size %lu l n g coff %s %s [%3ld] (sec %2d)(fl 0x%02x)(ty %3x)(scl %3d) (nx %d) 0x %s File AUX scnlen 0x%lx nreloc %d nlnno %d checksum 0x%lx assoc %d comdat %d AUX tagndx %ld ttlsiz 0x%lx lnnos %ld next %ld AUX lnno %d size 0x%x tagndx %ld endndx %ld %s : %4d : %-5s %s %s %s coff_fix_symbol_name invalid object archive core unknown /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/bfd/libbfd.c %B: unable to get decompressed section %A %B: compiled for a big endian system and target is little endian %B: compiled for a little endian system and target is big endian Deprecated %s called at %s line %d in %s Deprecated %s called _bfd_generic_get_section_contents_in_window bfd_get_bits bfd_put_bits r r+ /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/bfd/opncls.c j Z t | .gnu_debuglink . .debug/ / 0 w,a Q m jp5 c d 2 y +L | ~ - d jHq A } mQ V l kdz b e O\ l cc= n;^ iL A` rqg jm Zjz ' }D h i]Wb ge q6l knv + Zz J go C ` ~ 8R O g gW ?K6 H + L J 6`z A ` U g n1y iF a f o%6 hR w G "/& U ; ( Z + j \ 1 , [ d & c ju m ?6 g r W J z + {8 |! B hn [& w owG Z pj ; f\ e i b kaE l x T N 9a&g ` MGiI wn>Jj Z f @ ; 7S G 0 0 S $ 6 )W T g #.zf Ja h] +o*7 Z -bfd_fdopenr *COM* *UND* *ABS* *IND* B &B ,B 2B @ /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/bfd/section.c .%d bfd_map_over_sections bfd_get_unique_section_name %c%c%c%c%c%c%c .bss code .data *DEBUG* .debug .drectve .edata .fini .idata .init .pdata .rdata .rodata .sbss .scommon .sdata .text vars zerovars pC b uC t zC d C N C N C i C e C t C i C t C p C r C r C s C c C g C t C d C b .stab .stabstr $GDB_SYMBOLS$ $GDB_STRINGS$ Unsupported .stab relocation `| z @ `E C P N T R I K _ P M U mips*-big-* mips*el-*-netbsd* mips*-*-netbsd* mips*-dec-* mips*el-*-ecoff* mips*-*-ecoff* mips*-sgi-* mips*-*-bsd* mips*-*-sysv4* mips*-*-sysv* mips*-*-riscos* mips*el-sde-elf* mips*-sde-elf* mips64*-*-openbsd* mips64*el-*-linux* mips64*-*-linux* mips*el-*-linux* mips*-*-linux* PE \E `| nE z ~E E @ E E E E z E E E `| F z F C #F 6F GF `| XF z GNUTARGET default /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/bfd/hash.c ! ;A bfd_hash_replace bfd_hash_rename ? ? 0123456789ABCDEF \%03o %B:%d: Unexpected character `%s' in S-record file .sec%d %B:%d: Bad checksum in S-record file / 0 0 / %6 / %6 3 3 |4 /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/bfd/srec.c $$ %016llx $$ %-5s %s srec I w } } 6 & ~ K W = c L L cM IM } h r ? Y? K Y J + b l , 1 J J J J J symbolsrec pK w } } 8 & ~ K W = c L L cM IM } h r ? Y? K Y J + b l , 1 J J J J J .data _binary_%s_%s start end size Warning: Writing section `%s' to huge (ie negative) file offset 0x%lx. binary M { } } M M W N c 6O .P c Q } h r F Q S Y J + b l , 1 J J J J J 0123456789ABCDEF /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/bfd/tekhex.c $ %0781010 Gh oh h oh h h h h h h h h h h oh h h h h h h h h h h h h h h h h h [h h h h h h h h h h h h h h h h h h h h %-5s %s tekhex P w } } [^ ] ~ e W ~` c ] ] i &j j } h r ` a i Y J + b l , 1 J J J J J tekhex_write_object_contents out \%03o %B:%d: unexpected character `%s' in Intel Hex file %B:%u: bad checksum in Intel Hex file (expected %u, found %u) .sec%d %B:%u: bad extended address record length in Intel Hex file %B:%u: bad extended start address length in Intel Hex file %B:%u: bad extended linear address record length in Intel Hex file %B:%u: bad extended linear start address length in Intel Hex file %B:%u: unrecognized ihex type %u in Intel Hex file vp r Br r 2t t /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/bfd/ihex.c %B: internal error in ihex_read_section %B: bad section length in ihex_read_section %016llx %s: address 0x%s out of range for Intel Hex file ihex yU } } Ww j ~ g W 5| c @ @ c c } J h r | = Y J + b l , 1 J J J J J 0123456789ABCDEF .debug_abbrev .zdebug_abbrev .debug_aranges .zdebug_aranges .debug_frame .zdebug_frame .debug_info .zdebug_info .debug_line .zdebug_line .debug_loc .zdebug_loc .debug_macinfo .zdebug_macinfo .debug_pubnames .zdebug_pubnames .debug_pubtypes .zdebug_pubtypes .debug_ranges .zdebug_ranges .debug_static_func .zdebug_static_func .debug_static_vars .zdebug_static_vars .debug_str .zdebug_str .debug_types .zdebug_types .debug_sfnames .zdebug_sfnames .debug_srcinfo .zebug_srcinfo .debug_funcnames .zdebug_funcnames .debug_typenames .zdebug_typenames .debug_varnames .zdebug_varnames .debug_weaknames .zdebug_weaknames Dwarf Error: Can't find %s section. Dwarf Error: Offset (%lu) greater than or equal to %s size (%lu). /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/bfd/dwarf2.c Dwarf Error: Invalid or unhandled FORM value: %u. , E # G 2 & q S C m Y Dwarf Error: mangled line number section (bad file number). %s/%s/%s %s/%s Dwarf Error: Unhandled .debug_line version %d. Dwarf Error: Invalid maximum operations per instruction. Dwarf Error: mangled line number section. 1 p 8 e Q Dwarf Error: Could not find abbrev number %u. Dwarf Error: found dwarf version '%u', this reader only handles version 2, 3 and 4 information. Dwarf Error: found address size '%u', this reader can not handle sizes greater than '%u'. Dwarf Error: found address size '%u', this reader can only handle address sizes '2', '4' and '8'. Dwarf Error: Bad abbrev number: %u. .gnu.linkonce.wi. /tmp/ndk-andrewhsieh/build/toolchain/prefix/lib/debug find_line scan_unit_for_symbols find_abstract_instance_name read_address 1.2.3.3 ZLIB /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/bfd/compress.c bfd_get_full_section_contents 0123456789ABCDEF verilog ^ w } } ) W c J J c c } J h r 8 s , c c c c J J J J J R_MIPS_NONE R_MIPS_16 R_MIPS_32 R_MIPS_REL32 R_MIPS_26 R_MIPS_HI16 R_MIPS_LO16 R_MIPS_GPREL16 R_MIPS_LITERAL R_MIPS_GOT16 R_MIPS_PC16 R_MIPS_CALL16 R_MIPS_GPREL32 R_MIPS_SHIFT5 R_MIPS_SHIFT6 R_MIPS_64 R_MIPS_GOT_DISP R_MIPS_GOT_PAGE R_MIPS_GOT_OFST R_MIPS_GOT_HI16 R_MIPS_GOT_LO16 R_MIPS_SUB R_MIPS_HIGHER R_MIPS_HIGHEST R_MIPS_CALL_HI16 R_MIPS_CALL_LO16 R_MIPS_SCN_DISP R_MIPS_JALR R_MIPS_TLS_DTPMOD32 R_MIPS_TLS_DTPREL32 R_MIPS_TLS_GD R_MIPS_TLS_LDM R_MIPS_TLS_DTPREL_HI16 R_MIPS_TLS_DTPREL_LO16 R_MIPS_TLS_GOTTPREL R_MIPS_TLS_TPREL32 R_MIPS_TLS_TPREL_HI16 R_MIPS_TLS_TPREL_LO16 R_MIPS_GLOB_DAT yN ` yN ` yN ` yN ` yN ` nJ ` 3L a a a K -a yN :a yN Fa Ta yN ca yN qa @ f a yN a yN a yN a yN a yN a @ yN a yN a yN a yN b yN b yN #b ! " # $ % yN 3b & yN ?b ' yN Sb ( ) * yN gb + yN ub , yN b - yN b . yN b / yN b 0 1 yN b 2 yN b 3 yN c f a R_MIPS16_26 R_MIPS16_GPREL R_MIPS16_GOT16 R_MIPS16_CALL16 R_MIPS16_HI16 R_MIPS16_LO16 d yN o e o o f K o g yN o h nJ o i 3L o R_MIPS_GNU_REL16_S2 yN hq R_MIPS_PC32 yN q R_MIPS_GNU_VTINHERIT r R_MIPS_GNU_VTENTRY ? |r R_MIPS_COPY ~ F r R_MIPS_JUMP_SLOT F " elf32-bigmips v ? / } } 5 v) ~ ) i? _" )G b # ` ' \ B V ~ j w & S s &' ( $6 5Y n6 7 - 3; F( W( (7 ; 7 7 + 7 : l + 1 ' 2) e ) a* x elf32-littlemips px ? / m [ V W m [ V W 5 v) ~ ) i? _" )G b # ` ' \ B V ~ j w & S s &' ( $6 5Y n6 7 - 3; F( W( (7 ; 7 7 + 7 : l + 1 ' 2) e ) a* v elf32-tradbigmips Pz ? / } } 5 v) ~ ) i? _" )G b # ` ' \ B V ~ j w & S s &' ( $6 5Y n6 7 - 3; F( W( (7 ; 7 7 + 7 : l + 1 ' 2) e ) a* `| elf32-tradlittlemips 0| ? / m [ V W m [ V W 5 v) ~ ) i? _" )G b # ` ' \ B V ~ j w & S s &' ( $6 5Y n6 7 - 3; F( W( (7 ; 7 7 + 7 : l + 1 ' 2) e ) a* z elf32-tradbigmips-freebsd ~ ? / } } 5 v) ~ ) i? _" )G b # ` ' \ B V ~ j w & S s &' ( $6 5Y n6 7 - 3; F( W( (7 ; 7 7 + 7 : l + 1 ' 2) e ) a* elf32-tradlittlemips-freebsd ? / m [ V W m [ V W 5 v) ~ ) i? _" )G b # ` ' \ B V ~ j w & S s &' ( $6 5Y n6 7 - 3; F( W( (7 ; 7 7 + 7 : l + 1 ' 2) e ) a* @~ elf32-bigmips-vxworks ? / } } 5 v) ~ ) i? _" )G b # ` ' \ B V ~ j w & S s &' ( $6 5Y n6 7 - 3; F( W( (7 ; 7 7 + 7 : l + 1 ' 2) e ) a* elf32-littlemips-vxworks ? / m [ V W m [ V W 5 v) ~ ) i? _" )G b # ` ' \ B V ~ j w & S s &' ( $6 5Y n6 7 - 3; F( W( (7 ; 7 7 + 7 : l + 1 ' 2) e ) a* _procedure_table _procedure_string_table _procedure_table_size < ' # !x ' < % # !x ' < % # !x ' < % < 9' 9 $ < 9' 9 $ static procedure (no name) /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/bfd/elfxx-mips.c .mips16.fn. .mips16.call. .mips16.call.fp. .pdr .mips16. .text.stub.%d .pic. .text _gp_disp .data .sdata .rodata .rdata .bss .sbss .init .fini .rela.dyn .rel.dyn not enough GOT space for local GOT entries .compact_rel .got _GLOBAL_OFFSET_TABLE_ .got.plt __GOTT_BASE__ __GOTT_INDEX__ __gnu_local_gp _DYNAMIC_LINK _DYNAMIC_LINKING .dynamic c @ c @ @ @ @ @ @ @ c @ @ c c @ @ @ @ @ @ c c @ @ @ @ @ @ @ @ @ @ c c @ @ c @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ c c \ t 0 0 & n [ n L p f 0 \ t %B: %A+0x%lx: Direct jumps between ISA modes are not allowed; consider recompiling with interlinking enabled. N32 64 none O32 O64 EABI32 EABI64 unknown abi .acommon .scommon .gcc_compiled_long32 .gcc_compiled_long64 .MIPS.options .options %B: Warning: bad `%s' option size %u smaller than its header .lit8 .lit4 .srdata .rtproc .liblist .msym .conflict .gptab. .ucode .mdebug .reginfo .MIPS.interfaces .MIPS.content .debug_ .zdebug_ .MIPS.symlib .MIPS.events .MIPS.post_rel a + X 6 .hash .dynstr .debug_frame _rld_new_interface __rld_obj_head .MIPS.stubs .rld_map .dynsym __rld_map __RLD_MAP .plt .dynbss .rela.bss .rela.plt .rel.plt %B: Warning: cannot determine the target function for stub section `%s' %B: Malformed reloc detected for section %s %B: GOT reloc at 0x%lx not expected in executables %B: CALL16 reloc at 0x%lx not against global symbol a local symbol %B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC t t t t t t t t t t t t t t non-dynamic relocations refer to dynamic symbol %s .interp /usr/lib64/libc.so.1 /usr/lib/libc.so.1 /usr/lib32/libc.so.1 _PROCEDURE_LINKAGE_TABLE_ .rel %B: Can't find matching LO16 reloc against `%s' for %s at 0x%lx in section `%A' internal error: unsupported relocation error small-data section exceeds 64KB; lower small-data size limit (see option -G) %P: %s F E F H =E F H _DYNAMIC x x k % _gp .gptab.sdata .gptab.sbss %s: illegal section name `%s' .gptab.data .gptab.bss e A A @ @ @ @ @ . ' 6 ' > ' | @ ' @ @ X @ (# @ @ * 0 ! p p p < Warning: %B uses unknown floating point ABI %d Warning: %B uses -msingle-float, %B uses -mdouble-float Warning: %B uses hard float, %B uses soft float Warning: %B uses -msingle-float, %B uses -mips32r2 -mfp64 Warning: %B uses -mdouble-float, %B uses -mips32r2 -mfp64 %B: endianness incompatible with that of the selected emulation %B: ABI is incompatible with that of the selected emulation %B: warning: linking abicalls files with non-abicalls files %B: linking 32-bit code with 64-bit code %B: linking %s module with previous %s modules %B: ABI mismatch: linking %s module with previous %s modules %B: uses different e_flags (0x%lx) fields than previous modules (0x%lx) MIPS_RLD_VERSION MIPS_TIME_STAMP MIPS_ICHECKSUM MIPS_IVERSION MIPS_FLAGS MIPS_BASE_ADDRESS MIPS_MSYM MIPS_CONFLICT MIPS_LIBLIST MIPS_LOCAL_GOTNO MIPS_CONFLICTNO MIPS_LIBLISTNO MIPS_SYMTABNO MIPS_UNREFEXTNO MIPS_GOTSYM MIPS_HIPAGENO MIPS_RLD_MAP MIPS_DELTA_CLASS MIPS_DELTA_CLASS_NO MIPS_DELTA_INSTANCE MIPS_DELTA_INSTANCE_NO MIPS_DELTA_RELOC MIPS_DELTA_RELOC_NO MIPS_DELTA_SYM MIPS_DELTA_SYM_NO MIPS_DELTA_CLASSSYM MIPS_DELTA_CLASSSYM_NO MIPS_CXX_FLAGS MIPS_PIXIE_INIT MIPS_SYMBOL_LIB MIPS_LOCALPAGE_GOTIDX MIPS_LOCAL_GOTIDX MIPS_HIDDEN_GOTIDX MIPS_PROTECTED_GOT_IDX MIPS_OPTIONS MIPS_INTERFACE DT_MIPS_DYNSTR_ALIGN DT_MIPS_INTERFACE_SIZE DT_MIPS_RLD_TEXT_RESOLVE_ADDR DT_MIPS_PERF_SUFFIX DT_MIPS_COMPACT_SIZE DT_MIPS_GP_VALUE DT_MIPS_AUX_DYNAMIC DT_MIPS_PLTGOT DT_MIPS_RWPLT # - 7 A K U _ i s } $ + 2 9 @ G N U private flags = %lx: [abi=O32] [abi=O64] [abi=EABI32] [abi=EABI64] [abi unknown] [abi=N32] [abi=64] [no abi set] [mips1] [mips2] [mips3] [mips4] [mips5] [mips32] [mips64] [mips32r2] [mips64r2] [unknown ISA] [mdmx] [mips16] [32bitmode] [not 32bitmode] [noreorder] [PIC] [CPIC] [XGOT] [UCODE] Y p } R p mips_elf_merge_obj_attributes _bfd_mips_elf_final_link h w } _bfd_elf_mips_get_relocated_section_contents _ftext _etext __dso_displacement __elf_header __program_header_table _fdata _edata _end _fbss _bfd_mips_elf_relocate_section _bfd_mips_elf_create_dynamic_sections mips_elf_create_dynamic_relocation mips_elf_perform_relocation mips_elf_obtain_contents __GOTT_BASE__ __GOTT_INDEX__ .rela.plt.unloaded .rel.plt.unloaded .plt .tls_data .tls_vars > k 4 /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/bfd/elfcode.h warning: %s has a corrupt string table index - ignoring c c c c c c c %s: version count (%ld) does not match symbol count (%ld) g %s(%s): relocation %d has invalid symbol index %ld Warning: %B is truncated: expected core file size >= %lu, found: %lu. 4 ( H x 4 p \ $ bfd_elf32_write_relocs bfd_elf32_swap_symbol_out /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/bfd/elf.c .shstrtab %B: invalid string offset %u >= %lu for section `%s' %B symbol number %lu references nonexistent SHT_SYMTAB_SHNDX section (null) %B: Corrupt size field in group section header: 0x%lx %B: invalid SHT_GROUP entry %B: no group info for section %A %B: warning: sh_link not set for section `%A' %B: sh_link [%d] in section `%A' is incorrect %B: unknown [%d] section `%s' in group [%s] .gnu.linkonce %B: unable to initialize commpress status for section %s %B: unable to initialize decommpress status for section %s SHT_NULL SHT_PROGBITS SHT_SYMTAB SHT_STRTAB SHT_RELA SHT_HASH SHT_DYNAMIC SHT_NOTE SHT_NOBITS SHT_REL SHT_SHLIB SHT_DYNSYM & 1 9 C NULL LOAD DYNAMIC INTERP NOTE SHLIB PHDR TLS EH_FRAME STACK RELRO Program Header: 0x%lx %8s off 0x vaddr 0x paddr 0x align 2**%u filesz 0x memsz 0x flags %c%c%c %lx .dynamic Dynamic Section: NEEDED PLTRELSZ PLTGOT HASH STRTAB SYMTAB RELA RELASZ RELAENT STRSZ SYMENT INIT FINI SONAME RPATH SYMBOLIC REL RELSZ RELENT PLTREL DEBUG TEXTREL JMPREL BIND_NOW INIT_ARRAY FINI_ARRAY INIT_ARRAYSZ FINI_ARRAYSZ RUNPATH FLAGS PREINIT_ARRAY PREINIT_ARRAYSZ CHECKSUM PLTPADSZ MOVEENT MOVESZ FEATURE POSFLAG_1 SYMINSZ SYMINENT CONFIG DEPAUDIT AUDIT PLTPAD MOVETAB SYMINFO RELACOUNT RELCOUNT FLAGS_1 VERSYM VERDEF VERDEFNUM VERNEED VERNEEDNUM AUXILIARY USED FILTER GNU_HASH %-20s 0x Version definitions: %d 0x%2.2x 0x%8.8lx %s %s Version References: required from %s: 0x%8.8lx 0x%2.2x %2.2d %s elf (*none*) %s Base %-11s (%s) .internal .hidden .protected 0x%02x %s %B: invalid link %lu for reloc section %s (index %u) %B: don't know how to handle allocated, application specific section `%s' [0x%8x] %B: don't know how to handle processor specific section `%s' [0x%8x] %B: don't know how to handle OS specific section `%s' [0x%8x] %B: don't know how to handle section `%s' [0x%8x] .bss j .comment .data .data1 .debug .debug_line .debug_info .debug_abbrev .debug_aranges .dynstr .dynsym * J 9 A .fini .fini_array h n .gnu.linkonce.b .gnu.lto_ .got .gnu.version .gnu.version_d .gnu.version_r .gnu.liblist .gnu.conflict .gnu.hash o o o o - o .hash 0 .init .init_array .interp p v .line .note.GNU-stack .note P ` .preinit_array .plt .rodata .rodata1 .rela .rel ( 0 9 ? .strtab .symtab .stabstr .text .tbss .tdata x ~ .zdebug_line .zdebug_info .zdebug_abbrev .zdebug_aranges ) a %s%d%s b null load dynamic interp note shlib phdr eh_frame_hdr stack relro proc %s%s warning: section `%A' type changed to PROGBITS .symtab_shndx %B: sh_link of section `%A' points to discarded section `%A' of `%B' %B: sh_link of section `%A' points to removed section `%A' of `%B' .stab str .gnu.libstr LOPROC+%7.7x LOOS+%7.7x %8.8x %s: %B: The first section in the PT_DYNAMIC segment is not the .dynamic section %B: Not enough room for program headers, try linking with -N %B: section %A lma %#lx adjusted to %#lx %B: section `%A' can't be allocated in segment %d *unknown* %B: warning: allocated section `%s' not in segment %B: symbol `%s' required but not present %B: warning: Empty loadable segment detected, is this intentional ? Unable to find equivalent output section for symbol '%s' from section '%s' " " # # ,# %B: unsupported relocation type %s = (? (? (? > (? (? (? > (? (? (? (? (? (? (? > (? (? (? (? (? (? (? "> (? (? (? (? (? (? (? (? (? (? (? (? (? (? (? (? (? (? (? (? (? (? (? (? (? (? (? (? (? (? (? +> > +? +? +? +? +? > +? > +? +? +? +? +? +? +? +? +? > +? +? +? +? +? > +? +? +? +? +? +? +? +? +? +? +? +? +? +? +? +? +? +? +? +? +? +? +? +? +? +? +? +? +? +? +? > %s/%d .reg2 .reg-xfp .reg-xstate .reg-ppc-vmx .reg-ppc-vsx .reg-s390-high-gprs .reg-s390-timer .reg-s390-todcmp .reg-s390-todpreg .reg-s390-ctrs .reg-s390-prefix win32 .reg/%ld .reg .module/%08lx LINUX .auxv .note.netbsdcore.procinfo .wcookie .qnx_core_status/%ld .qnx_core_status %s/%ld .qnx_core_info CORE NetBSD-CORE OpenBSD QNX SPU/ GNU .rela.plt .rel.plt +0x @plt LARGE_COMMON _bfd_elf_no_info_to_howto _bfd_elf_get_lineno rewrite_elf_program_header assign_file_positions_for_non_load_sections get_program_header_size bfd_elf_set_group_contents debug gnu.linkonce.wi. line stab zdebug ? E V [ ` bfd_elf_get_elf_syms .got .rela.got .rel.got .got.plt _GLOBAL_OFFSET_TABLE_ .interp .gnu.version_d .gnu.version .gnu.version_r .dynsym .dynstr .dynamic _DYNAMIC .hash .gnu.hash .plt _PROCEDURE_LINKAGE_TABLE_ .rela.plt .rel.plt .dynbss .rela.bss .rel.bss /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/bfd/elflink.c /w v v w w w [w w %s: TLS definition in %B section %A mismatches non-TLS definition in %B section %A %s: TLS reference in %B mismatches non-TLS reference in %B %s: TLS definition in %B section %A mismatches non-TLS reference in %B %s: TLS reference in %B mismatches non-TLS definition in %B section %A %B: unexpected redefinition of indirect versioned symbol `%s' %B: version node not found for symbol %s %B: bad reloc symbol index (0x%lx >= 0x%lx) for offset 0x%lx in section `%A' %B: non-zero symbol index (0x%lx) for offset 0x%lx in section `%A' when the object file has no symbol table %B: relocation size mismatch in %B section %A warning: type and size of dynamic symbol `%s' are not defined %P: alternate ELF machine code found (%d) in %B, expecting %d .gnu.warning. .tcommon %B: %s: invalid version %u (max %d) %B: %s: invalid needed version %d Warning: alignment %u of common symbol `%s' in %B is greater than the alignment (%u) of its section %A Warning: alignment %u of symbol `%s' in %B is smaller than %u in %B Warning: size of symbol `%s' changed from %lu in %B to %lu in %B Warning: type of symbol `%s' changed from %d to %d in %B %B: undefined reference to symbol '%s' note: '%s' is defined in DSO %B so try adding it to the linker command line .stabstr .stab % C a @ .note.GNU-stack %s: undefined version: %s .preinit_array %B: .preinit_array section is not allowed in DSO .init_array .fini_array .end undefined %s reference in complex symbol: %s section symbol 0- << >> == != <= >= && || ~ ! * / % ^ | & + - < > unknown operator '%c' in complex symbol .rela.dyn .rel.dyn %B: Unable to sort relocs - they are in more than one size %B: Unable to sort relocs - they are of an unknown size Not enough memory to sort relocations %B: Too many sections: %d (>= %d) E E V %B: internal symbol `%s' in %B is referenced by DSO %B: hidden symbol `%s' in %B is referenced by DSO %B: local symbol `%s' in %B is referenced by DSO %B: could not find output section %A for input section %A %B: protected symbol `%s' isn't defined %B: internal symbol `%s' isn't defined %B: hidden symbol `%s' isn't defined 4 P P c c 8 .eh_frame .gcc_except_table %016llx error: %B contains a reloc (0x%s) for section %A that references a non-existent global symbol %X`%s' referenced in section `%A' of %B: defined in discarded section `%A' of %B %B: warning: sh_link not set for section `%A' %A has both ordered [`%A' in %B] and unordered [`%A' in %B] sections %A has both ordered and unordered sections .gnu.attributes ELFCLASS32 ELFCLASS64 %B: file class %s incompatible with %s %B: could not find output section %s warning: %s section has zero size %P: warning: creating a DT_TEXTREL in a shared object. %P%X: can not read symbols: %E __start_ __stop_ " ] ] D D O Removing unused section '%s' in file '%B' Warning: gc-sections option ignored %B: %A+%lu: No symbol found for INHERIT .gnu.linkonce. %B: ignoring duplicate section `%A' %B: duplicate section `%A' has different size %B: warning: could not read contents of section `%A' %B: warning: duplicate section `%A' has different contents .gnu.linkonce.r. .gnu.linkonce.t. %F%P: already_linked_table: %E .rela .rel %s%s _bfd_elf_section_already_linked elf_reloc_link_order elf_link_input_bfd elf_link_output_extsym elf_link_check_versioned_symbol elf_link_adjust_relocs get_value put_value bfd_elf_size_dynsym_hash_dynstr elf_link_add_object_symbols bfd_elf_record_link_assignment gnu /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/bfd/elf-attrs.c error: %B: Object has vendor-specific contents that must be processed by the '%s' toolchain error: %B: Object tag '%d, %s' is incompatible with tag '%d, %s' _bfd_elf_parse_attributes _bfd_elf_obj_attrs_arg_type _bfd_elf_copy_obj_attributes bfd_elf_set_obj_attr_contents /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/bfd/elf-strtab.c /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/bfd/elf-eh-frame.c eh E -F TF xF F 6E E E E 6E E E 6E E E sE E 6E 6E E 6E 6E E F F F F F F F F F F F F F F F F F F F F F F E E 6E F F F F F F F F F F F F F F F F E F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F E F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F E %P: error in %B(%A); no .eh_frame_hdr table will be created. %P: fde encoding in %B(%A) prevents .eh_frame_hdr table being created. .eh_frame %P: DW_EH_PE_datarel unspecified for this architecture. _bfd_elf_write_section_eh_frame ` y .line .debug .text .data .bss .sdata .sbss .rdata .rodata .init .fini .rconst %s %lx %lx /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/bfd/ecofflink.c @stabs %s%s %s: warning: %s: line number overflow: 0x%lx > 0xffff %s: %s: reloc overflow: 0x%lx > 0xffff IGNORE REFHALF REFWORD JMPADDR REFHI REFLO GPREL LITERAL PCREL16 t R " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/bfd/coff-mips.c _gp GP relative relocation when _gp not defined .text .rdata .data .sdata .sbss .bss .init .lit8 .lit4 .fini GP relative relocation used when GP not defined ! ! @ ! ! { ! ! ! ! ! ! ! ( c __________ c c c c c c c J l 8 ( * X * ( ?, c ? \ x p ` 4 H c ! E x { b / ) & ^ ecoff-littlemips $ 7 m [ V W m [ V W t <( ~ (q ) <` f\ E ~ & S s C iC 9 O O O 9[ } Z [ ]_ l _ + b l , 1 J J J J J ecoff-bigmips 7 } } t <( ~ (q ) <` f\ E ~ & S s C iC 9 O O O 9[ } Z [ ]_ l _ + b l , 1 J J J J J @ ecoff-biglittlemips 7 m [ V W } t <( ~ (q ) <` f\ E ~ & S s C iC 9 O O O 9[ } Z [ ]_ l _ + b l , 1 J J J J J mips_relocate_section mips_adjust_reloc_in *DEBUG* i* * i* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * I* * I* Y* * * Y* * * * * * * * * * * * * * * * * * * * * * * * * * I* * * y* /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/bfd/ecoff.c .comment .text .data .bss .sdata .sbss .rdata .scommon .init .fini .rconst ; ; ; )< i< x< < < < < < < < < = @= = = = J> J> Y> > > > > > ? %s %s { ifd = %u, index = %lu } -1 (no type) nil address char unsigned char short unsigned short int unsigned int long unsigned long float double struct union enum typedef subrange set complex double complex forward/unamed typedef fixed decimal float decimal string bit picture void Unknown basic type %d : %d ptr to volatile far func. ret. array [ %ld:%ld {%ld bits} %ld {%ld bits} {%ld bits} ] of G %G / yN R 0 1 yN e 2 yN { 3 yN R_MIPS_HIGHER R_MIPS_HIGHEST yN yN , yN 6 yN @ yN M yN W yN c o p ~ yN yN yN F yN @ yN yN yN yN yN yN ) @ yN 9 yN D yN T yN d yN yN yN r yN yN ! yN " # $ yN % yN & yN ' yN ( ) * yN + yN , yN - yN ' . yN > / yN R 0 1 yN e 2 yN { 3 yN R_MIPS16_26 R_MIPS16_GPREL R_MIPS16_GOT16 R_MIPS16_CALL16 R_MIPS16_HI16 R_MIPS16_LO16 d yN P e y \ f K k g yN z h nJ i 3L d yN P e y \ f K k g yN z h nJ i 3L R_MIPS_GNU_VTINHERIT R_MIPS_GNU_VTENTRY ? R_MIPS_GNU_REL16_S2 yN \ yN \ R_MIPS_COPY ~ F R_MIPS_JUMP_SLOT F \ _gp GP relative relocation when _gp not defined literal relocation occurs for an external symbol 32bits gp relative relocation occurs for an external symbol F ? C D ! $ % & ' ( ) * + , - . / 0 1 2 /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/bfd/elfn32-mips.c .reg p ` 4 H i ' K x h " " elf32-nbigmips ? / } } 5 v) ~ ) i? _" )G b # ` ' \ B V ~ j w & S s &' ( $6 5Y n6 6 7 - 3; F( W( (7 ; 7 7 + 7 : l + 1 ' 2) e ) a* @ elf32-nlittlemips ? / m [ V W m [ V W 5 v) ~ ) i? _" )G b # ` ' \ B V ~ j w & S s &' ( $6 5Y n6 6 7 - 3; F( W( (7 ; 7 7 + 7 : l + 1 ' 2) e ) a* @ @ elf32-ntradbigmips ? / } } 5 v) ~ ) i? _" )G b # ` ' \ B V ~ j w & S s &' ( $6 5Y n6 6 7 - 3; F( W( (7 ; 7 7 + 7 : l + 1 ' 2) e ) a* elf32-ntradlittlemips ? / m [ V W m [ V W 5 v) ~ ) i? _" )G b # ` ' \ B V ~ j w & S s &' ( $6 5Y n6 6 7 - 3; F( W( (7 ; 7 7 + 7 : l + 1 ' 2) e ) a* elf32-ntradbigmips-freebsd ? / } } 5 v) ~ ) i? _" )G b # ` ' \ B V ~ j w & S s &' ( $6 5Y n6 6 7 - 3; F( W( (7 ; 7 7 + 7 : l + 1 ' 2) e ) a* elf32-ntradlittlemips-freebsd p ? / m [ V W m [ V W 5 v) ~ ) i? _" )G b # ` ' \ B V ~ j w & S s &' ( $6 5Y n6 6 7 - 3; F( W( (7 ; 7 7 + 7 : l + 1 ' 2) e ) a* R_MIPS_NONE R_MIPS_16 R_MIPS_32 R_MIPS_REL32 R_MIPS_26 R_MIPS_HI16 R_MIPS_LO16 R_MIPS_GPREL16 R_MIPS_LITERAL R_MIPS_GOT16 R_MIPS_PC16 R_MIPS_CALL16 R_MIPS_GPREL32 R_MIPS_SHIFT5 R_MIPS_SHIFT6 R_MIPS_64 R_MIPS_GOT_DISP R_MIPS_GOT_PAGE R_MIPS_GOT_OFST R_MIPS_GOT_HI16 R_MIPS_GOT_LO16 R_MIPS_SUB R_MIPS_INSERT_A R_MIPS_INSERT_B R_MIPS_DELETE R_MIPS_CALL_HI16 R_MIPS_CALL_LO16 R_MIPS_SCN_DISP R_MIPS_REL16 R_MIPS_RELGOT R_MIPS_JALR R_MIPS_TLS_DTPMOD64 R_MIPS_TLS_DTPREL64 R_MIPS_TLS_GD R_MIPS_TLS_LDM R_MIPS_TLS_DTPREL_HI16 R_MIPS_TLS_DTPREL_LO16 R_MIPS_TLS_GOTTPREL R_MIPS_TLS_TPREL64 R_MIPS_TLS_TPREL_HI16 R_MIPS_TLS_TPREL_LO16 R_MIPS_GLOB_DAT yN ` yN l yN v yN yN nJ 3L K yN yN yN @ yN yN ) yN 9 yN I yN Y yN i @ yN y yN yN yN yN yN yN ! yN " # $ yN % yN & ' ( @ yN ) @ yN * yN 3 + yN A , yN P - yN g . yN ~ / 0 @ yN 1 yN 2 yN 3 yN R_MIPS_HIGHER R_MIPS_HIGHEST yN ` yN l yN v yN yN yN yN yN yN yN yN @ yN yN ) yN 9 yN I yN Y yN i @ yN y yN yN yN yN 0* yN >* yN yN yN ! yN " # $ yN % yN & ' ( @ yN ) @ yN * yN 3 + yN A , yN P - yN g . yN ~ / 0 @ yN 1 yN 2 yN 3 yN R_MIPS16_26 R_MIPS16_GPREL R_MIPS16_GOT16 R_MIPS16_CALL16 R_MIPS16_HI16 R_MIPS16_LO16 d yN 6 e 6 f K 6 g yN 6 h nJ 6 i 3L 6 d yN 6 e 6 f K 6 g yN 6 h nJ 6 i 3L 6 R_MIPS_GNU_VTINHERIT 9 R_MIPS_GNU_VTENTRY ? <: R_MIPS_GNU_REL16_S2 yN : yN : R_MIPS_COPY ~ F <; R_MIPS_JUMP_SLOT @ F ; /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/bfd/elf64-mips.c _gp GP relative relocation when _gp not defined literal relocation occurs for an external symbol 32bits gp relative relocation occurs for an external symbol F ? C D ! $ % & ' ( ) * + , - . / 0 1 2 .reg @ ` F r x C = ` " @8@ @ N O Q % . / ! R < = elf64-bigmips ? ? / } } = k v) ~ ) i? _" )G b # ` ' \ j j j j t w y & S s &' ( $6 5Y n6 6 7 - 3; (7 ; 7 7 + 7 : l + 1 ' 2) e A elf64-littlemips pA ? / m [ V W m [ V W = k v) ~ ) i? _" )G b # ` ' \ j j j j t w y & S s &' ( $6 5Y n6 6 7 - 3; (7 ; 7 7 + 7 : l + 1 ' 2) e ? elf64-tradbigmips PC ? / } } = k v) ~ ) i? _" )G b # ` ' \ j j j j t w y & S s &' ( $6 5Y n6 6 7 - 3; (7 ; 7 7 + 7 : l + 1 ' 2) e `E elf64-tradlittlemips 0E ? / m [ V W m [ V W = k v) ~ ) i? _" )G b # ` ' \ j j j j t w y & S s &' ( $6 5Y n6 6 7 - 3; (7 ; 7 7 + 7 : l + 1 ' 2) e C elf64-tradbigmips-freebsd G ? / } } = k v) ~ ) i? _" )G b # ` ' \ j j j j t w y & S s &' ( $6 5Y n6 6 7 - 3; (7 ; 7 7 + 7 : l + 1 ' 2) e I ` elf64-tradlittlemips-freebsd H ? / m [ V W m [ V W = k v) ~ ) i? _" )G b # ` ' \ j j j j t w y & S s &' ( $6 5Y n6 6 7 - 3; (7 ; 7 7 + 7 : l + 1 ' 2) e @G ` mips_elf64_slurp_one_reloc_table /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/bfd/elfcode.h warning: %s has a corrupt string table index - ignoring YK YK F F YK YK F YK YK YK YK F YK YK YK YK YK YK F YK YK YK YK YK YK YK YK YK YK YK YK YK YK YK YK YK YK YK YK YK YK YK YK F YK YK YK YK YK YK YK YK YK YK YK YK YK YK YK YK YK YK F %s: version count (%ld) does not match symbol count (%ld) tX X W W W X X tX 3X IX _X %s(%s): relocation %d has invalid symbol index %ld Warning: %B is truncated: expected core file size >= %lu, found: %lu. @8@ @ N O Q K . / \ R < = /; ; ; >< bfd_elf64_write_relocs bfd_elf64_swap_symbol_out UNKNOWN N %B: Relocations in generic ELF (EM: %d) elf64-big N ? / } } = k v) ~ ) i? t )G # ` H j j j j w & S s &' ( $6 5Y n6 6 7 8 3; |; F( W( (7 < ; s 7 J + 7 : l + 1 ' 2) e ) a* P elf64-little pP ? / m [ V W m [ V W = k v) ~ ) i? t )G # ` H j j j j w & S s &' ( $6 5Y n6 6 7 8 3; |; F( W( (7 < ; s 7 J + 7 : l + 1 ' 2) e ) a* N UNKNOWN @R %B: Relocations in generic ELF (EM: %d) elf32-big R ? / } } 5 v) ~ ) i? t )G # ` H B V ~ j w & S s &' ( $6 5Y n6 6 7 8 3; |; F( W( (7 < ; \t 7 J + 7 : l + 1 ' 2) e ) a* T elf32-little T ? / m [ V W m [ V W 5 v) ~ ) i? t )G # ` H B V ~ j w & S s &' ( $6 5Y n6 6 7 8 3; |; F( W( (7 < ; \t 7 J + 7 : l + 1 ' 2) e ) a* R mips mips:3000 mips:3900 mips:4000 mips:4010 mips:4100 mips:4111 mips:4120 mips:4300 mips:4400 mips:4600 mips:4650 mips:5000 mips:5400 mips:5500 mips:6000 mips:7000 mips:8000 mips:9000 mips:10000 mips:12000 mips:14000 mips:16000 mips:16 mips:mips5 mips:isa32 mips:isa32r2 mips:isa64 mips:isa64r2 mips:sb1 mips:loongson_2e mips:loongson_2f mips:loongson_3a mips:octeon mips:xlr `V eV t G X < `V oV t G @X @ @ `V yV t G pX @ @ `V V t G X @ @ `V V t G X @ @ `V V t G Y @ @ `V V t G 0Y @ @ `V V t G `Y @ @ 0 `V V t G Y @ @ `V V t G Y @ @ * `V V t G Y @ @ `V V t G Z @ @ `V V t G PZ @ @ | `V V t G Z p `V V t G Z @ @ X `V V t G Z @ @ @ `V W t G [ @ @ (# `V W t G @[ @ @ ' `V W t G p[ @ @ . `V $W t G [ @ @ 6 `V /W t G [ @ @ > `V :W t G \ @ @ `V EW t G 0\ @ @ `V MW t G `\ `V XW t G \ ! `V cW t G \ @ @ @ `V pW t G \ @ @ A `V {W t G ] @ @ `V W t G P] @ @ `V W t G ] @ @ `V W t G ] @ @ `V W t G ] @ @ e `V W t G ^ @ @ `V W t G `V `V t G W / /SYM64/ /SYM64/ %-10ld %ld %-7lo ` ! ! ! __.SYMDEF __.SYMDEF/ / /SYM64/ #1/20 __.SYMDEF SORTED __.SYMDEF ARFILENAMES/ // ../ ARFILENAMES/ // %-ld: %-ld #1/%lu /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/bfd/archive.c %-10ld %-12ld %ld %-8lo Warning: writing archive was slow: rewriting timestamp Reading archive file mod timestamp Writing updated armap timestamp %-7lo bfd_dont_truncate_arname /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/bfd/bfdio.c ` n < @@uninitialized@@ BFD_RELOC_64 BFD_RELOC_32 BFD_RELOC_26 BFD_RELOC_24 BFD_RELOC_16 BFD_RELOC_14 BFD_RELOC_8 BFD_RELOC_64_PCREL BFD_RELOC_32_PCREL BFD_RELOC_24_PCREL BFD_RELOC_16_PCREL BFD_RELOC_12_PCREL BFD_RELOC_8_PCREL BFD_RELOC_32_SECREL BFD_RELOC_32_GOT_PCREL BFD_RELOC_16_GOT_PCREL BFD_RELOC_8_GOT_PCREL BFD_RELOC_32_GOTOFF BFD_RELOC_16_GOTOFF BFD_RELOC_LO16_GOTOFF BFD_RELOC_HI16_GOTOFF BFD_RELOC_HI16_S_GOTOFF BFD_RELOC_8_GOTOFF BFD_RELOC_64_PLT_PCREL BFD_RELOC_32_PLT_PCREL BFD_RELOC_24_PLT_PCREL BFD_RELOC_16_PLT_PCREL BFD_RELOC_8_PLT_PCREL BFD_RELOC_64_PLTOFF BFD_RELOC_32_PLTOFF BFD_RELOC_16_PLTOFF BFD_RELOC_LO16_PLTOFF BFD_RELOC_HI16_PLTOFF BFD_RELOC_HI16_S_PLTOFF BFD_RELOC_8_PLTOFF BFD_RELOC_68K_GLOB_DAT BFD_RELOC_68K_JMP_SLOT BFD_RELOC_68K_RELATIVE BFD_RELOC_68K_TLS_GD32 BFD_RELOC_68K_TLS_GD16 BFD_RELOC_68K_TLS_GD8 BFD_RELOC_68K_TLS_LDM32 BFD_RELOC_68K_TLS_LDM16 BFD_RELOC_68K_TLS_LDM8 BFD_RELOC_68K_TLS_LDO32 BFD_RELOC_68K_TLS_LDO16 BFD_RELOC_68K_TLS_LDO8 BFD_RELOC_68K_TLS_IE32 BFD_RELOC_68K_TLS_IE16 BFD_RELOC_68K_TLS_IE8 BFD_RELOC_68K_TLS_LE32 BFD_RELOC_68K_TLS_LE16 BFD_RELOC_68K_TLS_LE8 BFD_RELOC_32_BASEREL BFD_RELOC_16_BASEREL BFD_RELOC_LO16_BASEREL BFD_RELOC_HI16_BASEREL BFD_RELOC_HI16_S_BASEREL BFD_RELOC_8_BASEREL BFD_RELOC_RVA BFD_RELOC_8_FFnn BFD_RELOC_32_PCREL_S2 BFD_RELOC_16_PCREL_S2 BFD_RELOC_23_PCREL_S2 BFD_RELOC_HI22 BFD_RELOC_LO10 BFD_RELOC_GPREL16 BFD_RELOC_GPREL32 BFD_RELOC_I960_CALLJ BFD_RELOC_NONE BFD_RELOC_SPARC_WDISP22 BFD_RELOC_SPARC22 BFD_RELOC_SPARC13 BFD_RELOC_SPARC_GOT10 BFD_RELOC_SPARC_GOT13 BFD_RELOC_SPARC_GOT22 BFD_RELOC_SPARC_PC10 BFD_RELOC_SPARC_PC22 BFD_RELOC_SPARC_WPLT30 BFD_RELOC_SPARC_COPY BFD_RELOC_SPARC_GLOB_DAT BFD_RELOC_SPARC_JMP_SLOT BFD_RELOC_SPARC_RELATIVE BFD_RELOC_SPARC_UA16 BFD_RELOC_SPARC_UA32 BFD_RELOC_SPARC_UA64 BFD_RELOC_SPARC_GOTDATA_HIX22 BFD_RELOC_SPARC_GOTDATA_LOX10 BFD_RELOC_SPARC_GOTDATA_OP_HIX22 BFD_RELOC_SPARC_GOTDATA_OP_LOX10 BFD_RELOC_SPARC_GOTDATA_OP BFD_RELOC_SPARC_JMP_IREL BFD_RELOC_SPARC_IRELATIVE BFD_RELOC_SPARC_BASE13 BFD_RELOC_SPARC_BASE22 BFD_RELOC_SPARC_10 BFD_RELOC_SPARC_11 BFD_RELOC_SPARC_OLO10 BFD_RELOC_SPARC_HH22 BFD_RELOC_SPARC_HM10 BFD_RELOC_SPARC_LM22 BFD_RELOC_SPARC_PC_HH22 BFD_RELOC_SPARC_PC_HM10 BFD_RELOC_SPARC_PC_LM22 BFD_RELOC_SPARC_WDISP16 BFD_RELOC_SPARC_WDISP19 BFD_RELOC_SPARC_7 BFD_RELOC_SPARC_6 BFD_RELOC_SPARC_5 BFD_RELOC_SPARC_PLT32 BFD_RELOC_SPARC_PLT64 BFD_RELOC_SPARC_HIX22 BFD_RELOC_SPARC_LOX10 BFD_RELOC_SPARC_H44 BFD_RELOC_SPARC_M44 BFD_RELOC_SPARC_L44 BFD_RELOC_SPARC_REGISTER BFD_RELOC_SPARC_REV32 BFD_RELOC_SPARC_TLS_GD_HI22 BFD_RELOC_SPARC_TLS_GD_LO10 BFD_RELOC_SPARC_TLS_GD_ADD BFD_RELOC_SPARC_TLS_GD_CALL BFD_RELOC_SPARC_TLS_LDM_HI22 BFD_RELOC_SPARC_TLS_LDM_LO10 BFD_RELOC_SPARC_TLS_LDM_ADD BFD_RELOC_SPARC_TLS_LDM_CALL BFD_RELOC_SPARC_TLS_LDO_HIX22 BFD_RELOC_SPARC_TLS_LDO_LOX10 BFD_RELOC_SPARC_TLS_LDO_ADD BFD_RELOC_SPARC_TLS_IE_HI22 BFD_RELOC_SPARC_TLS_IE_LO10 BFD_RELOC_SPARC_TLS_IE_LD BFD_RELOC_SPARC_TLS_IE_LDX BFD_RELOC_SPARC_TLS_IE_ADD BFD_RELOC_SPARC_TLS_LE_HIX22 BFD_RELOC_SPARC_TLS_LE_LOX10 BFD_RELOC_SPARC_TLS_DTPMOD32 BFD_RELOC_SPARC_TLS_DTPMOD64 BFD_RELOC_SPARC_TLS_DTPOFF32 BFD_RELOC_SPARC_TLS_DTPOFF64 BFD_RELOC_SPARC_TLS_TPOFF32 BFD_RELOC_SPARC_TLS_TPOFF64 BFD_RELOC_SPU_IMM7 BFD_RELOC_SPU_IMM8 BFD_RELOC_SPU_IMM10 BFD_RELOC_SPU_IMM10W BFD_RELOC_SPU_IMM16 BFD_RELOC_SPU_IMM16W BFD_RELOC_SPU_IMM18 BFD_RELOC_SPU_PCREL9a BFD_RELOC_SPU_PCREL9b BFD_RELOC_SPU_PCREL16 BFD_RELOC_SPU_LO16 BFD_RELOC_SPU_HI16 BFD_RELOC_SPU_PPU32 BFD_RELOC_SPU_PPU64 BFD_RELOC_SPU_ADD_PIC BFD_RELOC_ALPHA_GPDISP_HI16 BFD_RELOC_ALPHA_GPDISP_LO16 BFD_RELOC_ALPHA_GPDISP BFD_RELOC_ALPHA_LITERAL BFD_RELOC_ALPHA_ELF_LITERAL BFD_RELOC_ALPHA_LITUSE BFD_RELOC_ALPHA_HINT BFD_RELOC_ALPHA_LINKAGE BFD_RELOC_ALPHA_CODEADDR BFD_RELOC_ALPHA_GPREL_HI16 BFD_RELOC_ALPHA_GPREL_LO16 BFD_RELOC_ALPHA_BRSGP BFD_RELOC_ALPHA_NOP BFD_RELOC_ALPHA_BSR BFD_RELOC_ALPHA_LDA BFD_RELOC_ALPHA_BOH BFD_RELOC_ALPHA_TLSGD BFD_RELOC_ALPHA_TLSLDM BFD_RELOC_ALPHA_DTPMOD64 BFD_RELOC_ALPHA_GOTDTPREL16 BFD_RELOC_ALPHA_DTPREL64 BFD_RELOC_ALPHA_DTPREL_HI16 BFD_RELOC_ALPHA_DTPREL_LO16 BFD_RELOC_ALPHA_DTPREL16 BFD_RELOC_ALPHA_GOTTPREL16 BFD_RELOC_ALPHA_TPREL64 BFD_RELOC_ALPHA_TPREL_HI16 BFD_RELOC_ALPHA_TPREL_LO16 BFD_RELOC_ALPHA_TPREL16 BFD_RELOC_MIPS_JMP BFD_RELOC_MIPS16_JMP BFD_RELOC_MIPS16_GPREL BFD_RELOC_HI16 BFD_RELOC_HI16_S BFD_RELOC_LO16 BFD_RELOC_HI16_PCREL BFD_RELOC_HI16_S_PCREL BFD_RELOC_LO16_PCREL BFD_RELOC_MIPS16_GOT16 BFD_RELOC_MIPS16_CALL16 BFD_RELOC_MIPS16_HI16 BFD_RELOC_MIPS16_HI16_S BFD_RELOC_MIPS16_LO16 BFD_RELOC_MIPS_LITERAL BFD_RELOC_MIPS_GOT16 BFD_RELOC_MIPS_CALL16 BFD_RELOC_MIPS_GOT_HI16 BFD_RELOC_MIPS_GOT_LO16 BFD_RELOC_MIPS_CALL_HI16 BFD_RELOC_MIPS_CALL_LO16 BFD_RELOC_MIPS_SUB BFD_RELOC_MIPS_GOT_PAGE BFD_RELOC_MIPS_GOT_OFST BFD_RELOC_MIPS_GOT_DISP BFD_RELOC_MIPS_SHIFT5 BFD_RELOC_MIPS_SHIFT6 BFD_RELOC_MIPS_INSERT_A BFD_RELOC_MIPS_INSERT_B BFD_RELOC_MIPS_DELETE BFD_RELOC_MIPS_HIGHEST BFD_RELOC_MIPS_HIGHER BFD_RELOC_MIPS_SCN_DISP BFD_RELOC_MIPS_REL16 BFD_RELOC_MIPS_RELGOT BFD_RELOC_MIPS_JALR BFD_RELOC_MIPS_TLS_DTPMOD32 BFD_RELOC_MIPS_TLS_DTPREL32 BFD_RELOC_MIPS_TLS_DTPMOD64 BFD_RELOC_MIPS_TLS_DTPREL64 BFD_RELOC_MIPS_TLS_GD BFD_RELOC_MIPS_TLS_LDM BFD_RELOC_MIPS_TLS_DTPREL_HI16 BFD_RELOC_MIPS_TLS_DTPREL_LO16 BFD_RELOC_MIPS_TLS_GOTTPREL BFD_RELOC_MIPS_TLS_TPREL32 BFD_RELOC_MIPS_TLS_TPREL64 BFD_RELOC_MIPS_TLS_TPREL_HI16 BFD_RELOC_MIPS_TLS_TPREL_LO16 BFD_RELOC_MIPS_COPY BFD_RELOC_MIPS_JUMP_SLOT BFD_RELOC_MOXIE_10_PCREL BFD_RELOC_FRV_LABEL16 BFD_RELOC_FRV_LABEL24 BFD_RELOC_FRV_LO16 BFD_RELOC_FRV_HI16 BFD_RELOC_FRV_GPREL12 BFD_RELOC_FRV_GPRELU12 BFD_RELOC_FRV_GPREL32 BFD_RELOC_FRV_GPRELHI BFD_RELOC_FRV_GPRELLO BFD_RELOC_FRV_GOT12 BFD_RELOC_FRV_GOTHI BFD_RELOC_FRV_GOTLO BFD_RELOC_FRV_FUNCDESC BFD_RELOC_FRV_FUNCDESC_GOT12 BFD_RELOC_FRV_FUNCDESC_GOTHI BFD_RELOC_FRV_FUNCDESC_GOTLO BFD_RELOC_FRV_FUNCDESC_VALUE BFD_RELOC_FRV_FUNCDESC_GOTOFF12 BFD_RELOC_FRV_FUNCDESC_GOTOFFHI BFD_RELOC_FRV_FUNCDESC_GOTOFFLO BFD_RELOC_FRV_GOTOFF12 BFD_RELOC_FRV_GOTOFFHI BFD_RELOC_FRV_GOTOFFLO BFD_RELOC_FRV_GETTLSOFF BFD_RELOC_FRV_TLSDESC_VALUE BFD_RELOC_FRV_GOTTLSDESC12 BFD_RELOC_FRV_GOTTLSDESCHI BFD_RELOC_FRV_GOTTLSDESCLO BFD_RELOC_FRV_TLSMOFF12 BFD_RELOC_FRV_TLSMOFFHI BFD_RELOC_FRV_TLSMOFFLO BFD_RELOC_FRV_GOTTLSOFF12 BFD_RELOC_FRV_GOTTLSOFFHI BFD_RELOC_FRV_GOTTLSOFFLO BFD_RELOC_FRV_TLSOFF BFD_RELOC_FRV_TLSDESC_RELAX BFD_RELOC_FRV_GETTLSOFF_RELAX BFD_RELOC_FRV_TLSOFF_RELAX BFD_RELOC_FRV_TLSMOFF BFD_RELOC_MN10300_GOTOFF24 BFD_RELOC_MN10300_GOT32 BFD_RELOC_MN10300_GOT24 BFD_RELOC_MN10300_GOT16 BFD_RELOC_MN10300_COPY BFD_RELOC_MN10300_GLOB_DAT BFD_RELOC_MN10300_JMP_SLOT BFD_RELOC_MN10300_RELATIVE BFD_RELOC_MN10300_SYM_DIFF BFD_RELOC_MN10300_ALIGN BFD_RELOC_386_GOT32 BFD_RELOC_386_PLT32 BFD_RELOC_386_COPY BFD_RELOC_386_GLOB_DAT BFD_RELOC_386_JUMP_SLOT BFD_RELOC_386_RELATIVE BFD_RELOC_386_GOTOFF BFD_RELOC_386_GOTPC BFD_RELOC_386_TLS_TPOFF BFD_RELOC_386_TLS_IE BFD_RELOC_386_TLS_GOTIE BFD_RELOC_386_TLS_LE BFD_RELOC_386_TLS_GD BFD_RELOC_386_TLS_LDM BFD_RELOC_386_TLS_LDO_32 BFD_RELOC_386_TLS_IE_32 BFD_RELOC_386_TLS_LE_32 BFD_RELOC_386_TLS_DTPMOD32 BFD_RELOC_386_TLS_DTPOFF32 BFD_RELOC_386_TLS_TPOFF32 BFD_RELOC_386_TLS_GOTDESC BFD_RELOC_386_TLS_DESC_CALL BFD_RELOC_386_TLS_DESC BFD_RELOC_386_IRELATIVE BFD_RELOC_X86_64_GOT32 BFD_RELOC_X86_64_PLT32 BFD_RELOC_X86_64_COPY BFD_RELOC_X86_64_GLOB_DAT BFD_RELOC_X86_64_JUMP_SLOT BFD_RELOC_X86_64_RELATIVE BFD_RELOC_X86_64_GOTPCREL BFD_RELOC_X86_64_32S BFD_RELOC_X86_64_DTPMOD64 BFD_RELOC_X86_64_DTPOFF64 BFD_RELOC_X86_64_TPOFF64 BFD_RELOC_X86_64_TLSGD BFD_RELOC_X86_64_TLSLD BFD_RELOC_X86_64_DTPOFF32 BFD_RELOC_X86_64_GOTTPOFF BFD_RELOC_X86_64_TPOFF32 BFD_RELOC_X86_64_GOTOFF64 BFD_RELOC_X86_64_GOTPC32 BFD_RELOC_X86_64_GOT64 BFD_RELOC_X86_64_GOTPCREL64 BFD_RELOC_X86_64_GOTPC64 BFD_RELOC_X86_64_GOTPLT64 BFD_RELOC_X86_64_PLTOFF64 BFD_RELOC_X86_64_GOTPC32_TLSDESC BFD_RELOC_X86_64_TLSDESC_CALL BFD_RELOC_X86_64_TLSDESC BFD_RELOC_X86_64_IRELATIVE BFD_RELOC_NS32K_IMM_8 BFD_RELOC_NS32K_IMM_16 BFD_RELOC_NS32K_IMM_32 BFD_RELOC_NS32K_IMM_8_PCREL BFD_RELOC_NS32K_IMM_16_PCREL BFD_RELOC_NS32K_IMM_32_PCREL BFD_RELOC_NS32K_DISP_8 BFD_RELOC_NS32K_DISP_16 BFD_RELOC_NS32K_DISP_32 BFD_RELOC_NS32K_DISP_8_PCREL BFD_RELOC_NS32K_DISP_16_PCREL BFD_RELOC_NS32K_DISP_32_PCREL BFD_RELOC_PDP11_DISP_8_PCREL BFD_RELOC_PDP11_DISP_6_PCREL BFD_RELOC_PJ_CODE_HI16 BFD_RELOC_PJ_CODE_LO16 BFD_RELOC_PJ_CODE_DIR16 BFD_RELOC_PJ_CODE_DIR32 BFD_RELOC_PJ_CODE_REL16 BFD_RELOC_PJ_CODE_REL32 BFD_RELOC_PPC_B26 BFD_RELOC_PPC_BA26 BFD_RELOC_PPC_TOC16 BFD_RELOC_PPC_B16 BFD_RELOC_PPC_B16_BRTAKEN BFD_RELOC_PPC_B16_BRNTAKEN BFD_RELOC_PPC_BA16 BFD_RELOC_PPC_BA16_BRTAKEN BFD_RELOC_PPC_BA16_BRNTAKEN BFD_RELOC_PPC_COPY BFD_RELOC_PPC_GLOB_DAT BFD_RELOC_PPC_JMP_SLOT BFD_RELOC_PPC_RELATIVE BFD_RELOC_PPC_LOCAL24PC BFD_RELOC_PPC_EMB_NADDR32 BFD_RELOC_PPC_EMB_NADDR16 BFD_RELOC_PPC_EMB_NADDR16_LO BFD_RELOC_PPC_EMB_NADDR16_HI BFD_RELOC_PPC_EMB_NADDR16_HA BFD_RELOC_PPC_EMB_SDAI16 BFD_RELOC_PPC_EMB_SDA2I16 BFD_RELOC_PPC_EMB_SDA2REL BFD_RELOC_PPC_EMB_SDA21 BFD_RELOC_PPC_EMB_MRKREF BFD_RELOC_PPC_EMB_RELSEC16 BFD_RELOC_PPC_EMB_RELST_LO BFD_RELOC_PPC_EMB_RELST_HI BFD_RELOC_PPC_EMB_RELST_HA BFD_RELOC_PPC_EMB_BIT_FLD BFD_RELOC_PPC_EMB_RELSDA BFD_RELOC_PPC64_HIGHER BFD_RELOC_PPC64_HIGHER_S BFD_RELOC_PPC64_HIGHEST BFD_RELOC_PPC64_HIGHEST_S BFD_RELOC_PPC64_TOC16_LO BFD_RELOC_PPC64_TOC16_HI BFD_RELOC_PPC64_TOC16_HA BFD_RELOC_PPC64_TOC BFD_RELOC_PPC64_PLTGOT16 BFD_RELOC_PPC64_PLTGOT16_LO BFD_RELOC_PPC64_PLTGOT16_HI BFD_RELOC_PPC64_PLTGOT16_HA BFD_RELOC_PPC64_ADDR16_DS BFD_RELOC_PPC64_ADDR16_LO_DS BFD_RELOC_PPC64_GOT16_DS BFD_RELOC_PPC64_GOT16_LO_DS BFD_RELOC_PPC64_PLT16_LO_DS BFD_RELOC_PPC64_SECTOFF_DS BFD_RELOC_PPC64_SECTOFF_LO_DS BFD_RELOC_PPC64_TOC16_DS BFD_RELOC_PPC64_TOC16_LO_DS BFD_RELOC_PPC64_PLTGOT16_DS BFD_RELOC_PPC64_PLTGOT16_LO_DS BFD_RELOC_PPC_TLS BFD_RELOC_PPC_TLSGD BFD_RELOC_PPC_TLSLD BFD_RELOC_PPC_DTPMOD BFD_RELOC_PPC_TPREL16 BFD_RELOC_PPC_TPREL16_LO BFD_RELOC_PPC_TPREL16_HI BFD_RELOC_PPC_TPREL16_HA BFD_RELOC_PPC_TPREL BFD_RELOC_PPC_DTPREL16 BFD_RELOC_PPC_DTPREL16_LO BFD_RELOC_PPC_DTPREL16_HI BFD_RELOC_PPC_DTPREL16_HA BFD_RELOC_PPC_DTPREL BFD_RELOC_PPC_GOT_TLSGD16 BFD_RELOC_PPC_GOT_TLSGD16_LO BFD_RELOC_PPC_GOT_TLSGD16_HI BFD_RELOC_PPC_GOT_TLSGD16_HA BFD_RELOC_PPC_GOT_TLSLD16 BFD_RELOC_PPC_GOT_TLSLD16_LO BFD_RELOC_PPC_GOT_TLSLD16_HI BFD_RELOC_PPC_GOT_TLSLD16_HA BFD_RELOC_PPC_GOT_TPREL16 BFD_RELOC_PPC_GOT_TPREL16_LO BFD_RELOC_PPC_GOT_TPREL16_HI BFD_RELOC_PPC_GOT_TPREL16_HA BFD_RELOC_PPC_GOT_DTPREL16 BFD_RELOC_PPC_GOT_DTPREL16_LO BFD_RELOC_PPC_GOT_DTPREL16_HI BFD_RELOC_PPC_GOT_DTPREL16_HA BFD_RELOC_PPC64_TPREL16_DS BFD_RELOC_PPC64_TPREL16_LO_DS BFD_RELOC_PPC64_TPREL16_HIGHER BFD_RELOC_PPC64_TPREL16_HIGHERA BFD_RELOC_PPC64_TPREL16_HIGHEST BFD_RELOC_PPC64_TPREL16_HIGHESTA BFD_RELOC_PPC64_DTPREL16_DS BFD_RELOC_PPC64_DTPREL16_LO_DS BFD_RELOC_PPC64_DTPREL16_HIGHER BFD_RELOC_PPC64_DTPREL16_HIGHERA BFD_RELOC_PPC64_DTPREL16_HIGHEST BFD_RELOC_PPC64_DTPREL16_HIGHESTA BFD_RELOC_I370_D12 BFD_RELOC_CTOR BFD_RELOC_ARM_PCREL_BRANCH BFD_RELOC_ARM_PCREL_BLX BFD_RELOC_THUMB_PCREL_BLX BFD_RELOC_ARM_PCREL_CALL BFD_RELOC_ARM_PCREL_JUMP BFD_RELOC_THUMB_PCREL_BRANCH7 BFD_RELOC_THUMB_PCREL_BRANCH9 BFD_RELOC_THUMB_PCREL_BRANCH12 BFD_RELOC_THUMB_PCREL_BRANCH20 BFD_RELOC_THUMB_PCREL_BRANCH23 BFD_RELOC_THUMB_PCREL_BRANCH25 BFD_RELOC_ARM_OFFSET_IMM BFD_RELOC_ARM_THUMB_OFFSET BFD_RELOC_ARM_TARGET1 BFD_RELOC_ARM_ROSEGREL32 BFD_RELOC_ARM_SBREL32 BFD_RELOC_ARM_TARGET2 BFD_RELOC_ARM_PREL31 BFD_RELOC_ARM_MOVW BFD_RELOC_ARM_MOVT BFD_RELOC_ARM_MOVW_PCREL BFD_RELOC_ARM_MOVT_PCREL BFD_RELOC_ARM_THUMB_MOVW BFD_RELOC_ARM_THUMB_MOVT BFD_RELOC_ARM_THUMB_MOVW_PCREL BFD_RELOC_ARM_THUMB_MOVT_PCREL BFD_RELOC_ARM_JUMP_SLOT BFD_RELOC_ARM_GLOB_DAT BFD_RELOC_ARM_GOT32 BFD_RELOC_ARM_PLT32 BFD_RELOC_ARM_RELATIVE BFD_RELOC_ARM_GOTOFF BFD_RELOC_ARM_GOTPC BFD_RELOC_ARM_GOT_PREL BFD_RELOC_ARM_TLS_GD32 BFD_RELOC_ARM_TLS_LDO32 BFD_RELOC_ARM_TLS_LDM32 BFD_RELOC_ARM_TLS_DTPOFF32 BFD_RELOC_ARM_TLS_DTPMOD32 BFD_RELOC_ARM_TLS_TPOFF32 BFD_RELOC_ARM_TLS_IE32 BFD_RELOC_ARM_TLS_LE32 BFD_RELOC_ARM_TLS_GOTDESC BFD_RELOC_ARM_TLS_CALL BFD_RELOC_ARM_THM_TLS_CALL BFD_RELOC_ARM_TLS_DESCSEQ BFD_RELOC_ARM_THM_TLS_DESCSEQ BFD_RELOC_ARM_TLS_DESC BFD_RELOC_ARM_ALU_PC_G0_NC BFD_RELOC_ARM_ALU_PC_G0 BFD_RELOC_ARM_ALU_PC_G1_NC BFD_RELOC_ARM_ALU_PC_G1 BFD_RELOC_ARM_ALU_PC_G2 BFD_RELOC_ARM_LDR_PC_G0 BFD_RELOC_ARM_LDR_PC_G1 BFD_RELOC_ARM_LDR_PC_G2 BFD_RELOC_ARM_LDRS_PC_G0 BFD_RELOC_ARM_LDRS_PC_G1 BFD_RELOC_ARM_LDRS_PC_G2 BFD_RELOC_ARM_LDC_PC_G0 BFD_RELOC_ARM_LDC_PC_G1 BFD_RELOC_ARM_LDC_PC_G2 BFD_RELOC_ARM_ALU_SB_G0_NC BFD_RELOC_ARM_ALU_SB_G0 BFD_RELOC_ARM_ALU_SB_G1_NC BFD_RELOC_ARM_ALU_SB_G1 BFD_RELOC_ARM_ALU_SB_G2 BFD_RELOC_ARM_LDR_SB_G0 BFD_RELOC_ARM_LDR_SB_G1 BFD_RELOC_ARM_LDR_SB_G2 BFD_RELOC_ARM_LDRS_SB_G0 BFD_RELOC_ARM_LDRS_SB_G1 BFD_RELOC_ARM_LDRS_SB_G2 BFD_RELOC_ARM_LDC_SB_G0 BFD_RELOC_ARM_LDC_SB_G1 BFD_RELOC_ARM_LDC_SB_G2 BFD_RELOC_ARM_V4BX BFD_RELOC_ARM_IRELATIVE BFD_RELOC_ARM_IMMEDIATE BFD_RELOC_ARM_ADRL_IMMEDIATE BFD_RELOC_ARM_T32_IMMEDIATE BFD_RELOC_ARM_T32_ADD_IMM BFD_RELOC_ARM_T32_IMM12 BFD_RELOC_ARM_T32_ADD_PC12 BFD_RELOC_ARM_SHIFT_IMM BFD_RELOC_ARM_SMC BFD_RELOC_ARM_HVC BFD_RELOC_ARM_SWI BFD_RELOC_ARM_MULTI BFD_RELOC_ARM_CP_OFF_IMM BFD_RELOC_ARM_CP_OFF_IMM_S2 BFD_RELOC_ARM_T32_CP_OFF_IMM BFD_RELOC_ARM_T32_CP_OFF_IMM_S2 BFD_RELOC_ARM_ADR_IMM BFD_RELOC_ARM_LDR_IMM BFD_RELOC_ARM_LITERAL BFD_RELOC_ARM_IN_POOL BFD_RELOC_ARM_OFFSET_IMM8 BFD_RELOC_ARM_T32_OFFSET_U8 BFD_RELOC_ARM_T32_OFFSET_IMM BFD_RELOC_ARM_HWLITERAL BFD_RELOC_ARM_THUMB_ADD BFD_RELOC_ARM_THUMB_IMM BFD_RELOC_ARM_THUMB_SHIFT BFD_RELOC_SH_PCDISP8BY2 BFD_RELOC_SH_PCDISP12BY2 BFD_RELOC_SH_IMM3 BFD_RELOC_SH_IMM3U BFD_RELOC_SH_DISP12 BFD_RELOC_SH_DISP12BY2 BFD_RELOC_SH_DISP12BY4 BFD_RELOC_SH_DISP12BY8 BFD_RELOC_SH_DISP20 BFD_RELOC_SH_DISP20BY8 BFD_RELOC_SH_IMM4 BFD_RELOC_SH_IMM4BY2 BFD_RELOC_SH_IMM4BY4 BFD_RELOC_SH_IMM8 BFD_RELOC_SH_IMM8BY2 BFD_RELOC_SH_IMM8BY4 BFD_RELOC_SH_PCRELIMM8BY2 BFD_RELOC_SH_PCRELIMM8BY4 BFD_RELOC_SH_SWITCH16 BFD_RELOC_SH_SWITCH32 BFD_RELOC_SH_USES BFD_RELOC_SH_COUNT BFD_RELOC_SH_ALIGN BFD_RELOC_SH_CODE BFD_RELOC_SH_DATA BFD_RELOC_SH_LABEL BFD_RELOC_SH_LOOP_START BFD_RELOC_SH_LOOP_END BFD_RELOC_SH_COPY BFD_RELOC_SH_GLOB_DAT BFD_RELOC_SH_JMP_SLOT BFD_RELOC_SH_RELATIVE BFD_RELOC_SH_GOTPC BFD_RELOC_SH_GOT_LOW16 BFD_RELOC_SH_GOT_MEDLOW16 BFD_RELOC_SH_GOT_MEDHI16 BFD_RELOC_SH_GOT_HI16 BFD_RELOC_SH_GOTPLT_LOW16 BFD_RELOC_SH_GOTPLT_MEDLOW16 BFD_RELOC_SH_GOTPLT_MEDHI16 BFD_RELOC_SH_GOTPLT_HI16 BFD_RELOC_SH_PLT_LOW16 BFD_RELOC_SH_PLT_MEDLOW16 BFD_RELOC_SH_PLT_MEDHI16 BFD_RELOC_SH_PLT_HI16 BFD_RELOC_SH_GOTOFF_LOW16 BFD_RELOC_SH_GOTOFF_MEDLOW16 BFD_RELOC_SH_GOTOFF_MEDHI16 BFD_RELOC_SH_GOTOFF_HI16 BFD_RELOC_SH_GOTPC_LOW16 BFD_RELOC_SH_GOTPC_MEDLOW16 BFD_RELOC_SH_GOTPC_MEDHI16 BFD_RELOC_SH_GOTPC_HI16 BFD_RELOC_SH_COPY64 BFD_RELOC_SH_GLOB_DAT64 BFD_RELOC_SH_JMP_SLOT64 BFD_RELOC_SH_RELATIVE64 BFD_RELOC_SH_GOT10BY4 BFD_RELOC_SH_GOT10BY8 BFD_RELOC_SH_GOTPLT10BY4 BFD_RELOC_SH_GOTPLT10BY8 BFD_RELOC_SH_GOTPLT32 BFD_RELOC_SH_SHMEDIA_CODE BFD_RELOC_SH_IMMU5 BFD_RELOC_SH_IMMS6 BFD_RELOC_SH_IMMS6BY32 BFD_RELOC_SH_IMMU6 BFD_RELOC_SH_IMMS10 BFD_RELOC_SH_IMMS10BY2 BFD_RELOC_SH_IMMS10BY4 BFD_RELOC_SH_IMMS10BY8 BFD_RELOC_SH_IMMS16 BFD_RELOC_SH_IMMU16 BFD_RELOC_SH_IMM_LOW16 BFD_RELOC_SH_IMM_LOW16_PCREL BFD_RELOC_SH_IMM_MEDLOW16 BFD_RELOC_SH_IMM_MEDLOW16_PCREL BFD_RELOC_SH_IMM_MEDHI16 BFD_RELOC_SH_IMM_MEDHI16_PCREL BFD_RELOC_SH_IMM_HI16 BFD_RELOC_SH_IMM_HI16_PCREL BFD_RELOC_SH_PT_16 BFD_RELOC_SH_TLS_GD_32 BFD_RELOC_SH_TLS_LD_32 BFD_RELOC_SH_TLS_LDO_32 BFD_RELOC_SH_TLS_IE_32 BFD_RELOC_SH_TLS_LE_32 BFD_RELOC_SH_TLS_DTPMOD32 BFD_RELOC_SH_TLS_DTPOFF32 BFD_RELOC_SH_TLS_TPOFF32 BFD_RELOC_SH_GOT20 BFD_RELOC_SH_GOTOFF20 BFD_RELOC_SH_GOTFUNCDESC BFD_RELOC_SH_GOTFUNCDESC20 BFD_RELOC_SH_GOTOFFFUNCDESC BFD_RELOC_SH_GOTOFFFUNCDESC20 BFD_RELOC_SH_FUNCDESC BFD_RELOC_ARC_B22_PCREL BFD_RELOC_ARC_B26 BFD_RELOC_BFIN_16_IMM BFD_RELOC_BFIN_16_HIGH BFD_RELOC_BFIN_4_PCREL BFD_RELOC_BFIN_5_PCREL BFD_RELOC_BFIN_16_LOW BFD_RELOC_BFIN_10_PCREL BFD_RELOC_BFIN_11_PCREL BFD_RELOC_BFIN_12_PCREL_JUMP BFD_RELOC_BFIN_12_PCREL_JUMP_S BFD_RELOC_BFIN_24_PCREL_CALL_X BFD_RELOC_BFIN_24_PCREL_JUMP_L BFD_RELOC_BFIN_GOT17M4 BFD_RELOC_BFIN_GOTHI BFD_RELOC_BFIN_GOTLO BFD_RELOC_BFIN_FUNCDESC BFD_RELOC_BFIN_FUNCDESC_GOT17M4 BFD_RELOC_BFIN_FUNCDESC_GOTHI BFD_RELOC_BFIN_FUNCDESC_GOTLO BFD_RELOC_BFIN_FUNCDESC_VALUE BFD_RELOC_BFIN_FUNCDESC_GOTOFF17M4 BFD_RELOC_BFIN_FUNCDESC_GOTOFFHI BFD_RELOC_BFIN_FUNCDESC_GOTOFFLO BFD_RELOC_BFIN_GOTOFF17M4 BFD_RELOC_BFIN_GOTOFFHI BFD_RELOC_BFIN_GOTOFFLO BFD_RELOC_BFIN_GOT BFD_RELOC_BFIN_PLTPC BFD_ARELOC_BFIN_PUSH BFD_ARELOC_BFIN_CONST BFD_ARELOC_BFIN_ADD BFD_ARELOC_BFIN_SUB BFD_ARELOC_BFIN_MULT BFD_ARELOC_BFIN_DIV BFD_ARELOC_BFIN_MOD BFD_ARELOC_BFIN_LSHIFT BFD_ARELOC_BFIN_RSHIFT BFD_ARELOC_BFIN_AND BFD_ARELOC_BFIN_OR BFD_ARELOC_BFIN_XOR BFD_ARELOC_BFIN_LAND BFD_ARELOC_BFIN_LOR BFD_ARELOC_BFIN_LEN BFD_ARELOC_BFIN_NEG BFD_ARELOC_BFIN_COMP BFD_ARELOC_BFIN_PAGE BFD_ARELOC_BFIN_HWPAGE BFD_ARELOC_BFIN_ADDR BFD_RELOC_D10V_10_PCREL_R BFD_RELOC_D10V_10_PCREL_L BFD_RELOC_D10V_18 BFD_RELOC_D10V_18_PCREL BFD_RELOC_D30V_6 BFD_RELOC_D30V_9_PCREL BFD_RELOC_D30V_9_PCREL_R BFD_RELOC_D30V_15 BFD_RELOC_D30V_15_PCREL BFD_RELOC_D30V_15_PCREL_R BFD_RELOC_D30V_21 BFD_RELOC_D30V_21_PCREL BFD_RELOC_D30V_21_PCREL_R BFD_RELOC_D30V_32 BFD_RELOC_D30V_32_PCREL BFD_RELOC_DLX_HI16_S BFD_RELOC_DLX_LO16 BFD_RELOC_DLX_JMP26 BFD_RELOC_M32C_HI8 BFD_RELOC_M32C_RL_JUMP BFD_RELOC_M32C_RL_1ADDR BFD_RELOC_M32C_RL_2ADDR BFD_RELOC_M32R_24 BFD_RELOC_M32R_10_PCREL BFD_RELOC_M32R_18_PCREL BFD_RELOC_M32R_26_PCREL BFD_RELOC_M32R_HI16_ULO BFD_RELOC_M32R_HI16_SLO BFD_RELOC_M32R_LO16 BFD_RELOC_M32R_SDA16 BFD_RELOC_M32R_GOT24 BFD_RELOC_M32R_26_PLTREL BFD_RELOC_M32R_COPY BFD_RELOC_M32R_GLOB_DAT BFD_RELOC_M32R_JMP_SLOT BFD_RELOC_M32R_RELATIVE BFD_RELOC_M32R_GOTOFF BFD_RELOC_M32R_GOTOFF_HI_ULO BFD_RELOC_M32R_GOTOFF_HI_SLO BFD_RELOC_M32R_GOTOFF_LO BFD_RELOC_M32R_GOTPC24 BFD_RELOC_M32R_GOT16_HI_ULO BFD_RELOC_M32R_GOT16_HI_SLO BFD_RELOC_M32R_GOT16_LO BFD_RELOC_M32R_GOTPC_HI_ULO BFD_RELOC_M32R_GOTPC_HI_SLO BFD_RELOC_M32R_GOTPC_LO BFD_RELOC_V850_9_PCREL BFD_RELOC_V850_22_PCREL BFD_RELOC_V850_SDA_16_16_OFFSET BFD_RELOC_V850_SDA_15_16_OFFSET BFD_RELOC_V850_ZDA_16_16_OFFSET BFD_RELOC_V850_ZDA_15_16_OFFSET BFD_RELOC_V850_TDA_6_8_OFFSET BFD_RELOC_V850_TDA_7_8_OFFSET BFD_RELOC_V850_TDA_7_7_OFFSET BFD_RELOC_V850_TDA_16_16_OFFSET BFD_RELOC_V850_TDA_4_5_OFFSET BFD_RELOC_V850_TDA_4_4_OFFSET BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET BFD_RELOC_V850_CALLT_6_7_OFFSET BFD_RELOC_V850_CALLT_16_16_OFFSET BFD_RELOC_V850_LONGCALL BFD_RELOC_V850_LONGJUMP BFD_RELOC_V850_ALIGN BFD_RELOC_V850_LO16_SPLIT_OFFSET BFD_RELOC_V850_16_PCREL BFD_RELOC_V850_17_PCREL BFD_RELOC_V850_23 BFD_RELOC_V850_32_PCREL BFD_RELOC_V850_32_ABS BFD_RELOC_V850_16_SPLIT_OFFSET BFD_RELOC_V850_16_S1 BFD_RELOC_V850_LO16_S1 BFD_RELOC_V850_CALLT_15_16_OFFSET BFD_RELOC_V850_32_GOTPCREL BFD_RELOC_V850_16_GOT BFD_RELOC_V850_32_GOT BFD_RELOC_V850_22_PLT_PCREL BFD_RELOC_V850_32_PLT_PCREL BFD_RELOC_V850_COPY BFD_RELOC_V850_GLOB_DAT BFD_RELOC_V850_JMP_SLOT BFD_RELOC_V850_RELATIVE BFD_RELOC_V850_16_GOTOFF BFD_RELOC_V850_32_GOTOFF BFD_RELOC_V850_CODE BFD_RELOC_V850_DATA BFD_RELOC_MN10300_32_PCREL BFD_RELOC_MN10300_16_PCREL BFD_RELOC_TIC30_LDP BFD_RELOC_TIC54X_PARTLS7 BFD_RELOC_TIC54X_PARTMS9 BFD_RELOC_TIC54X_23 BFD_RELOC_TIC54X_16_OF_23 BFD_RELOC_TIC54X_MS7_OF_23 BFD_RELOC_C6000_PCR_S21 BFD_RELOC_C6000_PCR_S12 BFD_RELOC_C6000_PCR_S10 BFD_RELOC_C6000_PCR_S7 BFD_RELOC_C6000_ABS_S16 BFD_RELOC_C6000_ABS_L16 BFD_RELOC_C6000_ABS_H16 BFD_RELOC_C6000_SBR_U15_B BFD_RELOC_C6000_SBR_U15_H BFD_RELOC_C6000_SBR_U15_W BFD_RELOC_C6000_SBR_S16 BFD_RELOC_C6000_SBR_L16_B BFD_RELOC_C6000_SBR_L16_H BFD_RELOC_C6000_SBR_L16_W BFD_RELOC_C6000_SBR_H16_B BFD_RELOC_C6000_SBR_H16_H BFD_RELOC_C6000_SBR_H16_W BFD_RELOC_C6000_SBR_GOT_U15_W BFD_RELOC_C6000_SBR_GOT_L16_W BFD_RELOC_C6000_SBR_GOT_H16_W BFD_RELOC_C6000_DSBT_INDEX BFD_RELOC_C6000_PREL31 BFD_RELOC_C6000_COPY BFD_RELOC_C6000_JUMP_SLOT BFD_RELOC_C6000_EHTYPE BFD_RELOC_C6000_PCR_H16 BFD_RELOC_C6000_PCR_L16 BFD_RELOC_C6000_ALIGN BFD_RELOC_C6000_FPHEAD BFD_RELOC_C6000_NOCMP BFD_RELOC_FR30_48 BFD_RELOC_FR30_20 BFD_RELOC_FR30_6_IN_4 BFD_RELOC_FR30_8_IN_8 BFD_RELOC_FR30_9_IN_8 BFD_RELOC_FR30_10_IN_8 BFD_RELOC_FR30_9_PCREL BFD_RELOC_FR30_12_PCREL BFD_RELOC_MCORE_PCREL_IMM8BY4 BFD_RELOC_MCORE_PCREL_IMM11BY2 BFD_RELOC_MCORE_PCREL_IMM4BY2 BFD_RELOC_MCORE_PCREL_32 BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2 BFD_RELOC_MCORE_RVA BFD_RELOC_MEP_8 BFD_RELOC_MEP_16 BFD_RELOC_MEP_32 BFD_RELOC_MEP_PCREL8A2 BFD_RELOC_MEP_PCREL12A2 BFD_RELOC_MEP_PCREL17A2 BFD_RELOC_MEP_PCREL24A2 BFD_RELOC_MEP_PCABS24A2 BFD_RELOC_MEP_LOW16 BFD_RELOC_MEP_HI16U BFD_RELOC_MEP_HI16S BFD_RELOC_MEP_GPREL BFD_RELOC_MEP_TPREL BFD_RELOC_MEP_TPREL7 BFD_RELOC_MEP_TPREL7A2 BFD_RELOC_MEP_TPREL7A4 BFD_RELOC_MEP_UIMM24 BFD_RELOC_MEP_ADDR24A4 BFD_RELOC_MEP_GNU_VTINHERIT BFD_RELOC_MEP_GNU_VTENTRY BFD_RELOC_MMIX_GETA BFD_RELOC_MMIX_GETA_1 BFD_RELOC_MMIX_GETA_2 BFD_RELOC_MMIX_GETA_3 BFD_RELOC_MMIX_CBRANCH BFD_RELOC_MMIX_CBRANCH_J BFD_RELOC_MMIX_CBRANCH_1 BFD_RELOC_MMIX_CBRANCH_2 BFD_RELOC_MMIX_CBRANCH_3 BFD_RELOC_MMIX_PUSHJ BFD_RELOC_MMIX_PUSHJ_1 BFD_RELOC_MMIX_PUSHJ_2 BFD_RELOC_MMIX_PUSHJ_3 BFD_RELOC_MMIX_PUSHJ_STUBBABLE BFD_RELOC_MMIX_JMP BFD_RELOC_MMIX_JMP_1 BFD_RELOC_MMIX_JMP_2 BFD_RELOC_MMIX_JMP_3 BFD_RELOC_MMIX_ADDR19 BFD_RELOC_MMIX_ADDR27 BFD_RELOC_MMIX_REG_OR_BYTE BFD_RELOC_MMIX_REG BFD_RELOC_MMIX_BASE_PLUS_OFFSET BFD_RELOC_MMIX_LOCAL BFD_RELOC_AVR_7_PCREL BFD_RELOC_AVR_13_PCREL BFD_RELOC_AVR_16_PM BFD_RELOC_AVR_LO8_LDI BFD_RELOC_AVR_HI8_LDI BFD_RELOC_AVR_HH8_LDI BFD_RELOC_AVR_MS8_LDI BFD_RELOC_AVR_LO8_LDI_NEG BFD_RELOC_AVR_HI8_LDI_NEG BFD_RELOC_AVR_HH8_LDI_NEG BFD_RELOC_AVR_MS8_LDI_NEG BFD_RELOC_AVR_LO8_LDI_PM BFD_RELOC_AVR_LO8_LDI_GS BFD_RELOC_AVR_HI8_LDI_PM BFD_RELOC_AVR_HI8_LDI_GS BFD_RELOC_AVR_HH8_LDI_PM BFD_RELOC_AVR_LO8_LDI_PM_NEG BFD_RELOC_AVR_HI8_LDI_PM_NEG BFD_RELOC_AVR_HH8_LDI_PM_NEG BFD_RELOC_AVR_CALL BFD_RELOC_AVR_LDI BFD_RELOC_AVR_6 BFD_RELOC_AVR_6_ADIW BFD_RELOC_RX_NEG8 BFD_RELOC_RX_NEG16 BFD_RELOC_RX_NEG24 BFD_RELOC_RX_NEG32 BFD_RELOC_RX_16_OP BFD_RELOC_RX_24_OP BFD_RELOC_RX_32_OP BFD_RELOC_RX_8U BFD_RELOC_RX_16U BFD_RELOC_RX_24U BFD_RELOC_RX_DIR3U_PCREL BFD_RELOC_RX_DIFF BFD_RELOC_RX_GPRELB BFD_RELOC_RX_GPRELW BFD_RELOC_RX_GPRELL BFD_RELOC_RX_SYM BFD_RELOC_RX_OP_SUBTRACT BFD_RELOC_RX_OP_NEG BFD_RELOC_RX_ABS8 BFD_RELOC_RX_ABS16 BFD_RELOC_RX_ABS16_REV BFD_RELOC_RX_ABS32 BFD_RELOC_RX_ABS32_REV BFD_RELOC_RX_ABS16U BFD_RELOC_RX_ABS16UW BFD_RELOC_RX_ABS16UL BFD_RELOC_RX_RELAX BFD_RELOC_390_12 BFD_RELOC_390_GOT12 BFD_RELOC_390_PLT32 BFD_RELOC_390_COPY BFD_RELOC_390_GLOB_DAT BFD_RELOC_390_JMP_SLOT BFD_RELOC_390_RELATIVE BFD_RELOC_390_GOTPC BFD_RELOC_390_GOT16 BFD_RELOC_390_PC16DBL BFD_RELOC_390_PLT16DBL BFD_RELOC_390_PC32DBL BFD_RELOC_390_PLT32DBL BFD_RELOC_390_GOTPCDBL BFD_RELOC_390_GOT64 BFD_RELOC_390_PLT64 BFD_RELOC_390_GOTENT BFD_RELOC_390_GOTOFF64 BFD_RELOC_390_GOTPLT12 BFD_RELOC_390_GOTPLT16 BFD_RELOC_390_GOTPLT32 BFD_RELOC_390_GOTPLT64 BFD_RELOC_390_GOTPLTENT BFD_RELOC_390_PLTOFF16 BFD_RELOC_390_PLTOFF32 BFD_RELOC_390_PLTOFF64 BFD_RELOC_390_TLS_LOAD BFD_RELOC_390_TLS_GDCALL BFD_RELOC_390_TLS_LDCALL BFD_RELOC_390_TLS_GD32 BFD_RELOC_390_TLS_GD64 BFD_RELOC_390_TLS_GOTIE12 BFD_RELOC_390_TLS_GOTIE32 BFD_RELOC_390_TLS_GOTIE64 BFD_RELOC_390_TLS_LDM32 BFD_RELOC_390_TLS_LDM64 BFD_RELOC_390_TLS_IE32 BFD_RELOC_390_TLS_IE64 BFD_RELOC_390_TLS_IEENT BFD_RELOC_390_TLS_LE32 BFD_RELOC_390_TLS_LE64 BFD_RELOC_390_TLS_LDO32 BFD_RELOC_390_TLS_LDO64 BFD_RELOC_390_TLS_DTPMOD BFD_RELOC_390_TLS_DTPOFF BFD_RELOC_390_TLS_TPOFF BFD_RELOC_390_20 BFD_RELOC_390_GOT20 BFD_RELOC_390_GOTPLT20 BFD_RELOC_390_TLS_GOTIE20 BFD_RELOC_SCORE_GPREL15 BFD_RELOC_SCORE_DUMMY2 BFD_RELOC_SCORE_JMP BFD_RELOC_SCORE_BRANCH BFD_RELOC_SCORE_IMM30 BFD_RELOC_SCORE_IMM32 BFD_RELOC_SCORE16_JMP BFD_RELOC_SCORE16_BRANCH BFD_RELOC_SCORE_BCMP BFD_RELOC_SCORE_GOT15 BFD_RELOC_SCORE_GOT_LO16 BFD_RELOC_SCORE_CALL15 BFD_RELOC_SCORE_DUMMY_HI16 BFD_RELOC_IP2K_FR9 BFD_RELOC_IP2K_BANK BFD_RELOC_IP2K_ADDR16CJP BFD_RELOC_IP2K_PAGE3 BFD_RELOC_IP2K_LO8DATA BFD_RELOC_IP2K_HI8DATA BFD_RELOC_IP2K_EX8DATA BFD_RELOC_IP2K_LO8INSN BFD_RELOC_IP2K_HI8INSN BFD_RELOC_IP2K_PC_SKIP BFD_RELOC_IP2K_TEXT BFD_RELOC_IP2K_FR_OFFSET BFD_RELOC_VPE4KMATH_DATA BFD_RELOC_VPE4KMATH_INSN BFD_RELOC_VTABLE_INHERIT BFD_RELOC_VTABLE_ENTRY BFD_RELOC_IA64_IMM14 BFD_RELOC_IA64_IMM22 BFD_RELOC_IA64_IMM64 BFD_RELOC_IA64_DIR32MSB BFD_RELOC_IA64_DIR32LSB BFD_RELOC_IA64_DIR64MSB BFD_RELOC_IA64_DIR64LSB BFD_RELOC_IA64_GPREL22 BFD_RELOC_IA64_GPREL64I BFD_RELOC_IA64_GPREL32MSB BFD_RELOC_IA64_GPREL32LSB BFD_RELOC_IA64_GPREL64MSB BFD_RELOC_IA64_GPREL64LSB BFD_RELOC_IA64_LTOFF22 BFD_RELOC_IA64_LTOFF64I BFD_RELOC_IA64_PLTOFF22 BFD_RELOC_IA64_PLTOFF64I BFD_RELOC_IA64_PLTOFF64MSB BFD_RELOC_IA64_PLTOFF64LSB BFD_RELOC_IA64_FPTR64I BFD_RELOC_IA64_FPTR32MSB BFD_RELOC_IA64_FPTR32LSB BFD_RELOC_IA64_FPTR64MSB BFD_RELOC_IA64_FPTR64LSB BFD_RELOC_IA64_PCREL21B BFD_RELOC_IA64_PCREL21BI BFD_RELOC_IA64_PCREL21M BFD_RELOC_IA64_PCREL21F BFD_RELOC_IA64_PCREL22 BFD_RELOC_IA64_PCREL60B BFD_RELOC_IA64_PCREL64I BFD_RELOC_IA64_PCREL32MSB BFD_RELOC_IA64_PCREL32LSB BFD_RELOC_IA64_PCREL64MSB BFD_RELOC_IA64_PCREL64LSB BFD_RELOC_IA64_LTOFF_FPTR22 BFD_RELOC_IA64_LTOFF_FPTR64I BFD_RELOC_IA64_LTOFF_FPTR32MSB BFD_RELOC_IA64_LTOFF_FPTR32LSB BFD_RELOC_IA64_LTOFF_FPTR64MSB BFD_RELOC_IA64_LTOFF_FPTR64LSB BFD_RELOC_IA64_SEGREL32MSB BFD_RELOC_IA64_SEGREL32LSB BFD_RELOC_IA64_SEGREL64MSB BFD_RELOC_IA64_SEGREL64LSB BFD_RELOC_IA64_SECREL32MSB BFD_RELOC_IA64_SECREL32LSB BFD_RELOC_IA64_SECREL64MSB BFD_RELOC_IA64_SECREL64LSB BFD_RELOC_IA64_REL32MSB BFD_RELOC_IA64_REL32LSB BFD_RELOC_IA64_REL64MSB BFD_RELOC_IA64_REL64LSB BFD_RELOC_IA64_LTV32MSB BFD_RELOC_IA64_LTV32LSB BFD_RELOC_IA64_LTV64MSB BFD_RELOC_IA64_LTV64LSB BFD_RELOC_IA64_IPLTMSB BFD_RELOC_IA64_IPLTLSB BFD_RELOC_IA64_COPY BFD_RELOC_IA64_LTOFF22X BFD_RELOC_IA64_LDXMOV BFD_RELOC_IA64_TPREL14 BFD_RELOC_IA64_TPREL22 BFD_RELOC_IA64_TPREL64I BFD_RELOC_IA64_TPREL64MSB BFD_RELOC_IA64_TPREL64LSB BFD_RELOC_IA64_LTOFF_TPREL22 BFD_RELOC_IA64_DTPMOD64MSB BFD_RELOC_IA64_DTPMOD64LSB BFD_RELOC_IA64_LTOFF_DTPMOD22 BFD_RELOC_IA64_DTPREL14 BFD_RELOC_IA64_DTPREL22 BFD_RELOC_IA64_DTPREL64I BFD_RELOC_IA64_DTPREL32MSB BFD_RELOC_IA64_DTPREL32LSB BFD_RELOC_IA64_DTPREL64MSB BFD_RELOC_IA64_DTPREL64LSB BFD_RELOC_IA64_LTOFF_DTPREL22 BFD_RELOC_M68HC11_HI8 BFD_RELOC_M68HC11_LO8 BFD_RELOC_M68HC11_3B BFD_RELOC_M68HC11_RL_JUMP BFD_RELOC_M68HC11_RL_GROUP BFD_RELOC_M68HC11_LO16 BFD_RELOC_M68HC11_PAGE BFD_RELOC_M68HC11_24 BFD_RELOC_M68HC12_5B BFD_RELOC_16C_NUM08 BFD_RELOC_16C_NUM08_C BFD_RELOC_16C_NUM16 BFD_RELOC_16C_NUM16_C BFD_RELOC_16C_NUM32 BFD_RELOC_16C_NUM32_C BFD_RELOC_16C_DISP04 BFD_RELOC_16C_DISP04_C BFD_RELOC_16C_DISP08 BFD_RELOC_16C_DISP08_C BFD_RELOC_16C_DISP16 BFD_RELOC_16C_DISP16_C BFD_RELOC_16C_DISP24 BFD_RELOC_16C_DISP24_C BFD_RELOC_16C_DISP24a BFD_RELOC_16C_DISP24a_C BFD_RELOC_16C_REG04 BFD_RELOC_16C_REG04_C BFD_RELOC_16C_REG04a BFD_RELOC_16C_REG04a_C BFD_RELOC_16C_REG14 BFD_RELOC_16C_REG14_C BFD_RELOC_16C_REG16 BFD_RELOC_16C_REG16_C BFD_RELOC_16C_REG20 BFD_RELOC_16C_REG20_C BFD_RELOC_16C_ABS20 BFD_RELOC_16C_ABS20_C BFD_RELOC_16C_ABS24 BFD_RELOC_16C_ABS24_C BFD_RELOC_16C_IMM04 BFD_RELOC_16C_IMM04_C BFD_RELOC_16C_IMM16 BFD_RELOC_16C_IMM16_C BFD_RELOC_16C_IMM20 BFD_RELOC_16C_IMM20_C BFD_RELOC_16C_IMM24 BFD_RELOC_16C_IMM24_C BFD_RELOC_16C_IMM32 BFD_RELOC_16C_IMM32_C BFD_RELOC_CR16_NUM8 BFD_RELOC_CR16_NUM16 BFD_RELOC_CR16_NUM32 BFD_RELOC_CR16_NUM32a BFD_RELOC_CR16_REGREL0 BFD_RELOC_CR16_REGREL4 BFD_RELOC_CR16_REGREL4a BFD_RELOC_CR16_REGREL14 BFD_RELOC_CR16_REGREL14a BFD_RELOC_CR16_REGREL16 BFD_RELOC_CR16_REGREL20 BFD_RELOC_CR16_REGREL20a BFD_RELOC_CR16_ABS20 BFD_RELOC_CR16_ABS24 BFD_RELOC_CR16_IMM4 BFD_RELOC_CR16_IMM8 BFD_RELOC_CR16_IMM16 BFD_RELOC_CR16_IMM20 BFD_RELOC_CR16_IMM24 BFD_RELOC_CR16_IMM32 BFD_RELOC_CR16_IMM32a BFD_RELOC_CR16_DISP4 BFD_RELOC_CR16_DISP8 BFD_RELOC_CR16_DISP16 BFD_RELOC_CR16_DISP20 BFD_RELOC_CR16_DISP24 BFD_RELOC_CR16_DISP24a BFD_RELOC_CR16_SWITCH8 BFD_RELOC_CR16_SWITCH16 BFD_RELOC_CR16_SWITCH32 BFD_RELOC_CR16_GOT_REGREL20 BFD_RELOC_CR16_GOTC_REGREL20 BFD_RELOC_CR16_GLOB_DAT BFD_RELOC_CRX_REL4 BFD_RELOC_CRX_REL8 BFD_RELOC_CRX_REL8_CMP BFD_RELOC_CRX_REL16 BFD_RELOC_CRX_REL24 BFD_RELOC_CRX_REL32 BFD_RELOC_CRX_REGREL12 BFD_RELOC_CRX_REGREL22 BFD_RELOC_CRX_REGREL28 BFD_RELOC_CRX_REGREL32 BFD_RELOC_CRX_ABS16 BFD_RELOC_CRX_ABS32 BFD_RELOC_CRX_NUM8 BFD_RELOC_CRX_NUM16 BFD_RELOC_CRX_NUM32 BFD_RELOC_CRX_IMM16 BFD_RELOC_CRX_IMM32 BFD_RELOC_CRX_SWITCH8 BFD_RELOC_CRX_SWITCH16 BFD_RELOC_CRX_SWITCH32 BFD_RELOC_CRIS_BDISP8 BFD_RELOC_CRIS_UNSIGNED_5 BFD_RELOC_CRIS_SIGNED_6 BFD_RELOC_CRIS_UNSIGNED_6 BFD_RELOC_CRIS_SIGNED_8 BFD_RELOC_CRIS_UNSIGNED_8 BFD_RELOC_CRIS_SIGNED_16 BFD_RELOC_CRIS_UNSIGNED_16 BFD_RELOC_CRIS_LAPCQ_OFFSET BFD_RELOC_CRIS_UNSIGNED_4 BFD_RELOC_CRIS_COPY BFD_RELOC_CRIS_GLOB_DAT BFD_RELOC_CRIS_JUMP_SLOT BFD_RELOC_CRIS_RELATIVE BFD_RELOC_CRIS_32_GOT BFD_RELOC_CRIS_16_GOT BFD_RELOC_CRIS_32_GOTPLT BFD_RELOC_CRIS_16_GOTPLT BFD_RELOC_CRIS_32_GOTREL BFD_RELOC_CRIS_32_PLT_GOTREL BFD_RELOC_CRIS_32_PLT_PCREL BFD_RELOC_CRIS_32_GOT_GD BFD_RELOC_CRIS_16_GOT_GD BFD_RELOC_CRIS_32_GD BFD_RELOC_CRIS_DTP BFD_RELOC_CRIS_32_DTPREL BFD_RELOC_CRIS_16_DTPREL BFD_RELOC_CRIS_32_GOT_TPREL BFD_RELOC_CRIS_16_GOT_TPREL BFD_RELOC_CRIS_32_TPREL BFD_RELOC_CRIS_16_TPREL BFD_RELOC_CRIS_DTPMOD BFD_RELOC_CRIS_32_IE BFD_RELOC_860_COPY BFD_RELOC_860_GLOB_DAT BFD_RELOC_860_JUMP_SLOT BFD_RELOC_860_RELATIVE BFD_RELOC_860_PC26 BFD_RELOC_860_PLT26 BFD_RELOC_860_PC16 BFD_RELOC_860_LOW0 BFD_RELOC_860_SPLIT0 BFD_RELOC_860_LOW1 BFD_RELOC_860_SPLIT1 BFD_RELOC_860_LOW2 BFD_RELOC_860_SPLIT2 BFD_RELOC_860_LOW3 BFD_RELOC_860_LOGOT0 BFD_RELOC_860_SPGOT0 BFD_RELOC_860_LOGOT1 BFD_RELOC_860_SPGOT1 BFD_RELOC_860_LOGOTOFF0 BFD_RELOC_860_SPGOTOFF0 BFD_RELOC_860_LOGOTOFF1 BFD_RELOC_860_SPGOTOFF1 BFD_RELOC_860_LOGOTOFF2 BFD_RELOC_860_LOGOTOFF3 BFD_RELOC_860_LOPC BFD_RELOC_860_HIGHADJ BFD_RELOC_860_HAGOT BFD_RELOC_860_HAGOTOFF BFD_RELOC_860_HAPC BFD_RELOC_860_HIGH BFD_RELOC_860_HIGOT BFD_RELOC_860_HIGOTOFF BFD_RELOC_OPENRISC_ABS_26 BFD_RELOC_OPENRISC_REL_26 BFD_RELOC_H8_DIR16A8 BFD_RELOC_H8_DIR16R8 BFD_RELOC_H8_DIR24A8 BFD_RELOC_H8_DIR24R8 BFD_RELOC_H8_DIR32A16 BFD_RELOC_XSTORMY16_REL_12 BFD_RELOC_XSTORMY16_12 BFD_RELOC_XSTORMY16_24 BFD_RELOC_XSTORMY16_FPTR16 BFD_RELOC_RELC BFD_RELOC_XC16X_PAG BFD_RELOC_XC16X_POF BFD_RELOC_XC16X_SEG BFD_RELOC_XC16X_SOF BFD_RELOC_VAX_GLOB_DAT BFD_RELOC_VAX_JMP_SLOT BFD_RELOC_VAX_RELATIVE BFD_RELOC_MT_PC16 BFD_RELOC_MT_HI16 BFD_RELOC_MT_LO16 BFD_RELOC_MT_GNU_VTINHERIT BFD_RELOC_MT_GNU_VTENTRY BFD_RELOC_MT_PCINSN8 BFD_RELOC_MSP430_10_PCREL BFD_RELOC_MSP430_16_PCREL BFD_RELOC_MSP430_16 BFD_RELOC_MSP430_16_PCREL_BYTE BFD_RELOC_MSP430_16_BYTE BFD_RELOC_MSP430_2X_PCREL BFD_RELOC_MSP430_RL_PCREL BFD_RELOC_IQ2000_OFFSET_16 BFD_RELOC_IQ2000_OFFSET_21 BFD_RELOC_IQ2000_UHI16 BFD_RELOC_XTENSA_RTLD BFD_RELOC_XTENSA_GLOB_DAT BFD_RELOC_XTENSA_JMP_SLOT BFD_RELOC_XTENSA_RELATIVE BFD_RELOC_XTENSA_PLT BFD_RELOC_XTENSA_DIFF8 BFD_RELOC_XTENSA_DIFF16 BFD_RELOC_XTENSA_DIFF32 BFD_RELOC_XTENSA_SLOT0_OP BFD_RELOC_XTENSA_SLOT1_OP BFD_RELOC_XTENSA_SLOT2_OP BFD_RELOC_XTENSA_SLOT3_OP BFD_RELOC_XTENSA_SLOT4_OP BFD_RELOC_XTENSA_SLOT5_OP BFD_RELOC_XTENSA_SLOT6_OP BFD_RELOC_XTENSA_SLOT7_OP BFD_RELOC_XTENSA_SLOT8_OP BFD_RELOC_XTENSA_SLOT9_OP BFD_RELOC_XTENSA_SLOT10_OP BFD_RELOC_XTENSA_SLOT11_OP BFD_RELOC_XTENSA_SLOT12_OP BFD_RELOC_XTENSA_SLOT13_OP BFD_RELOC_XTENSA_SLOT14_OP BFD_RELOC_XTENSA_SLOT0_ALT BFD_RELOC_XTENSA_SLOT1_ALT BFD_RELOC_XTENSA_SLOT2_ALT BFD_RELOC_XTENSA_SLOT3_ALT BFD_RELOC_XTENSA_SLOT4_ALT BFD_RELOC_XTENSA_SLOT5_ALT BFD_RELOC_XTENSA_SLOT6_ALT BFD_RELOC_XTENSA_SLOT7_ALT BFD_RELOC_XTENSA_SLOT8_ALT BFD_RELOC_XTENSA_SLOT9_ALT BFD_RELOC_XTENSA_SLOT10_ALT BFD_RELOC_XTENSA_SLOT11_ALT BFD_RELOC_XTENSA_SLOT12_ALT BFD_RELOC_XTENSA_SLOT13_ALT BFD_RELOC_XTENSA_SLOT14_ALT BFD_RELOC_XTENSA_OP0 BFD_RELOC_XTENSA_OP1 BFD_RELOC_XTENSA_OP2 BFD_RELOC_XTENSA_ASM_EXPAND BFD_RELOC_XTENSA_ASM_SIMPLIFY BFD_RELOC_XTENSA_TLSDESC_FN BFD_RELOC_XTENSA_TLSDESC_ARG BFD_RELOC_XTENSA_TLS_DTPOFF BFD_RELOC_XTENSA_TLS_TPOFF BFD_RELOC_XTENSA_TLS_FUNC BFD_RELOC_XTENSA_TLS_ARG BFD_RELOC_XTENSA_TLS_CALL BFD_RELOC_Z80_DISP8 BFD_RELOC_Z8K_DISP7 BFD_RELOC_Z8K_CALLR BFD_RELOC_Z8K_IMM4L BFD_RELOC_LM32_CALL BFD_RELOC_LM32_BRANCH BFD_RELOC_LM32_16_GOT BFD_RELOC_LM32_GOTOFF_HI16 BFD_RELOC_LM32_GOTOFF_LO16 BFD_RELOC_LM32_COPY BFD_RELOC_LM32_GLOB_DAT BFD_RELOC_LM32_JMP_SLOT BFD_RELOC_LM32_RELATIVE BFD_RELOC_MACH_O_SECTDIFF BFD_RELOC_MACH_O_PAIR BFD_RELOC_MACH_O_X86_64_BRANCH32 BFD_RELOC_MACH_O_X86_64_BRANCH8 BFD_RELOC_MACH_O_X86_64_GOT BFD_RELOC_MACH_O_X86_64_GOT_LOAD BFD_RELOC_MACH_O_X86_64_SUBTRACTOR32 BFD_RELOC_MACH_O_X86_64_SUBTRACTOR64 BFD_RELOC_MACH_O_X86_64_PCREL32_1 BFD_RELOC_MACH_O_X86_64_PCREL32_2 BFD_RELOC_MACH_O_X86_64_PCREL32_4 BFD_RELOC_MICROBLAZE_32_LO BFD_RELOC_MICROBLAZE_32_LO_PCREL BFD_RELOC_MICROBLAZE_32_ROSDA BFD_RELOC_MICROBLAZE_32_RWSDA BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM BFD_RELOC_MICROBLAZE_64_NONE BFD_RELOC_MICROBLAZE_64_GOTPC BFD_RELOC_MICROBLAZE_64_GOT BFD_RELOC_MICROBLAZE_64_PLT BFD_RELOC_MICROBLAZE_64_GOTOFF BFD_RELOC_MICROBLAZE_32_GOTOFF BFD_RELOC_MICROBLAZE_COPY @@overflow: BFD_RELOC_UNUSED@@ a 2a ?a La Ya fa sa a a a a a a a a b (b ?b Ub ib }b b b b b b c c 0c Fc Zc nc c c c c c c d d 5d Ld bd zd d d d d d e e 4e Ke be xe e e e e e e f f 2f Hf ^f mf |f f f f f f f g g ,g Bg Wg lg g g g g g g h "h @h `h h h h h h i !i 4i Gi ]i ri i i i i i i j &j 8j Jj `j vj j j j j j j k )k Ek `k |k k k k k l +l Gl cl l l l l l m &m Cm `m }m m m m m m n n -n An Wn mn n n n n n n o o 6o No jo o o o o o o p 'p ;p Op cp yp p p p p p q /q Jq bq }q q q q q q q r r 3r Jr _r vr r r r r r r s ,s Ds ]s vs s s s s s s t -t Ct Zt pt t t t t t t u 7u Mu du u u u u u v 1v Ev ^v wv v v v v v v w "w 8w Lw `w tw w w w w x x @x `x wx x x x x x y *y By Zy ry y y y y y z *z @z [z sz z z z z z { &{ >{ R{ f{ y{ { { { { { | | -| B| W| m| | | | | | } } <} S} k} } } } } } } ~ -~ G~ a~ z~ ~ ~ ~ ~ ~ ( ? [ t 1 H _ { 7 U r / B V h ( ? W q / G ` { / G a z - G d } # @ _ q # : T n ( E b ) G e ! @ ` ' ? Y r ( G ` { * C \ x % : N e | * D [ v + C [ s 9 Q l / G _ w % @ X j | * @ V l ! 9 R d w " 7 I ^ s / B Z p ! 7 Q n : V o 3 I _ x % < S j ~ ; Q m ( A T j . E \ s 7 N c x 0 T u & : O c w 1 F [ r & 8 P j | ' > V n ! 6 O c { + G c { < \ | 4 \ - E ] o ) ? U q / C ^ y 8 P g / I c } & = R l 0 F \ s ; O _ p 4 H \ q + A W n , K ^ s - C Z n . G ` y ' 7 L ^ q - A U i z ! 6 K ^ o - D Z q ! 8 P g ~ & @ Z r . G ` x ( > T j 9 N e | 7 P g | 5 O i 3 J c | & > V p 8 X w 4 O g & = Q i 1 L j = S i ~ 5 I _ s " 9 O g { % ; O e y ! 7 K a u , D \ u 1 F [ q 4 L _ r ! 5 I \ p 8 R j 3 K a w - B U n - D \ s % 8 M b w / E Y p 4 I _ z " 9 P g y 0 O h 3 M b y + E _ y 4 O j ' B ^ z ) G c , @ T h ~ & @ X | , P t 7 T r /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/bfd/reloc.c ' . . . . coff-Intel-little coff-Intel-big p n coff-z8k ] p .debug_ranges VRT32 %P%F: --relax and -r may not be used together unused k bfd_generic_get_relocated_section_contents _bfd_clear_contents _bfd_relocate_contents bfd_check_overflow bfd_get_reloc_size __wrap_ __real_ /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/bfd/linker.c __imp_%s COMMON 2 9 9 A A O GLOBAL_ %B: indirect symbol `%s' to `%s' is a loop 5 j J # r f E i a w B N Attempt to do relocatable link with %s input and %s output %B: warning: ignoring duplicate section `%A' %B: warning: duplicate section `%A' has different size %F%P: already_linked_table: %E * _bfd_generic_section_already_linked _bfd_default_link_order _bfd_generic_reloc_link_order _bfd_generic_link_write_global_symbol set_symbol_from_hash _bfd_generic_link_output_symbols _bfd_generic_link_add_one_symbol .stabstr %B(%A+0x%lx): Stabs entry has invalid string index. /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/bfd/stabs.c /usr/local/google/home/andrewhsieh/ndk-andrewhsieh/src/build/../gdb/gdb-7.3.x/bfd/merge.c %s: access beyond end of merged section (%ld) _bfd_merged_section_offset _bfd_add_merge_section nw new dl delete new delete vn new [] vd delete [] as = ne != eq == ge >= gt > le <= lt < plus + pl apl += minus - mi ami -= mult * ml amu *= aml convert negate trunc_mod % md amd %= trunc_div / dv adv /= truth_andif && aa truth_orif || oo truth_not ! nt postincrement ++ pp postdecrement -- mm bit_ior | or aor |= bit_xor ^ er aer ^= bit_and & ad aad &= bit_not ~ co call () cl alshift << ls als <<= arshift >> rs ars >>= component -> pt rf indirect method_call ->() addr array [] vc compound , cm cond ?: cn max >? mx min * sz sizeof " % ( + . 1 3 6 9 < > C E C H L O U W U Z ^ a f h f k o r o v C ~ U ' ) ' , 0 3 ; = ; @ D G O Q O T Y \ Y _ g j g m q u } } f ; none Demangling disabled auto Automatic selection based on executable gnu GNU (g++) style demangling lucid Lucid (lcc) style demangling arm ARM style demangling hp HP (aCC) style demangling edg EDG style demangling gnu-v3 GNU (g++) V3 ABI-style demangling java Java style demangling gnat GNAT style demangling ; A ^ b w z @ const volatile __restrict const volatile const __restrict volatile __restrict const volatile __restrict d d d d d d d d assign_ type _ada_ 'Read 'Write 'Input 'Output .Finalize .Adjust <%s> global constructors keyed to global destructors keyed to import stub for . :: static 4 4 4 4 4 4 4 4 4 4 V ~ j~ \ C template < class > class ( ) %d e ' false true 0 JArray1Z __pt__ __tm__ __ps__ __S , _GLOBAL_ {anonymous} __ _imp__ __imp_ __std__ __sti__ _ virtual table 0123456789Qt __thunk_ virtual function thunk (delta:%d) for __t type_info node type_info function __vtbl__ [ ] p p ] X r r unsigned signed __complex void long long long int short bool char wchar_t long double double float %x int%u_t m ) M C { n - ' -2147483648 U ... __ct __dt operator operator T%d Oabs abs Oand and Omod mod Onot not Oor Orem rem Oxor xor Oeq One Olt Ole Ogt Oge Oadd Osubtract Oconcat Omultiply Odivide Oexpon ** < 6 1 + C U ; f _elabb 'Elab_Body _elabs 'Elab_Spec _size 'Size _alignment 'Alignment _assign .":=" std W e 7 e e e e g e W e e e e G _GLOBAL_ (anonymous namespace) aN &= aS = aa && ad & an cl () cm , co ~ dV /= da delete[] de * dl delete dt . dv / eO ^= eo ^ eq == ge >= gt > ix [] lS <<= le <= ls << lt < mI -= mL *= mi - ml mm -- na new[] ne != ng nt ! nw new oR |= oo || or | pL += pl + pm ->* pp ++ ps pt -> qu ? rM %= rS >>= rm % rs >> st sizeof sz at alignof az " % ( + . 4 7 : = @ B E I L O R U X Z ] ` c e h l o r c u x { ~ { O ~ ] signed char bool boolean char byte double long double float __float128 unsigned char int unsigned int unsigned long unsigned long __int128 unsigned __int128 short unsigned short void wchar_t long long unsigned long long ... decimal32 decimal64 decimal128 half char16_t char32_t decltype(nullptr) ' ' 5 5 9 F O O T T b b k k } } O I K M N , d ^ string literal std::allocator allocator std::basic_string basic_string std::string std::basic_string, std::allocator > std::istream std::basic_istream > basic_istream std::ostream std::basic_ostream > basic_ostream std::iostream std::basic_iostream > basic_iostream t $ $ a b s F i ? L 1 ~ o 1 d 2 ! %ld Q! ! ! ! ! ! Q! o! ! ! ! ! ! ! ! ! ! ! ! ! ! ! Q! ! ! ! ! ! ! ! ! ! ! ! ! Q! ! ! ! ! ! ! ! ! Q! X! ! ! ! ! ! ! ! ! ! ! ! Q! ! ! ! ! Q! ! ! G! :: JArray vtable for VTT for construction vtable for -in- typeinfo for typeinfo name for typeinfo fn for non-virtual thunk to virtual thunk to covariant return thunk to java Class for guard variable for reference temporary for hidden alias for _Sat _Accum _Fract , operator operator : ul ll ull false true java resource decltype ( {parm# global constructors keyed to global destructors keyed to {lambda( )# {unnamed type# " %# %# # & ( < ( ( ( ,) `) ) ) +* _* * * * /+ c+ + + + + + s, s, s, s, s, s, s, s, s, , R- s- . {0 1 {0 1 1 |2 2 3 N3 4 67 F7 8 8 8 8 v: : : \: ; T< < < k= += K; '9 '9 8 8 8 8 9 {default arg# }:: restrict volatile const complex imaginary ::* __vector( C C C C C C C C C C C C C C C C C C C C A A A A A A B DB jB B B B C C C C B C ;C ( M N N M M M M N /N M M M M M M M M M M M M M M M M M M M M %s: error: too many @-files encountered r out of memory %I $ < ;G ]t B { = 0 $ ~ `2 fC O m A oE! a 0 P A A ? & * " @ ` 0 P H X ? " A ! ) ? Cannot find prime bigger than %lu j j sj bj Qj Cj 2j !j j i i i cccccccccccccccccccccccccccccccccccccccccccccccc ccccccc cccccccccccccccccccccccccc ccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccc C B B B B Q 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 !"#$%&'()*+,-./0123456789:;<=>?@abcdefghijklmnopqrstuvwxyz[\]^_`abcdefghijklmnopqrstuvwxyz{|}~ !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`ABCDEFGHIJKLMNOPQRSTUVWXYZ{|}~ : %s%sout of memory allocating %lu bytes after a total of %lu bytes undocumented error #%d
? " y z / X z % ] a { b p c } a j r x J M } g q o o h h # - Y y ! ! z p u q v + $ T s w j ( \ Z z H J $ [ d s f ~ e r i i = = % . C C * # \ m ? ? < < & X k ' Z X l _ _ _ K ` ` G G ] { [ k " " t > > n t m @ @ , ! & + 2 : A J Q X a g n v } c c c ^ c c cj n c c c c c c < c c c Y c c c t c c c' , c c cF J c c h c c c c c c c c c h c# + c c h cF L c c cg 9 l c c h c Q c c c l c c h c c c c c c c c c h c/ 7 c c h cR X c c cr v c c h c # c c c < c c c c c c c c c \ c c c! r ( c c cJ O c c cm p c c c 0 c c c C c c c ! c c c " c c cZ # ] c c c{ $ c c c # % c c c 6 & c c c I ' c c c \ ( c c ( cl ) t c c ( c * c c c " + c c c 5 , c c ( c7 - < c c ( cU . Z c c x c / c c x c ? 0 c c c u 1 c c c" 2 % c c cB 3 H c c cg 4 l c c c Q 5 c c c d 6 c c c 7 c c c& 8 , c c cM @ 9 T c c cv Z : z c c c t ; c c c < c c c = c c c > c c c1 ? 8 c c c\ @ ` c c c ! A c c c 4 B c c c X C c c c k D c c c ~ E c c c; F ? c c c\ G ` c c h c{ H c c c I c c c J c c c K c c c L c c c% M * c c cH % N P c c co 7 O t c c c I P c c c [ Q c c c m R c c c S c c c# T ' c c cE U L c c cn V r c c c W c c c X c c c Y & c c , cf Z l c c c ? [ c c cb T \ p c c h c g ] c c c ^ c c c _ c c c. ` 8 c c cb a l c c c b c c c L c c c c d d c c c- e < c c h ce f q c c c g c c c G h c c $ cQ [ i X c c $ c k j c c c k c c c l c c c m c c cH n T c c c} o c c c p c c $ c q c c c 0 r c c c8 A s @ c c ci W t t c c $ c m u c c $ c v c c $ c w c c $ c6 x @ c c ci y x c c h c z c c $ c { c c c / | c c h c1 { } < c c cd ~ l c c c c c $ c c c c c c h c! ) F c c L c / F c c L c F F c c c- U 2 F c c L cO c U c c t c r F c c c# ( F c c cL T F c c cx } F c c c c c c F c c L c: ? F c c L cY ^ F c c L cx ' ~ F c c L c 6 ! Z \ ^ " [ ] _ O B @B &B `B p ,B B 0 2B @ B E `| DW RW aW pW W W W W W W W W W W X X $X 4X EX SX bX uX X X X X X X X X Y Y Y 0Y BY SY eY uY Y Y A Z n j A 2 s u 2 6 | a# + % : 1L q - + < x H #c W u~ u~ ~ v ] g / j O @ q o "- A Z n j A 2 s u 2 6 | a# + % : 1L q - + < x H #c W u~ u~ ~ v ] g / j O @ q o "- A Z n j A 2 s u 2 6 | a# + % : 1L q - + < x H #c W u~ u~ ~ v ] g / j O @ q o "- A Z n A 2 s u 2 6 | a# + % : 0` q - + < x #c W u~ u~ ~ v ] g / j O @ q o '- g R L ` @ @ ` @ y ; A L Y G S i o u ; Y A L S G i o ) u ; Y A L S G i o ) u ; A @ L Y G S i o @ @ @ @ u ; i o A # L # Y + + + u + + G S @ A ~ : j A 2 s u 2 6 | a# + % : 1L q - + < x H #c W u~ u~ ~ m ] g / j O @ q o "- A ~ : j A 2 s u 2 6 | a# + % : 1L q - + < x H #c W u~ u~ ~ m ] g / j O @ q o "- A ~ : j A 2 s u 2 6 | a# + % : 1L q - + < x H #c W u~ u~ ~ m ] g / j O @ q o "- A Y, j A 2 s u 2 6 | a# + % : 1L q - + < x H , - #c W u~ u~ ~ , > *` ] g / j O `? @ q o "- A Y, j A 2 s u 2 6 | a# + % : 1L q - + < x H , - #c W u~ u~ ~ , > *` ] g / j O `? @ q o "- A Y, j A 2 s u 2 6 | a# + % : 1L q - + y. < x H , - #c W u~ u~ ~ , > *` ] g / j O `? @ q o "- A s /s A 6: s u | c - 9 < H #c W S~ u~ u~ ~ *` I ] g / j O M q o 8 , A s s A 6: s u | c - 9 < H #c W S~ u~ u~ ~ I ] g / j O q o 8 , $.$ Y Z .
GCC: (GNU) 4.2.3 (Ubuntu 4.2.3-2ubuntu7) GCC: (GNU) 4.2.3 (Ubuntu 4.2.3-2ubuntu7) GCC: (GNU) 4.6.x-google 20120106 (prerelease) GCC: (GNU) 4.2.3 (Ubuntu 4.2.3-2ubuntu7) GCC: (GNU) 4.2.3 (Ubuntu 4.2.3-2ubuntu7) GCC: (GNU) 4.2.3 (Ubuntu 4.2.3-2ubuntu7) GCC: (GNU) 4.2.3 (Ubuntu 4.2.3-2ubuntu7) GCC: (GNU) 4.2.3 (Ubuntu 4.2.3-2ubuntu7) GCC: (GNU) 4.2.3 (Ubuntu 4.2.3-2ubuntu7) GCC: (GNU) 4.2.3 (Ubuntu 4.2.3-2ubuntu7) GCC: (GNU) 4.2.3 (Ubuntu 4.2.3-2ubuntu7)
.shstrtab .interp .note.ABI-tag .hash .dynsym .dynstr .gnu.version .gnu.version_r .rel.dyn .rel.plt .init .text .fini .rodata .eh_frame_hdr .eh_frame .ctors .dtors .jcr .dynamic .got .got.plt .data .bss .comment
