Lines Matching refs:getSUnit
141 SUnit *PredSU = PredEdge->getSUnit();
173 LiveRegDefs[I->getReg()] = I->getSUnit();
197 if (LiveRegCycles[I->getReg()] == I->getSUnit()->getHeight()) {
290 else if (I->getSUnit()->getNode() &&
291 I->getSUnit()->getNode()->isOperandOf(LoadNode))
304 if (ChainPred.getSUnit()) {
323 SUnit *SuccDep = D.getSUnit();
331 SUnit *SuccDep = D.getSUnit();
370 SUnit *SuccSU = I->getSUnit();
407 SUnit *SuccSU = I->getSUnit();
480 CheckForLiveRegDef(I->getSUnit(), I->getReg(), LiveRegDefs,
