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Lines Matching full:vsubd

76   { ARM::VMLSD,       ARM::VMULD,       ARM::VSUBD,      false,  false },
79 { ARM::VNMLAD, ARM::VNMULD, ARM::VSUBD, true, false },
80 { ARM::VNMLSD, ARM::VMULD, ARM::VSUBD, true, false },