Lines Matching refs:A0
60 Mips::A0, Mips::A1, Mips::A2, Mips::A3
398 setExceptionPointerRegister(Subtarget->isABI_N64() ? Mips::A0_64 : Mips::A0);
2199 // i32 - Passed in A0, A1, A2, A3 and stack
2207 // For vararg functions, all arguments are passed in A0, A1, A2, A3 and stack.
2216 static const MCPhysReg IntRegs[] = { Mips::A0, Mips::A1, Mips::A2, Mips::A3 };
2236 // f32 and f64 are allocated in A0, A1, A2, A3 when either of the following
2247 // the allocated register must be either A0 or A2.
2310 assert((Reg == Mips::A0) || (Reg == Mips::A2));
2311 return (Reg == Mips::A0) ? Mips::A1 : Mips::A3;
