| /external/llvm/include/llvm/IR/ |
| CallingConv.h | 88 /// ARM_AAPCS - ARM Architecture Procedure Calling Standard calling
90 ARM_AAPCS = 67,
92 /// ARM_AAPCS_VFP - Same as ARM_AAPCS, but uses hard floating point ABI.
|
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 267 { RTLIB::ADD_F64, "__aeabi_dadd", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID },
268 { RTLIB::DIV_F64, "__aeabi_ddiv", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID },
269 { RTLIB::MUL_F64, "__aeabi_dmul", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID },
270 { RTLIB::SUB_F64, "__aeabi_dsub", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID },
274 { RTLIB::OEQ_F64, "__aeabi_dcmpeq", CallingConv::ARM_AAPCS, ISD::SETNE },
275 { RTLIB::UNE_F64, "__aeabi_dcmpeq", CallingConv::ARM_AAPCS, ISD::SETEQ },
276 { RTLIB::OLT_F64, "__aeabi_dcmplt", CallingConv::ARM_AAPCS, ISD::SETNE },
277 { RTLIB::OLE_F64, "__aeabi_dcmple", CallingConv::ARM_AAPCS, ISD::SETNE },
278 { RTLIB::OGE_F64, "__aeabi_dcmpge", CallingConv::ARM_AAPCS, ISD::SETNE },
279 { RTLIB::OGT_F64, "__aeabi_dcmpgt", CallingConv::ARM_AAPCS, ISD::SETNE }
[all...] |
| ARMFastISel.cpp | [all...] |
| /external/llvm/lib/IR/ |
| AsmWriter.cpp | 83 case CallingConv::ARM_AAPCS: Out << "arm_aapcscc"; break;
[all...] |
| /external/clang/lib/CodeGen/ |
| TargetInfo.cpp | [all...] |
| CGCall.cpp | 47 case CC_AAPCS: return llvm::CallingConv::ARM_AAPCS;
[all...] |
| /external/llvm/lib/AsmParser/ |
| LLParser.cpp | [all...] |
