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Searched
refs:CriticalPathRCs
(Results
1 - 13
of
13
) sorted by null
/external/llvm/lib/Target/
TargetSubtargetInfo.cpp
62
RegClassVector&
CriticalPathRCs
) const {
64
CriticalPathRCs
.clear();
/external/llvm/include/llvm/Target/
TargetSubtargetInfo.h
97
//
CriticalPathRCs
return any register classes that should only be broken
101
RegClassVector&
CriticalPathRCs
) const;
/external/llvm/lib/Target/PowerPC/
PPCSubtarget.cpp
228
RegClassVector&
CriticalPathRCs
) const {
231
CriticalPathRCs
.clear();
234
CriticalPathRCs
.push_back(&PPC::G8RCRegClass);
236
CriticalPathRCs
.push_back(&PPC::GPRCRegClass);
PPCSubtarget.h
231
RegClassVector&
CriticalPathRCs
) const override;
/external/llvm/lib/CodeGen/
AggressiveAntiDepBreaker.h
135
TargetSubtargetInfo::RegClassVector&
CriticalPathRCs
);
PostRASchedulerList.cpp
138
SmallVectorImpl<const TargetRegisterClass*> &
CriticalPathRCs
);
194
SmallVectorImpl<const TargetRegisterClass*> &
CriticalPathRCs
)
207
(AntiDepBreaker *)new AggressiveAntiDepBreaker(MF, RCI,
CriticalPathRCs
) :
263
SmallVector<const TargetRegisterClass*, 4>
CriticalPathRCs
;
272
CriticalPathRCs
))
288
CriticalPathRCs
);
AggressiveAntiDepBreaker.cpp
119
TargetSubtargetInfo::RegClassVector&
CriticalPathRCs
) :
128
for (unsigned i = 0, e =
CriticalPathRCs
.size(); i < e; ++i) {
129
BitVector CPSet = TRI->getAllocatableSet(MF,
CriticalPathRCs
[i]);
[
all
...]
/external/llvm/lib/Target/Mips/
MipsSubtarget.cpp
182
RegClassVector &
CriticalPathRCs
) const {
184
CriticalPathRCs
.clear();
185
CriticalPathRCs
.push_back(isGP64bit() ? &Mips::GPR64RegClass
MipsSubtarget.h
165
RegClassVector&
CriticalPathRCs
) const override;
/external/llvm/lib/Target/X86/
X86Subtarget.cpp
365
RegClassVector &
CriticalPathRCs
) const {
367
CriticalPathRCs
.clear();
X86Subtarget.h
459
RegClassVector&
CriticalPathRCs
) const override;
/external/llvm/lib/Target/ARM/
ARMSubtarget.cpp
440
RegClassVector&
CriticalPathRCs
) const {
ARMSubtarget.h
440
RegClassVector&
CriticalPathRCs
) const override;
Completed in 197 milliseconds