| /external/vixl/src/a64/ |
| decoder-a64.cc | 196 (instr->Mask(0x01000010) == 0x00000010)) {
210 (instr->Mask(0x00E0001D) == 0x00200001) ||
211 (instr->Mask(0x00E0001D) == 0x00400001) ||
212 (instr->Mask(0x00E0001E) == 0x00200002) ||
213 (instr->Mask(0x00E0001E) == 0x00400002) ||
214 (instr->Mask(0x00E0001C) == 0x00600000) ||
215 (instr->Mask(0x00E0001C) == 0x00800000) ||
216 (instr->Mask(0x00E0001F) == 0x00A00000) ||
217 (instr->Mask(0x00C0001C) == 0x00C00000)) {
224 const Instr masked_003FF0E0 = instr->Mask(0x003FF0E0)
[all...] |
| instructions-a64.h | 177 inline Instr Mask(uint32_t mask) const {
178 return InstructionBits() & mask;
200 static_cast<LoadStorePairOp>(Mask(LoadStorePairMask)));
205 return Mask(ConditionalBranchFMask) == ConditionalBranchFixed;
209 return Mask(UnconditionalBranchFMask) == UnconditionalBranchFixed;
213 return Mask(CompareBranchFMask) == CompareBranchFixed;
217 return Mask(TestBranchFMask) == TestBranchFixed;
221 return Mask(PCRelAddressingFMask) == PCRelAddressingFixed;
225 return Mask(LogicalImmediateFMask) == LogicalImmediateFixed
[all...] |
| disasm-a64.cc | 68 switch (instr->Mask(AddSubImmediateMask)) {
112 switch (instr->Mask(AddSubShiftedMask)) {
160 switch (instr->Mask(AddSubExtendedMask)) {
195 switch (instr->Mask(AddSubWithCarryMask)) {
236 switch (instr->Mask(LogicalImmediateMask)) {
302 switch (instr->Mask(LogicalShiftedMask)) {
351 switch (instr->Mask(ConditionalCompareRegisterMask)) {
366 switch (instr->Mask(ConditionalCompareImmediateMask)) {
388 switch (instr->Mask(ConditionalSelectMask)) {
443 switch (instr->Mask(BitfieldMask))
[all...] |
| /external/chromium_org/v8/src/arm64/ |
| decoder-arm64-inl.h | 132 (instr->Mask(0x01000010) == 0x00000010)) {
146 (instr->Mask(0x00E0001D) == 0x00200001) ||
147 (instr->Mask(0x00E0001D) == 0x00400001) ||
148 (instr->Mask(0x00E0001E) == 0x00200002) ||
149 (instr->Mask(0x00E0001E) == 0x00400002) ||
150 (instr->Mask(0x00E0001C) == 0x00600000) ||
151 (instr->Mask(0x00E0001C) == 0x00800000) ||
152 (instr->Mask(0x00E0001F) == 0x00A00000) ||
153 (instr->Mask(0x00C0001C) == 0x00C00000)) {
160 const Instr masked_003FF0E0 = instr->Mask(0x003FF0E0)
[all...] |
| instructions-arm64.h | 120 Instr Mask(uint32_t mask) const {
121 return InstructionBits() & mask;
152 static_cast<LoadStorePairOp>(Mask(LoadStorePairMask)));
157 return Mask(ConditionalBranchFMask) == ConditionalBranchFixed;
161 return Mask(UnconditionalBranchFMask) == UnconditionalBranchFixed;
165 return Mask(CompareBranchFMask) == CompareBranchFixed;
169 return Mask(TestBranchFMask) == TestBranchFixed;
177 return Mask(LoadLiteralFMask) == LoadLiteralFixed;
181 return Mask(LoadLiteralMask) == LDR_x_lit
[all...] |
| disasm-arm64.cc | 61 switch (instr->Mask(AddSubImmediateMask)) {
105 switch (instr->Mask(AddSubShiftedMask)) {
153 switch (instr->Mask(AddSubExtendedMask)) {
188 switch (instr->Mask(AddSubWithCarryMask)) {
229 switch (instr->Mask(LogicalImmediateMask)) {
295 switch (instr->Mask(LogicalShiftedMask)) {
344 switch (instr->Mask(ConditionalCompareRegisterMask)) {
359 switch (instr->Mask(ConditionalCompareImmediateMask)) {
381 switch (instr->Mask(ConditionalSelectMask)) {
436 switch (instr->Mask(BitfieldMask))
[all...] |
| instructions-arm64.cc | 19 if (Mask(LoadStoreAnyFMask) != LoadStoreAnyFixed) {
23 if (Mask(LoadStorePairAnyFMask) == LoadStorePairAnyFixed) {
24 return Mask(LoadStorePairLBit) != 0;
26 LoadStoreOp op = static_cast<LoadStoreOp>(Mask(LoadStoreOpMask));
46 if (Mask(LoadStoreAnyFMask) != LoadStoreAnyFixed) {
50 if (Mask(LoadStorePairAnyFMask) == LoadStorePairAnyFixed) {
51 return Mask(LoadStorePairLBit) == 0;
53 LoadStoreOp op = static_cast<LoadStoreOp>(Mask(LoadStoreOpMask));
129 int mask = width - 1; local
130 if ((imm_s & mask) == mask)
285 Instr mask = ImmLLiteral_mask; local
[all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/reference/vc/m4p10/src/ |
| omxVCM4P10_GetVLCInfo.c | 72 OMX_U32 Mask = 4, RunBefore;
129 Value == -1 ? Mask : 0;
130 Mask >>= 1;
136 Mask = 0;
147 /* Mask becomes zero after entering */
148 if (Mask &&
155 Value == -1 ? Mask : 0;
156 Mask >>= 1;
163 if (Mask)
165 Mask = 0
[all...] |
| /external/chromium_org/third_party/skia/src/svg/ |
| SkSVGMask.h | 16 DECLARE_SVG_INFO(Mask);
|
| SkSVGMask.cpp | 21 DEFINE_SVG_INFO(Mask)
|
| /external/skia/src/svg/ |
| SkSVGMask.h | 16 DECLARE_SVG_INFO(Mask);
|
| SkSVGMask.cpp | 21 DEFINE_SVG_INFO(Mask)
|
| /external/chromium_org/third_party/leveldatabase/src/util/ |
| crc32c_test.cc | 59 TEST(CRC, Mask) {
61 ASSERT_NE(crc, Mask(crc));
62 ASSERT_NE(crc, Mask(Mask(crc)));
63 ASSERT_EQ(crc, Unmask(Mask(crc)));
64 ASSERT_EQ(crc, Unmask(Unmask(Mask(Mask(crc)))));
|
| crc32c.h | 31 inline uint32_t Mask(uint32_t crc) {
|
| /external/clang/include/clang/AST/ |
| DeclAccessPair.h | 33 enum { Mask = 0x3 };
43 return reinterpret_cast<NamedDecl*>(~Mask & Ptr);
46 return AccessSpecifier(Mask & Ptr);
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.6/sysroot/usr/include/X11/ |
| Xdefs.h | 73 typedef unsigned long Mask;
75 typedef CARD32 Mask;
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.8/sysroot/usr/include/X11/ |
| Xdefs.h | 73 typedef unsigned long Mask;
75 typedef CARD32 Mask;
|
| /external/llvm/lib/CodeGen/ |
| StackMapLivenessAnalysis.cpp | 113 uint32_t *Mask = createRegisterMask();
114 MachineOperand MO = MachineOperand::CreateRegLiveOut(Mask);
118 /// Create a register mask and initialize it with the registers from the
121 // The mask is owned and cleaned up by the Machine Function.
122 uint32_t *Mask = MF->allocateRegisterMask(TRI->getNumRegs());
125 Mask[*RI / 32] |= 1U << (*RI % 32);
126 return Mask;
|
| /art/runtime/base/ |
| bit_field_test.cc | 28 ASSERT_EQ(0x00ffU, TestBitFields::Mask());
|
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineVectorOps.cpp | 327 /// elements from either LHS or RHS, return the shuffle mask and true.
330 SmallVectorImpl<Constant*> &Mask) {
336 Mask.assign(NumElts, UndefValue::get(Type::getInt32Ty(V->getContext())));
342 Mask.push_back(ConstantInt::get(Type::getInt32Ty(V->getContext()), i));
348 Mask.push_back(ConstantInt::get(Type::getInt32Ty(V->getContext()),
366 if (CollectSingleShuffleElements(VecOp, LHS, RHS, Mask)) {
367 // If so, update the mask to reflect the inserted undef.
368 Mask[InsertedIdx] = UndefValue::get(Type::getInt32Ty(V->getContext()));
381 if (CollectSingleShuffleElements(VecOp, LHS, RHS, Mask)) {
382 // If so, update the mask to reflect the inserted value
[all...] |
| /external/llvm/include/llvm/ADT/ |
| SmallBitVector.h | 231 // Mask off previous bits.
310 uintptr_t Mask = EMask - IMask;
311 setSmallBits(getSmallBits() | Mask);
341 uintptr_t Mask = EMask - IMask;
342 setSmallBits(getSmallBits() & ~Mask);
520 /// setBitsInMask - Add '1' bits from Mask to this vector. Don't resize.
521 /// This computes "*this |= Mask".
522 void setBitsInMask(const uint32_t *Mask, unsigned MaskWords = ~0u) {
524 applyMask<true, false>(Mask, MaskWords);
526 getPointer()->setBitsInMask(Mask, MaskWords)
[all...] |
| /external/llvm/lib/Analysis/ |
| AliasAnalysis.cpp | 65 AliasAnalysis::ModRefResult &Mask) {
67 return AA->getArgLocation(CS, ArgIdx, Mask);
95 ModRefResult Mask = ModRef;
97 Mask = Ref;
120 Mask = ModRefResult(Mask & AllArgsMask);
125 if ((Mask & Mod) && pointsToConstantMemory(Loc))
126 Mask = ModRefResult(Mask & ~Mod);
129 if (!AA) return Mask;
[all...] |
| CostModel.cpp | 91 static bool isReverseVectorMask(SmallVectorImpl<int> &Mask) {
92 for (unsigned i = 0, MaskSize = Mask.size(); i < MaskSize; ++i)
93 if (Mask[i] > 0 && Mask[i] != (int)(MaskSize - 1 - i))
98 static bool isAlternateVectorMask(SmallVectorImpl<int> &Mask) {
100 unsigned MaskSize = Mask.size();
104 if (Mask[i] < 0)
106 isAlternate = Mask[i] == (int)((i & 1) ? MaskSize + i : i);
115 if (Mask[i] < 0)
117 isAlternate = Mask[i] == (int)((i & 1) ? i : MaskSize + i)
[all...] |
| NoAliasAnalysis.cpp | 58 ModRefResult &Mask) override {
59 Mask = ModRef;
|
| /external/llvm/utils/PerfectShuffle/ |
| PerfectShuffle.cpp | 28 // Mask manipulation functions.
34 /// getMaskElt - Return element N of the specified mask.
35 static unsigned getMaskElt(unsigned Mask, unsigned Elt) {
36 return (Mask >> ((3-Elt)*4)) & 0xF;
39 static unsigned setMaskElt(unsigned Mask, unsigned Elt, unsigned NewVal) {
41 return (Mask & ~(0xF << FieldShift)) | (NewVal << FieldShift);
45 static bool isValidMask(unsigned short Mask) {
46 unsigned short UndefBits = Mask & 0x8888;
47 return (Mask & ((UndefBits >> 1)|(UndefBits>>2)|(UndefBits>>3))) == 0;
50 /// hasUndefElements - Return true if any of the elements in the mask are undef
[all...] |
