| /external/llvm/lib/Target/Hexagon/ |
| HexagonVarargsCallingConvention.h | 57 State.addLoc(CCValAssign::getReg(ValNo, ValVT.getSimpleVT(), Reg,
69 State.addLoc(CCValAssign::getReg(ValNo, ValVT.getSimpleVT(), Reg,
92 State.addLoc(CCValAssign::getMem(ValNo, ValVT.getSimpleVT(), Offset3,
113 State.addLoc(CCValAssign::getReg(ValNo, ValVT.getSimpleVT(), Reg,
125 State.addLoc(CCValAssign::getReg(ValNo, ValVT.getSimpleVT(), Reg,
138 State.addLoc(CCValAssign::getMem(ValNo, ValVT.getSimpleVT(), Offset3,
|
| HexagonCallingConvLower.cpp | 52 addLoc(CCValAssign::getMem(ValNo, ValVT.getSimpleVT(), Offset,
102 addLoc(CCValAssign::getReg(0, MVT::i32, Reg, MVT::i32,
108 addLoc(CCValAssign::getReg(0, MVT::i64, Reg, MVT::i64,
|
| HexagonCallingConvLower.h | 59 void addLoc(const CCValAssign &V) {
|
| HexagonISelLowering.cpp | 117 State.addLoc(CCValAssign::getMem(ValNo, ValVT, ofst, LocVT, LocInfo));
132 State.addLoc(CCValAssign::getMem(ValNo, ValVT, ofst, LocVT, LocInfo));
137 State.addLoc(CCValAssign::getMem(ValNo, ValVT, ofst, LocVT, LocInfo));
154 State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
192 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
197 State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
206 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
217 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
222 State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
263 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo))
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMCallingConv.h | 35 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo));
42 State.addLoc(CCValAssign::getCustomMem(ValNo, ValVT,
50 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo));
52 State.addLoc(CCValAssign::getCustomMem(ValNo, ValVT,
91 State.addLoc(CCValAssign::getCustomMem(ValNo, ValVT,
106 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo));
107 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, LoRegList[i],
138 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo));
139 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, LoRegList[i],
224 State.addLoc(*It)
[all...] |
| /external/llvm/lib/CodeGen/ |
| CallingConvLower.cpp | 55 addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
|
| /external/llvm/include/llvm/CodeGen/ |
| CallingConvLower.h | 244 void addLoc(const CCValAssign &V) {
|
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 46 State.addLoc(CCValAssign::getCustomMem(ValNo, ValVT,
61 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo));
64 State.addLoc(CCValAssign::getCustomMem(ValNo, ValVT,
72 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo));
74 State.addLoc(CCValAssign::getCustomMem(ValNo, ValVT,
109 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
119 State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
134 State.addLoc(CCValAssign::getReg(ValNo, ValVT, SP::F0 + Offset/4,
147 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg,
150 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo))
[all...] |
| /external/valgrind/main/coregrind/m_debuginfo/ |
| storage.c | 317 static void addLoc ( struct _DebugInfo* di, DiLoc* loc )
328 new_tab = ML_(dinfo_zalloc)( "di.storage.addLoc.1",
460 "addLoc: addr %#lx, size %lu, line %d, file %s\n",
463 addLoc ( di, &loc );
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 330 State.addLoc(CCValAssign::getReg(ValNo++, ArgVT, Reg, LocVT, LocInfo));
[all...] |
| /external/llvm/lib/Target/R600/ |
| AMDGPUISelLowering.cpp | 80 State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
[all...] |
