| /external/llvm/include/llvm/MC/ |
| MCInstBuilder.h | 33 Inst.addOperand(MCOperand::CreateReg(Reg));
39 Inst.addOperand(MCOperand::CreateImm(Val));
45 Inst.addOperand(MCOperand::CreateFPImm(Val));
51 Inst.addOperand(MCOperand::CreateExpr(Val));
57 Inst.addOperand(MCOperand::CreateInst(Val));
|
| /external/llvm/lib/Target/ARM/AsmParser/ |
| ARMAsmParser.cpp | [all...] |
| /external/llvm/lib/Target/Mips/Disassembler/ |
| MipsDisassembler.cpp | 432 MI.addOperand(MCOperand::CreateImm(tmp));
438 MI.addOperand(MCOperand::CreateImm(0));
472 MI.addOperand(MCOperand::CreateReg(getReg(Decoder, Mips::GPR32RegClassID,
475 MI.addOperand(MCOperand::CreateReg(getReg(Decoder, Mips::GPR32RegClassID,
477 MI.addOperand(MCOperand::CreateImm(Imm));
511 MI.addOperand(MCOperand::CreateReg(getReg(Decoder, Mips::GPR32RegClassID,
514 MI.addOperand(MCOperand::CreateReg(getReg(Decoder, Mips::GPR32RegClassID,
516 MI.addOperand(MCOperand::CreateImm(Imm));
553 MI.addOperand(MCOperand::CreateReg(getReg(Decoder, Mips::GPR32RegClassID,
556 MI.addOperand(MCOperand::CreateReg(getReg(Decoder, Mips::GPR32RegClassID
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| R600ISelLowering.cpp | 66 .addOperand(MI->getOperand(0))
67 .addOperand(MI->getOperand(1))
77 .addOperand(MI->getOperand(0))
78 .addOperand(MI->getOperand(1))
89 .addOperand(MI->getOperand(0))
90 .addOperand(MI->getOperand(1))
102 .addOperand(MI->getOperand(0))
135 .addOperand(MI->getOperand(1))
139 .addOperand(MI->getOperand(0))
161 .addOperand(MI->getOperand(3)
[all...] |
| SIISelLowering.cpp | 83 .addOperand(MI->getOperand(0))
84 .addOperand(MI->getOperand(1))
87 .addOperand(MI->getOperand(1))
88 .addOperand(MI->getOperand(1))
98 .addOperand(MI->getOperand(0))
99 .addOperand(MI->getOperand(1))
102 .addOperand(MI->getOperand(1))
103 .addOperand(MI->getOperand(1))
113 .addOperand(MI->getOperand(0))
114 .addOperand(MI->getOperand(1)
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| R600ISelLowering.cpp | 66 .addOperand(MI->getOperand(0))
67 .addOperand(MI->getOperand(1))
77 .addOperand(MI->getOperand(0))
78 .addOperand(MI->getOperand(1))
89 .addOperand(MI->getOperand(0))
90 .addOperand(MI->getOperand(1))
102 .addOperand(MI->getOperand(0))
135 .addOperand(MI->getOperand(1))
139 .addOperand(MI->getOperand(0))
161 .addOperand(MI->getOperand(3)
[all...] |
| SIISelLowering.cpp | 83 .addOperand(MI->getOperand(0))
84 .addOperand(MI->getOperand(1))
87 .addOperand(MI->getOperand(1))
88 .addOperand(MI->getOperand(1))
98 .addOperand(MI->getOperand(0))
99 .addOperand(MI->getOperand(1))
102 .addOperand(MI->getOperand(1))
103 .addOperand(MI->getOperand(1))
113 .addOperand(MI->getOperand(0))
114 .addOperand(MI->getOperand(1)
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMInstrInfo.cpp | 40 NopInst.addOperand(MCOperand::CreateImm(0));
41 NopInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
42 NopInst.addOperand(MCOperand::CreateReg(0));
45 NopInst.addOperand(MCOperand::CreateReg(ARM::R0));
46 NopInst.addOperand(MCOperand::CreateReg(ARM::R0));
47 NopInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
48 NopInst.addOperand(MCOperand::CreateReg(0));
49 NopInst.addOperand(MCOperand::CreateReg(0));
|
| Thumb1InstrInfo.cpp | 30 NopInst.addOperand(MCOperand::CreateReg(ARM::R8));
31 NopInst.addOperand(MCOperand::CreateReg(ARM::R8));
32 NopInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
33 NopInst.addOperand(MCOperand::CreateReg(0));
|
| ARMExpandPseudoInsts.cpp | 85 UseMI.addOperand(MO);
87 DefMI.addOperand(MO);
406 MIB.addOperand(MI.getOperand(OpIdx++));
409 MIB.addOperand(MI.getOperand(OpIdx++));
410 MIB.addOperand(MI.getOperand(OpIdx++));
413 MIB.addOperand(MI.getOperand(OpIdx++));
423 MIB.addOperand(MI.getOperand(OpIdx++));
424 MIB.addOperand(MI.getOperand(OpIdx++));
431 MIB.addOperand(MO);
458 MIB.addOperand(MI.getOperand(OpIdx++))
[all...] |
| /external/llvm/lib/Target/PowerPC/AsmParser/ |
| PPCAsmParser.cpp | 449 Inst.addOperand(MCOperand::CreateReg(RRegs[getReg()]));
454 Inst.addOperand(MCOperand::CreateReg(RRegsNoR0[getReg()]));
459 Inst.addOperand(MCOperand::CreateReg(XRegs[getReg()]));
464 Inst.addOperand(MCOperand::CreateReg(XRegsNoX0[getReg()]));
483 Inst.addOperand(MCOperand::CreateReg(FRegs[getReg()]));
488 Inst.addOperand(MCOperand::CreateReg(FRegs[getReg()]));
493 Inst.addOperand(MCOperand::CreateReg(VRegs[getReg()]));
498 Inst.addOperand(MCOperand::CreateReg(VSRegs[getVSReg()]));
503 Inst.addOperand(MCOperand::CreateReg(VSFRegs[getVSReg()]));
508 Inst.addOperand(MCOperand::CreateReg(CRBITRegs[getCRBit()]))
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| MachineInstrBuilder.h | 68 MI->addOperand(*MF, MachineOperand::CreateReg(RegNo,
84 MI->addOperand(*MF, MachineOperand::CreateImm(Val));
89 MI->addOperand(*MF, MachineOperand::CreateCImm(Val));
94 MI->addOperand(*MF, MachineOperand::CreateFPImm(Val));
100 MI->addOperand(*MF, MachineOperand::CreateMBB(MBB, TargetFlags));
105 MI->addOperand(*MF, MachineOperand::CreateFI(Idx));
112 MI->addOperand(*MF, MachineOperand::CreateCPI(Idx, Offset, TargetFlags));
118 MI->addOperand(*MF, MachineOperand::CreateTargetIndex(Idx, Offset,
125 MI->addOperand(*MF, MachineOperand::CreateJTI(Idx, TargetFlags));
132 MI->addOperand(*MF, MachineOperand::CreateGA(GV, Offset, TargetFlags))
[all...] |
| /external/llvm/lib/Target/SystemZ/Disassembler/ |
| SystemZDisassembler.cpp | 57 Inst.addOperand(MCOperand::CreateReg(RegNo));
112 Inst.addOperand(MCOperand::CreateImm(Imm));
119 Inst.addOperand(MCOperand::CreateImm(SignExtend64<N>(Imm)));
173 Inst.addOperand(MCOperand::CreateImm(SignExtend64<N>(Imm) * 2 + Address));
194 Inst.addOperand(MCOperand::CreateReg(Base == 0 ? 0 : Regs[Base]));
195 Inst.addOperand(MCOperand::CreateImm(Disp));
204 Inst.addOperand(MCOperand::CreateReg(Base == 0 ? 0 : Regs[Base]));
205 Inst.addOperand(MCOperand::CreateImm(SignExtend64<20>(Disp)));
215 Inst.addOperand(MCOperand::CreateReg(Base == 0 ? 0 : Regs[Base]));
216 Inst.addOperand(MCOperand::CreateImm(Disp))
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonSplitConst32AndConst64.cpp | 93 TII->get(Hexagon::LO), DestReg).addOperand(Symbol);
95 TII->get(Hexagon::HI), DestReg).addOperand(Symbol);
106 TII->get(Hexagon::LO_jt), DestReg).addOperand(Symbol);
108 TII->get(Hexagon::HI_jt), DestReg).addOperand(Symbol);
119 TII->get(Hexagon::LO_label), DestReg).addOperand(Symbol);
121 TII->get(Hexagon::HI_label), DestReg).addOperand(Symbol);
|
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsTargetStreamer.cpp | 551 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
554 TmpInst.addOperand(MCOperand::CreateExpr(HiSym));
560 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
561 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
564 TmpInst.addOperand(MCOperand::CreateExpr(LoSym));
570 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
571 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
572 TmpInst.addOperand(MCOperand::CreateReg(RegNo));
593 Inst.addOperand(MCOperand::CreateReg(RegOrOffset));
594 Inst.addOperand(MCOperand::CreateReg(Mips::GP))
[all...] |
| /external/llvm/lib/Target/Mips/AsmParser/ |
| MipsAsmParser.cpp | 534 Inst.addOperand(MCOperand::CreateImm(0));
536 Inst.addOperand(MCOperand::CreateImm(CE->getValue()));
538 Inst.addOperand(MCOperand::CreateExpr(Expr));
550 Inst.addOperand(MCOperand::CreateReg(getGPR32Reg()));
558 Inst.addOperand(MCOperand::CreateReg(getGPR64Reg()));
563 Inst.addOperand(MCOperand::CreateReg(getAFGR64Reg()));
568 Inst.addOperand(MCOperand::CreateReg(getFGR64Reg()));
573 Inst.addOperand(MCOperand::CreateReg(getFGR32Reg()));
582 Inst.addOperand(MCOperand::CreateReg(getFGRH32Reg()));
587 Inst.addOperand(MCOperand::CreateReg(getFCCReg()))
[all...] |
| /external/llvm/lib/Target/X86/Disassembler/ |
| X86Disassembler.cpp | 183 mcInst.addOperand(MCOperand::CreateReg(llvmRegnum));
252 mcInst.addOperand(baseReg);
256 mcInst.addOperand(segmentReg);
277 mcInst.addOperand(baseReg);
359 mcInst.addOperand(MCOperand::CreateReg(X86::XMM0 + (immediate >> 4)));
362 mcInst.addOperand(MCOperand::CreateReg(X86::YMM0 + (immediate >> 4)));
365 mcInst.addOperand(MCOperand::CreateReg(X86::ZMM0 + (immediate >> 4)));
388 mcInst.addOperand(MCOperand::CreateImm(immediate));
394 mcInst.addOperand(segmentReg);
426 mcInst.addOperand(MCOperand::CreateReg(X86::x)); break
[all...] |
| /external/chromium_org/third_party/skia/src/pathops/ |
| SkOpEdgeBuilder.h | 41 void addOperand(const SkPath& path);
|
| /external/llvm/lib/Target/R600/ |
| SILowerI1Copies.cpp | 120 .addOperand(MI.getOperand(0))
123 .addOperand(MI.getOperand(1))
132 .addOperand(MI.getOperand(0))
134 .addOperand(MI.getOperand(1))
|
| /external/llvm/lib/Target/X86/AsmParser/ |
| X86Operand.h | 330 Inst.addOperand(MCOperand::CreateImm(CE->getValue()));
332 Inst.addOperand(MCOperand::CreateExpr(Expr));
337 Inst.addOperand(MCOperand::CreateReg(getReg()));
368 Inst.addOperand(MCOperand::CreateReg(RegNo));
378 Inst.addOperand(MCOperand::CreateReg(getMemBaseReg()));
379 Inst.addOperand(MCOperand::CreateImm(getMemScale()));
380 Inst.addOperand(MCOperand::CreateReg(getMemIndexReg()));
382 Inst.addOperand(MCOperand::CreateReg(getMemSegReg()));
389 Inst.addOperand(MCOperand::CreateImm(CE->getValue()));
391 Inst.addOperand(MCOperand::CreateExpr(getMemDisp()))
[all...] |
| /external/skia/src/pathops/ |
| SkOpEdgeBuilder.h | 41 void addOperand(const SkPath& path);
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZLongBranch.cpp | 352 .addOperand(MI->getOperand(0))
353 .addOperand(MI->getOperand(1))
358 .addOperand(MI->getOperand(2));
371 .addOperand(MI->getOperand(0))
372 .addOperand(MI->getOperand(1));
375 .addOperand(MI->getOperand(2))
376 .addOperand(MI->getOperand(3));
|
| /external/llvm/lib/Target/X86/ |
| X86FixupLEAs.cpp | 111 .addOperand(Dest)
112 .addOperand(Src)
310 .addOperand(Dst)
311 .addOperand(Src1)
312 .addOperand(Src2);
320 .addOperand(Dst)
321 .addOperand(SrcR)
|
| /external/llvm/lib/Target/Mips/ |
| MipsMCInstLower.cpp | 121 Inst.addOperand(Opnd0);
122 Inst.addOperand(Opnd1);
124 Inst.addOperand(Opnd2);
169 OutMI.addOperand(LowerOperand(MI->getOperand(0)));
172 OutMI.addOperand(createSub(MI->getOperand(1).getMBB(),
185 OutMI.addOperand(LowerOperand(MO));
189 OutMI.addOperand(createSub(MI->getOperand(2).getMBB(),
230 OutMI.addOperand(MCOp);
|
| /external/llvm/lib/Target/ARM/Disassembler/ |
| ARMDisassembler.cpp | [all...] |
