| /external/llvm/lib/Target/R600/ |
| R600MachineScheduler.cpp | 161 for (MachineInstr::mop_iterator It = SU->getInstr()->operands_begin(),
162 E = SU->getInstr()->operands_end(); It != E; ++It) {
196 if (isPhysicalRegCopy(SU->getInstr())) {
221 MachineInstr *MI = SU->getInstr();
295 int Opcode = SU->getInstr()->getOpcode();
324 InstructionsGroupCandidate.push_back(SU->getInstr());
326 && (!AnyALU || !TII->isVectorOnly(SU->getInstr()))
396 AssignSlot(UnslotedSU->getInstr(), Slot);
445 InstructionsGroupCandidate.push_back(SU->getInstr());
|
| R600Packetizer.cpp | 189 MachineInstr *MII = SUI->getInstr(), *MIJ = SUJ->getInstr();
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonMachineScheduler.cpp | 30 if (SUnits[su].getInstr()->isCall())
33 else if (SUnits[su].getInstr()->isCompare() && LastSequentialCall)
44 if (!SU || !SU->getInstr())
49 switch (SU->getInstr()->getOpcode()) {
51 if (!ResourcesModel->canReserveResources(SU->getInstr()))
101 switch (SU->getInstr()->getOpcode()) {
103 ResourcesModel->reserveResources(SU->getInstr());
124 DEBUG(Packet[i]->getInstr()->dump());
244 assert(SU->getInstr() && "Scheduled SUnit must have instr");
276 unsigned uops = SchedModel->getNumMicroOps(SU->getInstr());
[all...] |
| HexagonVLIWPacketizer.cpp | 565 if (PacketSU->getInstr()->getDesc().mayStore() ||
568 PacketSU->getInstr()->getOpcode() == Hexagon::ALLOCFRAME ||
569 PacketSU->getInstr()->getOpcode() == Hexagon::DEALLOCFRAME)
665 MachineInstr* TempMI = TempSU->getInstr();
679 TempSU->getInstr()->modifiesRegister(MI->getOperand(opNum).getReg(),
733 MachineInstr *PacketMI = PacketSU->getInstr();
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMHazardRecognizer.cpp | 38 MachineInstr *MI = SU->getInstr();
86 MachineInstr *MI = SU->getInstr();
|
| /external/llvm/lib/CodeGen/ |
| ScheduleDAGInstrs.cpp | 253 const MachineOperand &MO = SU->getInstr()->getOperand(OperIdx);
280 RegUse = UseSU->getInstr();
283 SchedModel.computeOperandLatency(SU->getInstr(), OperIdx, RegUse,
296 MachineInstr *MI = SU->getInstr();
316 !DefSU->getInstr()->registerDefIsDead(*Alias))) {
322 SchedModel.computeOutputLatency(MI, OperIdx, DefSU->getInstr()));
377 const MachineInstr *MI = SU->getInstr();
401 SchedModel.computeOutputLatency(MI, OperIdx, DefSU->getInstr()));
415 MachineInstr *MI = SU->getInstr();
596 isGlobalMemoryObject(AA, SUb->getInstr()))
[all...] |
| SlotIndexes.cpp | 184 MachineInstr *SlotMI = ListI->getInstr();
222 if (itr->getInstr()) {
223 dbgs() << *itr->getInstr();
|
| MachineScheduler.cpp | 671 MachineInstr *MI = SU->getInstr();
[all...] |
| DFAPacketizer.cpp | 171 MIToSUnit[SU->getInstr()] = SU;
|
| CriticalAntiDepBreaker.cpp | 465 MISUnitMap[SU->getInstr()] = SU;
486 MachineInstr *CriticalPathMI = CriticalPathSU->getInstr();
597 CriticalPathMI = CriticalPathSU->getInstr();
|
| AggressiveAntiDepBreaker.cpp | 731 MISUnitMap.insert(std::pair<MachineInstr *, const SUnit *>(SU->getInstr(),
750 CriticalPathMI = CriticalPathSU->getInstr();
795 CriticalPathMI = (CriticalPathSU) ? CriticalPathSU->getInstr() : nullptr;
[all...] |
| PostRASchedulerList.cpp | 646 BB->splice(RegionEnd, BB, SU->getInstr());
|
| /external/llvm/include/llvm/CodeGen/ |
| SlotIndexes.h | 46 MachineInstr* getInstr() const { return mi; }
424 return index.isValid() ? index.listEntry()->getInstr() : nullptr;
433 if (I->getInstr())
616 assert(miEntry->getInstr() == mi && "Instruction indexes broken.");
631 assert(miEntry->getInstr() == mi &&
|
| ScheduleDAGInstrs.h | 176 SU->SchedClass = SchedModel.resolveSchedClass(SU->getInstr());
|
| ScheduleDAG.h | 398 /// getInstr - Return the representative MachineInstr for this SUnit.
400 MachineInstr *getInstr() const {
579 if (SU->isInstr()) return &SU->getInstr()->getDesc();
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCHazardRecognizers.cpp | 328 MachineInstr *MI = SU->getInstr();
386 MachineInstr *MI = SU->getInstr();
|
| /external/llvm/lib/Transforms/Vectorize/ |
| LoopVectorize.cpp | 229 Instruction *getInstr() { return Instr; }
779 if (Instruction *I = Message.getInstr())
[all...] |
| /prebuilts/tools/common/m2/repository/com/cenqua/clover/clover/3.1.12/ |
| clover-3.1.12.jar | |
