| /external/llvm/lib/IR/ |
| ValueTypes.cpp | 247 MVT MVT::getVT(Type *Ty, bool HandleUnknown){
267 getVT(VTy->getElementType(), false), VTy->getNumElements());
278 return MVT::getVT(Ty, HandleUnknown);
|
| /external/llvm/utils/TableGen/ |
| DAGISelMatcherEmitter.cpp | 439 << getEnumName(cast<EmitIntegerMatcher>(N)->getVT()) << ", ";
448 << getEnumName(cast<EmitStringIntegerMatcher>(N)->getVT()) << ", "
459 OS << "OPC_EmitRegister2, " << getEnumName(Matcher->getVT()) << ", ";
463 OS << "OPC_EmitRegister, " << getEnumName(Matcher->getVT()) << ", ";
532 OS << getEnumName(EN->getVT(i)) << ", ";
|
| DAGISelMatcher.h | 836 MVT::SimpleValueType getVT() const { return VT; }
861 MVT::SimpleValueType getVT() const { return VT; }
887 MVT::SimpleValueType getVT() const { return VT; }
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| MachineValueType.h | 573 static MVT getVT(Type *Ty, bool HandleUnknown = false);
|
| SelectionDAGNodes.h | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 453 OS << ":" << N->getVT().getEVTString();
|
| LegalizeVectorOps.cpp | 303 QueryType = cast<VTSDNode>(Node->getOperand(1))->getVT();
729 EVT OrigTy = cast<VTSDNode>(Op->getOperand(1))->getVT();
[all...] |
| TargetLowering.cpp | [all...] |
| SelectionDAG.cpp | 730 EVT VT = cast<VTSDNode>(N)->getVT();
[all...] |
| LegalizeVectorTypes.cpp | 243 EVT ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT().getVectorElementType();
842 DAG.GetSplitDestVTs(cast<VTSDNode>(N->getOperand(1))->getVT());
[all...] |
| LegalizeIntegerTypes.cpp | [all...] |
| SelectionDAGISel.cpp | [all...] |
| LegalizeDAG.cpp | [all...] |
| DAGCombiner.cpp | [all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 426 EVT BVT = BaseType->getVT();
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 426 EVT BVT = BaseType->getVT();
|
| /external/llvm/lib/Target/Mips/ |
| MipsSEISelLowering.cpp | 571 EVT ExtendTy = cast<VTSDNode>(Op0Op2)->getVT();
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelDAGToDAG.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelDAGToDAG.cpp | 347 SrcVT = cast<VTSDNode>(N.getOperand(1))->getVT();
[all...] |
| AArch64ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/R600/ |
| AMDGPUISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
