| /external/llvm/include/llvm/CodeGen/ |
| MachineValueType.h | 59 v4i1 = 14, // 4 x i1 enumerator in enum:llvm::MVT::SimpleValueType
269 case v4i1 :
335 case v4i1:
377 case v4i1: return 4;
511 if (NumElements == 4) return MVT::v4i1;
|
| /external/llvm/lib/Target/X86/ |
| X86TargetTransformInfo.cpp | 577 { ISD::SIGN_EXTEND, MVT::v4i64, MVT::v4i1, 3 },
578 { ISD::ZERO_EXTEND, MVT::v4i64, MVT::v4i1, 3 },
604 { ISD::SIGN_EXTEND, MVT::v4i64, MVT::v4i1, 6 },
605 { ISD::ZERO_EXTEND, MVT::v4i64, MVT::v4i1, 4 },
625 { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i1, 3 },
629 { ISD::SINT_TO_FP, MVT::v4f64, MVT::v4i1, 3 },
638 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i1, 7 },
642 { ISD::UINT_TO_FP, MVT::v4f64, MVT::v4i1, 7 },
[all...] |
| /external/llvm/lib/IR/ |
| ValueTypes.cpp | 132 case MVT::v4i1: return "v4i1";
200 case MVT::v4i1: return VectorType::get(Type::getInt1Ty(Context), 4);
|
| /external/llvm/lib/Target/ARM/ |
| ARMTargetTransformInfo.cpp | 248 { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i1, 3 },
249 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i1, 3 },
407 { ISD::SELECT, MVT::v4i1, MVT::v4i64, 4*4 + 1*2 + 1 },
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64TargetTransformInfo.cpp | 454 { ISD::SELECT, MVT::v4i1, MVT::v4i64, 4 * AmortizationCost },
|
| /external/llvm/utils/TableGen/ |
| CodeGenTarget.cpp | 73 case MVT::v4i1: return "MVT::v4i1";
|
| /external/llvm/lib/Target/R600/ |
| SIISelLowering.cpp | 115 setOperationAction(ISD::SETCC, MVT::v4i1, Expand);
119 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::v4i1, Custom);
[all...] |
| AMDGPUISelLowering.cpp | 179 setTruncStoreAction(MVT::v4i64, MVT::v4i1, Expand);
[all...] |
| R600ISelLowering.cpp | 96 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::v4i1, Expand);
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | 56 case MVT::v4i1:
[all...] |
