| /external/llvm/test/MC/ARM/ |
| basic-thumb2-instructions.s | 22 adcs r0, r1, #0
32 @ CHECK: adcs r0, r1, #0 @ encoding: [0x51,0xf1,0x00,0x00]
45 adcs r4, r5, r6
47 adcs.w r9, r1, r3
49 adcs r0, r1, r3, lsl #7
51 adcs.w r0, r1, r3, asr #32
55 @ CHECK: adcs.w r4, r5, r6 @ encoding: [0x55,0xeb,0x06,0x04]
57 @ CHECK: adcs.w r9, r1, r3 @ encoding: [0x51,0xeb,0x03,0x09]
59 @ CHECK: adcs.w r0, r1, r3, lsl #7 @ encoding: [0x51,0xeb,0xc3,0x10]
61 @ CHECK: adcs.w r0, r1, r3, asr #32 @ encoding: [0x51,0xeb,0x23,0x00
[all...] |
| basic-thumb-instructions.s | 26 adcs r4, r6
28 @ CHECK: adcs r4, r6 @ encoding: [0x74,0x41]
|
| basic-arm-instructions.s | 27 adcs r1, r2, #0xf00
41 @ CHECK: adcs r1, r2, #3840 @ encoding: [0x0f,0x1c,0xb2,0xe2]
[all...] |
| /external/chromium_org/v8/test/cctest/ |
| test-assembler-arm64.cc | [all...] |
| /external/vixl/test/ |
| test-assembler-a64.cc | [all...] |
| /external/chromium_org/v8/src/arm64/ |
| disasm-arm64.cc | 192 case ADCS_x: mnemonic = "adcs"; break;
[all...] |
| macro-assembler-arm64-inl.h | 237 void MacroAssembler::Adcs(const Register& rd,
[all...] |
| assembler-arm64.cc | 916 void Assembler::adcs(const Register& rd, function in class:v8::internal::Assembler
[all...] |
| assembler-arm64.h | [all...] |
| macro-assembler-arm64.h | 175 inline void Adcs(const Register& rd,
[all...] |
| /external/vixl/src/a64/ |
| disasm-a64.cc | 199 case ADCS_x: mnemonic = "adcs"; break;
[all...] |
| macro-assembler-a64.cc | 632 void MacroAssembler::Adcs(const Register& rd,
[all...] |
| macro-assembler-a64.h | 159 void Adcs(const Register& rd,
[all...] |
| assembler-a64.cc | 604 void Assembler::adcs(const Register& rd, function in class:vixl::Assembler
[all...] |
| assembler-a64.h | 777 void adcs(const Register& rd,
[all...] |
| /external/llvm/test/MC/Disassembler/ARM/ |
| thumb2.txt | 7 # CHECK: adcs r0, r1, #0
30 # CHECK: adcs.w r4, r5, r6
32 # CHECK: adcs.w r9, r1, r3
34 # CHECK: adcs.w r0, r1, r3, lsl #7
36 # CHECK: adcs.w r0, r1, r3, asr #32
[all...] |
| thumb1.txt | 6 # CHECK: adcs r4, r6
|
| basic-arm-instructions.txt | 15 # CHECK: adcs r1, r2, #3840
[all...] |
| /external/qemu/disas/ |
| i386.c | 757 { "adcS", { Ev, Gv } },
759 { "adcS", { Gv, Ev } },
761 { "adcS", { eAX, Iv } },
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 662 case AArch64ISD::ADCS: return "AArch64ISD::ADCS";
[all...] |
| AArch64InstrInfo.td | 144 def AArch64adc_flag : SDNode<"AArch64ISD::ADCS", SDTBinaryArithWithFlagsInOut>;
503 defm ADC : AddSubCarry<0, "adc", "adcs", AArch64adc, AArch64adc_flag>;
[all...] |
| /prebuilts/sdk/tools/linux/ |
| libLLVM.so | |
| /art/compiler/utils/ |
| assembler_thumb_test_expected.cc.inc | 37 " 30: 4148 adcs r0, r1\n",
[all...] |
| /external/lldb/source/Plugins/Instruction/ARM/ |
| EmulateInstructionARM.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | [all...] |
