| /external/vixl/src/a64/ |
| assembler-a64.cc | 901 DataProcessing3Source(rd, rn, rm, AppropriateZeroRegFor(rd), MSUB);
905 void Assembler::msub(const Register& rd, function in class:vixl::Assembler
909 DataProcessing3Source(rd, rn, rm, ra, MSUB);
[all...] |
| macro-assembler-a64.h | 835 void Msub(const Register& rd,
844 msub(rd, rn, rm, ra);
[all...] |
| constants-a64.h | [all...] |
| /external/chromium_org/v8/src/arm64/ |
| macro-assembler-arm64-inl.h | 979 void MacroAssembler::Msub(const Register& rd,
985 msub(rd, rn, rm, ra);
[all...] |
| constants-arm64.h | [all...] |
| assembler-arm64.cc | 1227 void Assembler::msub(const Register& rd, function in class:v8::internal::Assembler
[all...] |
| disasm-arm64.cc | 636 mnemonic = "msub";
[all...] |
| /external/llvm/test/MC/AArch64/ |
| basic-a64-instructions.s | [all...] |
| /external/clang/test/CodeGen/ |
| builtins-mips.c | 63 // CHECK: call i64 @llvm.mips.msub
|
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.h | 85 MSub,
|
| MipsDSPInstrInfo.td | [all...] |
| /external/llvm/test/MC/Mips/mips64/ |
| valid.s | 149 msub $s7,$k1
|
| /system/core/libpixelflinger/codeflinger/ |
| MIPSAssembler.h | 282 void MSUB(int Rs, int Rt); // hi,lo = hi,lo - Rs * Rt
|
| mips_disassem.c | 91 /* 0x00 */ "madd", "maddu", "mul", "spec3", "msub", "msubu", "rsrv6", "rsrv7",
|
| /external/valgrind/main/VEX/priv/ |
| host_mips_defs.c | 695 ret = "msub.d";
701 ret = "msub.s";
1172 ret = variable ? "msub" : "msubu";
1253 /* msub */
[all...] |
| guest_mips_toIR.c | [all...] |
| /external/chromium_org/third_party/webrtc/modules/audio_processing/aec/ |
| aec_rdft_mips.c | 478 "msub.s %[x3i], %[x3i], %[wk2r], %[f0] \n\t"
[all...] |
| /external/llvm/test/MC/Disassembler/AArch64/ |
| basic-a64-instructions.txt | 1143 # CHECK: msub w1, w3, w7, w4
1144 # CHECK: msub wzr, w0, w9, w11
1145 # CHECK: msub w13, wzr, w4, w4
1146 # CHECK: msub w19, w30, wzr, w29
1154 # CHECK: msub x1, x3, x7, x4
1155 # CHECK: msub xzr, x0, x9, x11
1156 # CHECK: msub x13, xzr, x4, x4
1157 # CHECK: msub x19, x30, xzr, x29
[all...] |
| /art/compiler/dex/quick/arm64/ |
| arm64_lir.h | 320 kA64Msub4rrrr, // msub[s0011011000] rm[20-16] [1] ra[14-10] rn[9-5] rd[4-0].
|
| assemble_arm64.cc | 468 "msub", "!0r, !1r, !3r, !2r", kFixupNone),
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64SchedCyclone.td | 188 // MUL/MNEG are aliases for MADD/MSUB.
|
| /external/chromium_org/chrome/browser/resources/chromeos/chromevox/common/ |
| math_semantic_tree.js | 412 case 'MSUB':
[all...] |
| /external/qemu/disas/ |
| mips.c | [all...] |
| /external/chromium_org/third_party/icu/source/i18n/ |
| decNumber.c | 805 const Unit *msua, *msub; \/* -> operand msus *\/ local
1817 const Unit *msua, *msub; \/* -> operand msus *\/ local
3243 const Unit *msua, *msub; \/* -> operand msus *\/ local
[all...] |
| /external/icu/icu4c/source/i18n/ |
| decNumber.c | 820 const Unit *msua, *msub; \/* -> operand msus *\/ local
1836 const Unit *msua, *msub; \/* -> operand msus *\/ local
3266 const Unit *msua, *msub; \/* -> operand msus *\/ local
[all...] |
