/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/MCTargetDesc/ |
R600MCCodeEmitter.cpp | 250 MCOperand ImmOp = MI.getOperand(ImmOpIndex); 251 if (ImmOp.isFPImm()) { 252 Value.f = ImmOp.getFPImm(); 254 assert(ImmOp.isImm()); 255 Value.i = ImmOp.getImm();
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/external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/ |
R600MCCodeEmitter.cpp | 250 MCOperand ImmOp = MI.getOperand(ImmOpIndex); 251 if (ImmOp.isFPImm()) { 252 Value.f = ImmOp.getFPImm(); 254 assert(ImmOp.isImm()); 255 Value.i = ImmOp.getImm();
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/external/llvm/lib/Target/ARM/ |
Thumb1RegisterInfo.cpp | 449 MachineOperand &ImmOp = MI.getOperand(ImmIdx); 456 ImmOp.ChangeToImmediate(ImmedOffset); 473 ImmOp.ChangeToImmediate(0); 477 ImmOp.ChangeToImmediate(ImmedOffset);
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Thumb2InstrInfo.cpp | 582 MachineOperand &ImmOp = MI.getOperand(FrameRegIdx+1); 598 ImmOp.ChangeToImmediate(ImmedOffset); 616 ImmOp.ChangeToImmediate(ImmedOffset);
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ARMBaseInstrInfo.cpp | [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonInstrInfoV4.td | 836 Operand ImmOp, Operand predImmOp, bits<5> ImmBits, 843 (ins IntRegs:$src1, ImmOp:$src2, RC:$src3), [all...] |
HexagonInstrInfo.td | [all...] |
/external/llvm/lib/Target/X86/AsmParser/ |
X86Operand.h | 45 struct ImmOp { 61 struct ImmOp Imm;
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/external/llvm/lib/Target/Mips/AsmParser/ |
MipsAsmParser.cpp | 362 struct ImmOp { 375 struct ImmOp Imm; [all...] |
/external/llvm/lib/Target/X86/ |
X86MCInstLower.cpp | 241 unsigned ImmOp = Inst.getNumOperands() - 1; 243 (Inst.getOperand(ImmOp).isImm() || Inst.getOperand(ImmOp).isExpr()) && 254 MCOperand Saved = Inst.getOperand(ImmOp); [all...] |
/external/llvm/lib/Target/Sparc/AsmParser/ |
SparcAsmParser.cpp | 162 struct ImmOp { 175 struct ImmOp Imm;
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/external/llvm/lib/Target/Mips/ |
MipsDSPInstrInfo.td | 369 SDPatternOperator ImmOp, InstrItinClass itin> { 374 (OpNode GPR32Opnd:$src, GPR32Opnd:$rs, ImmOp:$sa))]; [all...] |
MipsSEISelLowering.cpp | [all...] |
/external/llvm/lib/Target/AArch64/AsmParser/ |
AArch64AsmParser.cpp | 188 struct ImmOp { 240 struct ImmOp Imm; [all...] |
/external/llvm/lib/Target/PowerPC/AsmParser/ |
PPCAsmParser.cpp | 309 struct ImmOp { 324 struct ImmOp Imm; [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcInstrInfo.td | 250 RegisterClass RC, ValueType Ty, Operand immOp> { 256 (outs RC:$rd), (ins RC:$rs1, immOp:$simm13), [all...] |
/external/llvm/lib/Target/ARM/AsmParser/ |
ARMAsmParser.cpp | 459 struct ImmOp { 524 struct ImmOp Imm; [all...] |
/external/chromium_org/third_party/yasm/source/patched-yasm/modules/arch/x86/ |
gen_x86_insn.py | 7406 immop = Operand(type="Imm", size=8, relaxed=True, dest="Imm") variable [all...] |