| /art/compiler/dex/quick/arm/ |
| codegen_arm.h | 30 bool SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, RegLocation rl_src,
112 RegLocation GenDivRem(RegLocation rl_dest, RegStorage reg_lo, RegStorage reg_hi, bool is_div);
113 RegLocation GenDivRemLit(RegLocation rl_dest, RegStorage reg_lo, int lit, bool is_div);
204 bool is_div, bool check_zero);
205 RegLocation GenDivRemLit(RegLocation rl_dest, RegLocation rl_src1, int lit, bool is_div);
|
| int_arm.cc | 492 bool ArmMir2Lir::SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div,
511 RegStorage r_div_result = is_div ? rl_result.reg : r_hi;
533 if (!is_div) {
677 RegLocation rl_src2, bool is_div, bool check_zero) {
682 RegLocation ArmMir2Lir::GenDivRemLit(RegLocation rl_dest, RegLocation rl_src1, int lit, bool is_div) {
687 RegLocation ArmMir2Lir::GenDivRemLit(RegLocation rl_dest, RegStorage reg1, int lit, bool is_div) {
695 rl_result = GenDivRem(rl_result, reg1, lit_temp, is_div);
702 bool is_div) {
704 if (is_div) {
[all...] |
| /art/compiler/dex/quick/mips/ |
| codegen_mips.h | 30 bool SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, RegLocation rl_src,
111 RegLocation GenDivRem(RegLocation rl_dest, RegStorage reg_lo, RegStorage reg_hi, bool is_div);
112 RegLocation GenDivRemLit(RegLocation rl_dest, RegStorage reg_lo, int lit, bool is_div);
193 RegLocation rl_src2, bool is_div, bool check_zero);
194 RegLocation GenDivRemLit(RegLocation rl_dest, RegLocation rl_src1, int lit, bool is_div);
|
| int_mips.cc | 239 bool is_div) {
242 if (is_div) {
251 bool is_div) {
256 if (is_div) {
266 RegLocation rl_src2, bool is_div, bool check_zero) {
271 RegLocation MipsMir2Lir::GenDivRemLit(RegLocation rl_dest, RegLocation rl_src1, int lit, bool is_div) {
374 bool MipsMir2Lir::SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div,
|
| /art/compiler/dex/quick/arm64/ |
| codegen_arm64.h | 66 bool SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, RegLocation rl_src,
68 bool HandleEasyDivRem(Instruction::Code dalvik_opcode, bool is_div,
70 bool HandleEasyDivRem64(Instruction::Code dalvik_opcode, bool is_div,
175 RegLocation GenDivRem(RegLocation rl_dest, RegStorage reg_lo, RegStorage reg_hi, bool is_div)
177 RegLocation GenDivRemLit(RegLocation rl_dest, RegStorage reg_lo, int lit, bool is_div)
343 bool is_div, bool check_zero);
344 RegLocation GenDivRemLit(RegLocation rl_dest, RegLocation rl_src1, int lit, bool is_div);
347 bool SmallLiteralDivRem64(Instruction::Code dalvik_opcode, bool is_div, RegLocation rl_src,
393 RegLocation rl_src2, bool is_div);
|
| int_arm64.cc | 403 bool Arm64Mir2Lir::SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div,
413 if (!is_div) {
447 bool Arm64Mir2Lir::SmallLiteralDivRem64(Instruction::Code dalvik_opcode, bool is_div,
457 if (!is_div) {
514 bool Arm64Mir2Lir::HandleEasyDivRem(Instruction::Code dalvik_opcode, bool is_div,
516 return HandleEasyDivRem64(dalvik_opcode, is_div, rl_src, rl_dest, static_cast<int>(lit));
521 bool Arm64Mir2Lir::HandleEasyDivRem64(Instruction::Code dalvik_opcode, bool is_div,
531 return SmallLiteralDivRem64(dalvik_opcode, is_div, rl_src, rl_dest, lit);
533 return SmallLiteralDivRem(dalvik_opcode, is_div, rl_src, rl_dest, static_cast<int32_t>(lit));
555 if (is_div) {
[all...] |
| /art/compiler/dex/quick/x86/ |
| int_x86.cc | 596 RegLocation X86Mir2Lir::GenDivRemLit(RegLocation rl_dest, RegStorage reg_lo, int lit, bool is_div) {
602 int imm, bool is_div) {
608 if (is_div) {
617 if (is_div) {
631 } else if (is_div && IsPowerOfTwo(std::abs(imm))) {
684 if (!is_div || (imm > 0 && magic < 0) || (imm < 0 && magic > 0)) {
727 if (!is_div) {
748 bool is_div) {
754 RegLocation rl_src2, bool is_div, bool check_zero) {
782 if (!is_div) {
[all...] |
| codegen_x86.h | 67 bool SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, RegLocation rl_src,
229 RegLocation GenDivRem(RegLocation rl_dest, RegStorage reg_lo, RegStorage reg_hi, bool is_div)
231 RegLocation GenDivRemLit(RegLocation rl_dest, RegStorage reg_lo, int lit, bool is_div) OVERRIDE;
508 void GenDivRemLongLit(RegLocation rl_dest, RegLocation rl_src, int64_t imm, bool is_div);
[all...] |
| /art/compiler/dex/quick/ |
| gen_common.cc | 1653 bool is_div = false; local
[all...] |
| mir_to_lir.h | [all...] |
| /art/compiler/dex/portable/ |
| mir_to_gbc.h | 121 ::llvm::Value* GenDivModOp(bool is_div, bool is_long, ::llvm::Value* src1,
|
| mir_to_gbc.cc | 363 ::llvm::Value* MirConverter::GenDivModOp(bool is_div, bool is_long,
367 if (is_div) {
373 if (is_div) {
[all...] |
| /art/compiler/llvm/ |
| gbc_expander.cc | 298 llvm::Value* Expand_DivRem(llvm::CallInst& call_inst, bool is_div, JType op_jty);
[all...] |
| /external/valgrind/main/none/tests/ppc32/ |
| jm-insns.c | 4729 int i, j, is_div; local
[all...] |
