1 /* 2 * Copyright (C) 2014 The Android Open Source Project 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 #include "globals.h" 18 #include "assembler_arm64.h" 19 #include "managed_register_arm64.h" 20 #include "gtest/gtest.h" 21 22 namespace art { 23 namespace arm64 { 24 25 TEST(Arm64ManagedRegister, NoRegister) { 26 Arm64ManagedRegister reg = ManagedRegister::NoRegister().AsArm64(); 27 EXPECT_TRUE(reg.IsNoRegister()); 28 EXPECT_TRUE(!reg.Overlaps(reg)); 29 } 30 31 // X Register test. 32 TEST(Arm64ManagedRegister, CoreRegister) { 33 Arm64ManagedRegister reg = Arm64ManagedRegister::FromCoreRegister(X0); 34 Arm64ManagedRegister wreg = Arm64ManagedRegister::FromWRegister(W0); 35 EXPECT_TRUE(!reg.IsNoRegister()); 36 EXPECT_TRUE(reg.IsCoreRegister()); 37 EXPECT_TRUE(!reg.IsWRegister()); 38 EXPECT_TRUE(!reg.IsDRegister()); 39 EXPECT_TRUE(!reg.IsSRegister()); 40 EXPECT_TRUE(reg.Overlaps(wreg)); 41 EXPECT_EQ(X0, reg.AsCoreRegister()); 42 43 reg = Arm64ManagedRegister::FromCoreRegister(X1); 44 wreg = Arm64ManagedRegister::FromWRegister(W1); 45 EXPECT_TRUE(!reg.IsNoRegister()); 46 EXPECT_TRUE(reg.IsCoreRegister()); 47 EXPECT_TRUE(!reg.IsWRegister()); 48 EXPECT_TRUE(!reg.IsDRegister()); 49 EXPECT_TRUE(!reg.IsSRegister()); 50 EXPECT_TRUE(reg.Overlaps(wreg)); 51 EXPECT_EQ(X1, reg.AsCoreRegister()); 52 53 reg = Arm64ManagedRegister::FromCoreRegister(X7); 54 wreg = Arm64ManagedRegister::FromWRegister(W7); 55 EXPECT_TRUE(!reg.IsNoRegister()); 56 EXPECT_TRUE(reg.IsCoreRegister()); 57 EXPECT_TRUE(!reg.IsWRegister()); 58 EXPECT_TRUE(!reg.IsDRegister()); 59 EXPECT_TRUE(!reg.IsSRegister()); 60 EXPECT_TRUE(reg.Overlaps(wreg)); 61 EXPECT_EQ(X7, reg.AsCoreRegister()); 62 63 reg = Arm64ManagedRegister::FromCoreRegister(X15); 64 wreg = Arm64ManagedRegister::FromWRegister(W15); 65 EXPECT_TRUE(!reg.IsNoRegister()); 66 EXPECT_TRUE(reg.IsCoreRegister()); 67 EXPECT_TRUE(!reg.IsWRegister()); 68 EXPECT_TRUE(!reg.IsDRegister()); 69 EXPECT_TRUE(!reg.IsSRegister()); 70 EXPECT_TRUE(reg.Overlaps(wreg)); 71 EXPECT_EQ(X15, reg.AsCoreRegister()); 72 73 reg = Arm64ManagedRegister::FromCoreRegister(X19); 74 wreg = Arm64ManagedRegister::FromWRegister(W19); 75 EXPECT_TRUE(!reg.IsNoRegister()); 76 EXPECT_TRUE(reg.IsCoreRegister()); 77 EXPECT_TRUE(!reg.IsWRegister()); 78 EXPECT_TRUE(!reg.IsDRegister()); 79 EXPECT_TRUE(!reg.IsSRegister()); 80 EXPECT_TRUE(reg.Overlaps(wreg)); 81 EXPECT_EQ(X19, reg.AsCoreRegister()); 82 83 reg = Arm64ManagedRegister::FromCoreRegister(X16); 84 wreg = Arm64ManagedRegister::FromWRegister(W16); 85 EXPECT_TRUE(!reg.IsNoRegister()); 86 EXPECT_TRUE(reg.IsCoreRegister()); 87 EXPECT_TRUE(!reg.IsWRegister()); 88 EXPECT_TRUE(!reg.IsDRegister()); 89 EXPECT_TRUE(!reg.IsSRegister()); 90 EXPECT_TRUE(reg.Overlaps(wreg)); 91 EXPECT_EQ(IP0, reg.AsCoreRegister()); 92 93 reg = Arm64ManagedRegister::FromCoreRegister(SP); 94 wreg = Arm64ManagedRegister::FromWRegister(WZR); 95 EXPECT_TRUE(!reg.IsNoRegister()); 96 EXPECT_TRUE(reg.IsCoreRegister()); 97 EXPECT_TRUE(!reg.IsWRegister()); 98 EXPECT_TRUE(!reg.IsDRegister()); 99 EXPECT_TRUE(!reg.IsSRegister()); 100 EXPECT_TRUE(reg.Overlaps(wreg)); 101 EXPECT_EQ(SP, reg.AsCoreRegister()); 102 } 103 104 // W register test. 105 TEST(Arm64ManagedRegister, WRegister) { 106 Arm64ManagedRegister reg = Arm64ManagedRegister::FromWRegister(W0); 107 Arm64ManagedRegister xreg = Arm64ManagedRegister::FromCoreRegister(X0); 108 EXPECT_TRUE(!reg.IsNoRegister()); 109 EXPECT_TRUE(!reg.IsCoreRegister()); 110 EXPECT_TRUE(reg.IsWRegister()); 111 EXPECT_TRUE(!reg.IsDRegister()); 112 EXPECT_TRUE(!reg.IsSRegister()); 113 EXPECT_TRUE(reg.Overlaps(xreg)); 114 EXPECT_EQ(W0, reg.AsWRegister()); 115 116 reg = Arm64ManagedRegister::FromWRegister(W5); 117 xreg = Arm64ManagedRegister::FromCoreRegister(X5); 118 EXPECT_TRUE(!reg.IsNoRegister()); 119 EXPECT_TRUE(!reg.IsCoreRegister()); 120 EXPECT_TRUE(reg.IsWRegister()); 121 EXPECT_TRUE(!reg.IsDRegister()); 122 EXPECT_TRUE(!reg.IsSRegister()); 123 EXPECT_TRUE(reg.Overlaps(xreg)); 124 EXPECT_EQ(W5, reg.AsWRegister()); 125 126 reg = Arm64ManagedRegister::FromWRegister(W6); 127 xreg = Arm64ManagedRegister::FromCoreRegister(X6); 128 EXPECT_TRUE(!reg.IsNoRegister()); 129 EXPECT_TRUE(!reg.IsCoreRegister()); 130 EXPECT_TRUE(reg.IsWRegister()); 131 EXPECT_TRUE(!reg.IsDRegister()); 132 EXPECT_TRUE(!reg.IsSRegister()); 133 EXPECT_TRUE(reg.Overlaps(xreg)); 134 EXPECT_EQ(W6, reg.AsWRegister()); 135 136 reg = Arm64ManagedRegister::FromWRegister(W18); 137 xreg = Arm64ManagedRegister::FromCoreRegister(X18); 138 EXPECT_TRUE(!reg.IsNoRegister()); 139 EXPECT_TRUE(!reg.IsCoreRegister()); 140 EXPECT_TRUE(reg.IsWRegister()); 141 EXPECT_TRUE(!reg.IsDRegister()); 142 EXPECT_TRUE(!reg.IsSRegister()); 143 EXPECT_TRUE(reg.Overlaps(xreg)); 144 EXPECT_EQ(W18, reg.AsWRegister()); 145 146 reg = Arm64ManagedRegister::FromWRegister(W29); 147 xreg = Arm64ManagedRegister::FromCoreRegister(FP); 148 EXPECT_TRUE(!reg.IsNoRegister()); 149 EXPECT_TRUE(!reg.IsCoreRegister()); 150 EXPECT_TRUE(reg.IsWRegister()); 151 EXPECT_TRUE(!reg.IsDRegister()); 152 EXPECT_TRUE(!reg.IsSRegister()); 153 EXPECT_TRUE(reg.Overlaps(xreg)); 154 EXPECT_EQ(W29, reg.AsWRegister()); 155 156 reg = Arm64ManagedRegister::FromWRegister(WZR); 157 xreg = Arm64ManagedRegister::FromCoreRegister(SP); 158 EXPECT_TRUE(!reg.IsNoRegister()); 159 EXPECT_TRUE(!reg.IsCoreRegister()); 160 EXPECT_TRUE(reg.IsWRegister()); 161 EXPECT_TRUE(!reg.IsDRegister()); 162 EXPECT_TRUE(!reg.IsSRegister()); 163 EXPECT_TRUE(reg.Overlaps(xreg)); 164 EXPECT_EQ(W31, reg.AsWRegister()); 165 } 166 167 // D Register test. 168 TEST(Arm64ManagedRegister, DRegister) { 169 Arm64ManagedRegister reg = Arm64ManagedRegister::FromDRegister(D0); 170 Arm64ManagedRegister sreg = Arm64ManagedRegister::FromSRegister(S0); 171 EXPECT_TRUE(!reg.IsNoRegister()); 172 EXPECT_TRUE(!reg.IsCoreRegister()); 173 EXPECT_TRUE(!reg.IsWRegister()); 174 EXPECT_TRUE(reg.IsDRegister()); 175 EXPECT_TRUE(!reg.IsSRegister()); 176 EXPECT_TRUE(reg.Overlaps(sreg)); 177 EXPECT_EQ(D0, reg.AsDRegister()); 178 EXPECT_EQ(S0, reg.AsOverlappingDRegisterLow()); 179 EXPECT_TRUE(reg.Equals(Arm64ManagedRegister::FromDRegister(D0))); 180 181 reg = Arm64ManagedRegister::FromDRegister(D1); 182 sreg = Arm64ManagedRegister::FromSRegister(S1); 183 EXPECT_TRUE(!reg.IsNoRegister()); 184 EXPECT_TRUE(!reg.IsCoreRegister()); 185 EXPECT_TRUE(!reg.IsWRegister()); 186 EXPECT_TRUE(reg.IsDRegister()); 187 EXPECT_TRUE(!reg.IsSRegister()); 188 EXPECT_TRUE(reg.Overlaps(sreg)); 189 EXPECT_EQ(D1, reg.AsDRegister()); 190 EXPECT_EQ(S1, reg.AsOverlappingDRegisterLow()); 191 EXPECT_TRUE(reg.Equals(Arm64ManagedRegister::FromDRegister(D1))); 192 193 reg = Arm64ManagedRegister::FromDRegister(D20); 194 sreg = Arm64ManagedRegister::FromSRegister(S20); 195 EXPECT_TRUE(!reg.IsNoRegister()); 196 EXPECT_TRUE(!reg.IsCoreRegister()); 197 EXPECT_TRUE(!reg.IsWRegister()); 198 EXPECT_TRUE(reg.IsDRegister()); 199 EXPECT_TRUE(!reg.IsSRegister()); 200 EXPECT_TRUE(reg.Overlaps(sreg)); 201 EXPECT_EQ(D20, reg.AsDRegister()); 202 EXPECT_EQ(S20, reg.AsOverlappingDRegisterLow()); 203 EXPECT_TRUE(reg.Equals(Arm64ManagedRegister::FromDRegister(D20))); 204 205 reg = Arm64ManagedRegister::FromDRegister(D31); 206 sreg = Arm64ManagedRegister::FromSRegister(S31); 207 EXPECT_TRUE(!reg.IsNoRegister()); 208 EXPECT_TRUE(!reg.IsCoreRegister()); 209 EXPECT_TRUE(!reg.IsWRegister()); 210 EXPECT_TRUE(reg.IsDRegister()); 211 EXPECT_TRUE(!reg.IsSRegister()); 212 EXPECT_TRUE(reg.Overlaps(sreg)); 213 EXPECT_EQ(D31, reg.AsDRegister()); 214 EXPECT_EQ(S31, reg.AsOverlappingDRegisterLow()); 215 EXPECT_TRUE(reg.Equals(Arm64ManagedRegister::FromDRegister(D31))); 216 } 217 218 // S Register test. 219 TEST(Arm64ManagedRegister, SRegister) { 220 Arm64ManagedRegister reg = Arm64ManagedRegister::FromSRegister(S0); 221 Arm64ManagedRegister dreg = Arm64ManagedRegister::FromDRegister(D0); 222 EXPECT_TRUE(!reg.IsNoRegister()); 223 EXPECT_TRUE(!reg.IsCoreRegister()); 224 EXPECT_TRUE(!reg.IsWRegister()); 225 EXPECT_TRUE(reg.IsSRegister()); 226 EXPECT_TRUE(!reg.IsDRegister()); 227 EXPECT_TRUE(reg.Overlaps(dreg)); 228 EXPECT_EQ(S0, reg.AsSRegister()); 229 EXPECT_EQ(D0, reg.AsOverlappingSRegisterD()); 230 EXPECT_TRUE(reg.Equals(Arm64ManagedRegister::FromSRegister(S0))); 231 232 reg = Arm64ManagedRegister::FromSRegister(S5); 233 dreg = Arm64ManagedRegister::FromDRegister(D5); 234 EXPECT_TRUE(!reg.IsNoRegister()); 235 EXPECT_TRUE(!reg.IsCoreRegister()); 236 EXPECT_TRUE(!reg.IsWRegister()); 237 EXPECT_TRUE(reg.IsSRegister()); 238 EXPECT_TRUE(!reg.IsDRegister()); 239 EXPECT_TRUE(reg.Overlaps(dreg)); 240 EXPECT_EQ(S5, reg.AsSRegister()); 241 EXPECT_EQ(D5, reg.AsOverlappingSRegisterD()); 242 EXPECT_TRUE(reg.Equals(Arm64ManagedRegister::FromSRegister(S5))); 243 244 reg = Arm64ManagedRegister::FromSRegister(S7); 245 dreg = Arm64ManagedRegister::FromDRegister(D7); 246 EXPECT_TRUE(!reg.IsNoRegister()); 247 EXPECT_TRUE(!reg.IsCoreRegister()); 248 EXPECT_TRUE(!reg.IsWRegister()); 249 EXPECT_TRUE(reg.IsSRegister()); 250 EXPECT_TRUE(!reg.IsDRegister()); 251 EXPECT_TRUE(reg.Overlaps(dreg)); 252 EXPECT_EQ(S7, reg.AsSRegister()); 253 EXPECT_EQ(D7, reg.AsOverlappingSRegisterD()); 254 EXPECT_TRUE(reg.Equals(Arm64ManagedRegister::FromSRegister(S7))); 255 256 reg = Arm64ManagedRegister::FromSRegister(S31); 257 dreg = Arm64ManagedRegister::FromDRegister(D31); 258 EXPECT_TRUE(!reg.IsNoRegister()); 259 EXPECT_TRUE(!reg.IsCoreRegister()); 260 EXPECT_TRUE(!reg.IsWRegister()); 261 EXPECT_TRUE(reg.IsSRegister()); 262 EXPECT_TRUE(!reg.IsDRegister()); 263 EXPECT_TRUE(reg.Overlaps(dreg)); 264 EXPECT_EQ(S31, reg.AsSRegister()); 265 EXPECT_EQ(D31, reg.AsOverlappingSRegisterD()); 266 EXPECT_TRUE(reg.Equals(Arm64ManagedRegister::FromSRegister(S31))); 267 } 268 269 TEST(Arm64ManagedRegister, Equals) { 270 ManagedRegister no_reg = ManagedRegister::NoRegister(); 271 EXPECT_TRUE(no_reg.Equals(Arm64ManagedRegister::NoRegister())); 272 EXPECT_TRUE(!no_reg.Equals(Arm64ManagedRegister::FromCoreRegister(X0))); 273 EXPECT_TRUE(!no_reg.Equals(Arm64ManagedRegister::FromCoreRegister(X1))); 274 EXPECT_TRUE(!no_reg.Equals(Arm64ManagedRegister::FromWRegister(W0))); 275 EXPECT_TRUE(!no_reg.Equals(Arm64ManagedRegister::FromWRegister(W1))); 276 EXPECT_TRUE(!no_reg.Equals(Arm64ManagedRegister::FromDRegister(D0))); 277 EXPECT_TRUE(!no_reg.Equals(Arm64ManagedRegister::FromSRegister(S0))); 278 279 Arm64ManagedRegister reg_X0 = Arm64ManagedRegister::FromCoreRegister(X0); 280 EXPECT_TRUE(!reg_X0.Equals(Arm64ManagedRegister::NoRegister())); 281 EXPECT_TRUE(reg_X0.Equals(Arm64ManagedRegister::FromCoreRegister(X0))); 282 EXPECT_TRUE(!reg_X0.Equals(Arm64ManagedRegister::FromCoreRegister(X1))); 283 EXPECT_TRUE(!reg_X0.Equals(Arm64ManagedRegister::FromWRegister(W0))); 284 EXPECT_TRUE(!reg_X0.Equals(Arm64ManagedRegister::FromSRegister(S0))); 285 EXPECT_TRUE(!reg_X0.Equals(Arm64ManagedRegister::FromDRegister(D0))); 286 287 Arm64ManagedRegister reg_X1 = Arm64ManagedRegister::FromCoreRegister(X1); 288 EXPECT_TRUE(!reg_X1.Equals(Arm64ManagedRegister::NoRegister())); 289 EXPECT_TRUE(!reg_X1.Equals(Arm64ManagedRegister::FromCoreRegister(X0))); 290 EXPECT_TRUE(reg_X1.Equals(Arm64ManagedRegister::FromCoreRegister(X1))); 291 EXPECT_TRUE(!reg_X1.Equals(Arm64ManagedRegister::FromWRegister(W1))); 292 EXPECT_TRUE(!reg_X1.Equals(Arm64ManagedRegister::FromDRegister(D0))); 293 EXPECT_TRUE(!reg_X1.Equals(Arm64ManagedRegister::FromSRegister(S0))); 294 EXPECT_TRUE(!reg_X1.Equals(Arm64ManagedRegister::FromDRegister(D1))); 295 EXPECT_TRUE(!reg_X1.Equals(Arm64ManagedRegister::FromSRegister(S1))); 296 297 Arm64ManagedRegister reg_X31 = Arm64ManagedRegister::FromCoreRegister(X31); 298 EXPECT_TRUE(!reg_X31.Equals(Arm64ManagedRegister::NoRegister())); 299 EXPECT_TRUE(reg_X31.Equals(Arm64ManagedRegister::FromCoreRegister(SP))); 300 EXPECT_TRUE(!reg_X31.Equals(Arm64ManagedRegister::FromCoreRegister(XZR))); 301 EXPECT_TRUE(!reg_X31.Equals(Arm64ManagedRegister::FromWRegister(W31))); 302 EXPECT_TRUE(!reg_X31.Equals(Arm64ManagedRegister::FromWRegister(WZR))); 303 EXPECT_TRUE(!reg_X31.Equals(Arm64ManagedRegister::FromSRegister(S0))); 304 EXPECT_TRUE(!reg_X31.Equals(Arm64ManagedRegister::FromDRegister(D0))); 305 306 Arm64ManagedRegister reg_SP = Arm64ManagedRegister::FromCoreRegister(SP); 307 EXPECT_TRUE(!reg_SP.Equals(Arm64ManagedRegister::NoRegister())); 308 EXPECT_TRUE(reg_SP.Equals(Arm64ManagedRegister::FromCoreRegister(X31))); 309 EXPECT_TRUE(!reg_SP.Equals(Arm64ManagedRegister::FromCoreRegister(XZR))); 310 EXPECT_TRUE(!reg_SP.Equals(Arm64ManagedRegister::FromWRegister(W31))); 311 EXPECT_TRUE(!reg_SP.Equals(Arm64ManagedRegister::FromSRegister(S0))); 312 EXPECT_TRUE(!reg_SP.Equals(Arm64ManagedRegister::FromDRegister(D0))); 313 314 Arm64ManagedRegister reg_W8 = Arm64ManagedRegister::FromWRegister(W8); 315 EXPECT_TRUE(!reg_W8.Equals(Arm64ManagedRegister::NoRegister())); 316 EXPECT_TRUE(!reg_W8.Equals(Arm64ManagedRegister::FromCoreRegister(X0))); 317 EXPECT_TRUE(!reg_W8.Equals(Arm64ManagedRegister::FromCoreRegister(X8))); 318 EXPECT_TRUE(reg_W8.Equals(Arm64ManagedRegister::FromWRegister(W8))); 319 EXPECT_TRUE(!reg_W8.Equals(Arm64ManagedRegister::FromDRegister(D0))); 320 EXPECT_TRUE(!reg_W8.Equals(Arm64ManagedRegister::FromSRegister(S0))); 321 EXPECT_TRUE(!reg_W8.Equals(Arm64ManagedRegister::FromDRegister(D1))); 322 EXPECT_TRUE(!reg_W8.Equals(Arm64ManagedRegister::FromSRegister(S1))); 323 324 Arm64ManagedRegister reg_W12 = Arm64ManagedRegister::FromWRegister(W12); 325 EXPECT_TRUE(!reg_W12.Equals(Arm64ManagedRegister::NoRegister())); 326 EXPECT_TRUE(!reg_W12.Equals(Arm64ManagedRegister::FromCoreRegister(X0))); 327 EXPECT_TRUE(!reg_W12.Equals(Arm64ManagedRegister::FromCoreRegister(X8))); 328 EXPECT_TRUE(reg_W12.Equals(Arm64ManagedRegister::FromWRegister(W12))); 329 EXPECT_TRUE(!reg_W12.Equals(Arm64ManagedRegister::FromDRegister(D0))); 330 EXPECT_TRUE(!reg_W12.Equals(Arm64ManagedRegister::FromSRegister(S0))); 331 EXPECT_TRUE(!reg_W12.Equals(Arm64ManagedRegister::FromDRegister(D1))); 332 EXPECT_TRUE(!reg_W12.Equals(Arm64ManagedRegister::FromSRegister(S1))); 333 334 Arm64ManagedRegister reg_S0 = Arm64ManagedRegister::FromSRegister(S0); 335 EXPECT_TRUE(!reg_S0.Equals(Arm64ManagedRegister::NoRegister())); 336 EXPECT_TRUE(!reg_S0.Equals(Arm64ManagedRegister::FromCoreRegister(X0))); 337 EXPECT_TRUE(!reg_S0.Equals(Arm64ManagedRegister::FromCoreRegister(X1))); 338 EXPECT_TRUE(!reg_S0.Equals(Arm64ManagedRegister::FromWRegister(W0))); 339 EXPECT_TRUE(reg_S0.Equals(Arm64ManagedRegister::FromSRegister(S0))); 340 EXPECT_TRUE(!reg_S0.Equals(Arm64ManagedRegister::FromSRegister(S1))); 341 EXPECT_TRUE(!reg_S0.Equals(Arm64ManagedRegister::FromDRegister(D0))); 342 EXPECT_TRUE(!reg_S0.Equals(Arm64ManagedRegister::FromDRegister(D1))); 343 344 Arm64ManagedRegister reg_S1 = Arm64ManagedRegister::FromSRegister(S1); 345 EXPECT_TRUE(!reg_S1.Equals(Arm64ManagedRegister::NoRegister())); 346 EXPECT_TRUE(!reg_S1.Equals(Arm64ManagedRegister::FromCoreRegister(X0))); 347 EXPECT_TRUE(!reg_S1.Equals(Arm64ManagedRegister::FromCoreRegister(X1))); 348 EXPECT_TRUE(!reg_S1.Equals(Arm64ManagedRegister::FromWRegister(W0))); 349 EXPECT_TRUE(!reg_S1.Equals(Arm64ManagedRegister::FromSRegister(S0))); 350 EXPECT_TRUE(reg_S1.Equals(Arm64ManagedRegister::FromSRegister(S1))); 351 EXPECT_TRUE(!reg_S1.Equals(Arm64ManagedRegister::FromDRegister(D0))); 352 EXPECT_TRUE(!reg_S1.Equals(Arm64ManagedRegister::FromDRegister(D1))); 353 354 Arm64ManagedRegister reg_S31 = Arm64ManagedRegister::FromSRegister(S31); 355 EXPECT_TRUE(!reg_S31.Equals(Arm64ManagedRegister::NoRegister())); 356 EXPECT_TRUE(!reg_S31.Equals(Arm64ManagedRegister::FromCoreRegister(X0))); 357 EXPECT_TRUE(!reg_S31.Equals(Arm64ManagedRegister::FromCoreRegister(X1))); 358 EXPECT_TRUE(!reg_S31.Equals(Arm64ManagedRegister::FromWRegister(W0))); 359 EXPECT_TRUE(!reg_S31.Equals(Arm64ManagedRegister::FromSRegister(S0))); 360 EXPECT_TRUE(reg_S31.Equals(Arm64ManagedRegister::FromSRegister(S31))); 361 EXPECT_TRUE(!reg_S31.Equals(Arm64ManagedRegister::FromDRegister(D0))); 362 EXPECT_TRUE(!reg_S31.Equals(Arm64ManagedRegister::FromDRegister(D1))); 363 364 Arm64ManagedRegister reg_D0 = Arm64ManagedRegister::FromDRegister(D0); 365 EXPECT_TRUE(!reg_D0.Equals(Arm64ManagedRegister::NoRegister())); 366 EXPECT_TRUE(!reg_D0.Equals(Arm64ManagedRegister::FromCoreRegister(X0))); 367 EXPECT_TRUE(!reg_D0.Equals(Arm64ManagedRegister::FromWRegister(W1))); 368 EXPECT_TRUE(!reg_D0.Equals(Arm64ManagedRegister::FromSRegister(S0))); 369 EXPECT_TRUE(!reg_D0.Equals(Arm64ManagedRegister::FromSRegister(S0))); 370 EXPECT_TRUE(!reg_D0.Equals(Arm64ManagedRegister::FromSRegister(S31))); 371 EXPECT_TRUE(reg_D0.Equals(Arm64ManagedRegister::FromDRegister(D0))); 372 EXPECT_TRUE(!reg_D0.Equals(Arm64ManagedRegister::FromDRegister(D1))); 373 374 Arm64ManagedRegister reg_D15 = Arm64ManagedRegister::FromDRegister(D15); 375 EXPECT_TRUE(!reg_D15.Equals(Arm64ManagedRegister::NoRegister())); 376 EXPECT_TRUE(!reg_D15.Equals(Arm64ManagedRegister::FromCoreRegister(X0))); 377 EXPECT_TRUE(!reg_D15.Equals(Arm64ManagedRegister::FromCoreRegister(X1))); 378 EXPECT_TRUE(!reg_D15.Equals(Arm64ManagedRegister::FromWRegister(W0))); 379 EXPECT_TRUE(!reg_D15.Equals(Arm64ManagedRegister::FromSRegister(S0))); 380 EXPECT_TRUE(!reg_D15.Equals(Arm64ManagedRegister::FromSRegister(S31))); 381 EXPECT_TRUE(!reg_D15.Equals(Arm64ManagedRegister::FromDRegister(D0))); 382 EXPECT_TRUE(!reg_D15.Equals(Arm64ManagedRegister::FromDRegister(D1))); 383 EXPECT_TRUE(reg_D15.Equals(Arm64ManagedRegister::FromDRegister(D15))); 384 } 385 386 TEST(Arm64ManagedRegister, Overlaps) { 387 Arm64ManagedRegister reg = Arm64ManagedRegister::FromCoreRegister(X0); 388 Arm64ManagedRegister reg_o = Arm64ManagedRegister::FromWRegister(W0); 389 EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromCoreRegister(X0))); 390 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromCoreRegister(X1))); 391 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromCoreRegister(SP))); 392 EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromWRegister(W0))); 393 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1))); 394 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12))); 395 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(WZR))); 396 EXPECT_EQ(X0, reg_o.AsOverlappingWRegisterCore()); 397 EXPECT_EQ(W0, reg.AsOverlappingCoreRegisterLow()); 398 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0))); 399 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S1))); 400 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2))); 401 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15))); 402 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S30))); 403 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31))); 404 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D0))); 405 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D1))); 406 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D7))); 407 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15))); 408 409 reg = Arm64ManagedRegister::FromCoreRegister(X10); 410 reg_o = Arm64ManagedRegister::FromWRegister(W10); 411 EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromCoreRegister(X10))); 412 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromCoreRegister(X1))); 413 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromCoreRegister(SP))); 414 EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromWRegister(W10))); 415 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1))); 416 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12))); 417 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(WZR))); 418 EXPECT_EQ(X10, reg_o.AsOverlappingWRegisterCore()); 419 EXPECT_EQ(W10, reg.AsOverlappingCoreRegisterLow()); 420 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0))); 421 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S1))); 422 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2))); 423 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15))); 424 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S30))); 425 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31))); 426 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D0))); 427 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D1))); 428 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D7))); 429 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15))); 430 431 reg = Arm64ManagedRegister::FromCoreRegister(IP1); 432 reg_o = Arm64ManagedRegister::FromWRegister(W17); 433 EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromCoreRegister(X17))); 434 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromCoreRegister(X1))); 435 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromCoreRegister(SP))); 436 EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromWRegister(W17))); 437 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1))); 438 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12))); 439 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(WZR))); 440 EXPECT_EQ(X17, reg_o.AsOverlappingWRegisterCore()); 441 EXPECT_EQ(W17, reg.AsOverlappingCoreRegisterLow()); 442 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0))); 443 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S1))); 444 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2))); 445 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15))); 446 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S30))); 447 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31))); 448 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D0))); 449 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D1))); 450 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D7))); 451 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15))); 452 453 reg = Arm64ManagedRegister::FromCoreRegister(XZR); 454 reg_o = Arm64ManagedRegister::FromWRegister(WZR); 455 EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromCoreRegister(X31))); 456 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromCoreRegister(X1))); 457 EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromCoreRegister(SP))); 458 EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromWRegister(W31))); 459 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1))); 460 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12))); 461 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W19))); 462 EXPECT_EQ(X31, reg_o.AsOverlappingWRegisterCore()); 463 EXPECT_EQ(SP, reg_o.AsOverlappingWRegisterCore()); 464 EXPECT_NE(XZR, reg_o.AsOverlappingWRegisterCore()); 465 EXPECT_EQ(W31, reg.AsOverlappingCoreRegisterLow()); 466 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0))); 467 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S1))); 468 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2))); 469 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15))); 470 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S30))); 471 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31))); 472 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D0))); 473 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D1))); 474 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D7))); 475 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15))); 476 477 reg = Arm64ManagedRegister::FromCoreRegister(SP); 478 reg_o = Arm64ManagedRegister::FromWRegister(WZR); 479 EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromCoreRegister(X31))); 480 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromCoreRegister(X1))); 481 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromCoreRegister(X15))); 482 EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromWRegister(WZR))); 483 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1))); 484 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12))); 485 EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromWRegister(W31))); 486 EXPECT_EQ(X31, reg_o.AsOverlappingWRegisterCore()); 487 EXPECT_EQ(W31, reg.AsOverlappingCoreRegisterLow()); 488 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0))); 489 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S1))); 490 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2))); 491 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15))); 492 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S30))); 493 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31))); 494 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D0))); 495 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D1))); 496 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D7))); 497 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15))); 498 499 reg = Arm64ManagedRegister::FromWRegister(W1); 500 reg_o = Arm64ManagedRegister::FromCoreRegister(X1); 501 EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1))); 502 EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromCoreRegister(X1))); 503 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromCoreRegister(X15))); 504 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(WZR))); 505 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12))); 506 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W31))); 507 EXPECT_EQ(W1, reg_o.AsOverlappingCoreRegisterLow()); 508 EXPECT_EQ(X1, reg.AsOverlappingWRegisterCore()); 509 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0))); 510 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S1))); 511 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2))); 512 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15))); 513 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S30))); 514 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31))); 515 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D0))); 516 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D1))); 517 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D7))); 518 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15))); 519 520 reg = Arm64ManagedRegister::FromWRegister(W21); 521 reg_o = Arm64ManagedRegister::FromCoreRegister(X21); 522 EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromWRegister(W21))); 523 EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromCoreRegister(X21))); 524 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromCoreRegister(X15))); 525 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(WZR))); 526 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12))); 527 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W31))); 528 EXPECT_EQ(W21, reg_o.AsOverlappingCoreRegisterLow()); 529 EXPECT_EQ(X21, reg.AsOverlappingWRegisterCore()); 530 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0))); 531 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S1))); 532 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2))); 533 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15))); 534 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S30))); 535 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31))); 536 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D0))); 537 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D1))); 538 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D7))); 539 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15))); 540 541 542 reg = Arm64ManagedRegister::FromSRegister(S1); 543 reg_o = Arm64ManagedRegister::FromDRegister(D1); 544 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromCoreRegister(X31))); 545 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromCoreRegister(X1))); 546 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromCoreRegister(X15))); 547 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(WZR))); 548 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1))); 549 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12))); 550 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W31))); 551 EXPECT_EQ(S1, reg_o.AsOverlappingDRegisterLow()); 552 EXPECT_EQ(D1, reg.AsOverlappingSRegisterD()); 553 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0))); 554 EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromSRegister(S1))); 555 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2))); 556 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15))); 557 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S30))); 558 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31))); 559 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D0))); 560 EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromDRegister(D1))); 561 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D2))); 562 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D7))); 563 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15))); 564 565 reg = Arm64ManagedRegister::FromSRegister(S15); 566 reg_o = Arm64ManagedRegister::FromDRegister(D15); 567 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromCoreRegister(X31))); 568 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromCoreRegister(X1))); 569 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromCoreRegister(X15))); 570 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(WZR))); 571 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1))); 572 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12))); 573 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W31))); 574 EXPECT_EQ(S15, reg_o.AsOverlappingDRegisterLow()); 575 EXPECT_EQ(D15, reg.AsOverlappingSRegisterD()); 576 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0))); 577 EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15))); 578 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2))); 579 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S17))); 580 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S16))); 581 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31))); 582 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D16))); 583 EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15))); 584 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D2))); 585 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D17))); 586 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D20))); 587 588 reg = Arm64ManagedRegister::FromDRegister(D15); 589 reg_o = Arm64ManagedRegister::FromSRegister(S15); 590 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromCoreRegister(X31))); 591 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromCoreRegister(X1))); 592 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromCoreRegister(X15))); 593 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(WZR))); 594 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1))); 595 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12))); 596 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W31))); 597 EXPECT_EQ(S15, reg.AsOverlappingDRegisterLow()); 598 EXPECT_EQ(D15, reg_o.AsOverlappingSRegisterD()); 599 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0))); 600 EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15))); 601 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2))); 602 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S17))); 603 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S16))); 604 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31))); 605 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D16))); 606 EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15))); 607 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D2))); 608 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D17))); 609 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D20))); 610 } 611 612 TEST(Arm64ManagedRegister, VixlRegisters) { 613 // X Registers. 614 EXPECT_TRUE(vixl::x0.Is(Arm64Assembler::reg_x(X0))); 615 EXPECT_TRUE(vixl::x1.Is(Arm64Assembler::reg_x(X1))); 616 EXPECT_TRUE(vixl::x2.Is(Arm64Assembler::reg_x(X2))); 617 EXPECT_TRUE(vixl::x3.Is(Arm64Assembler::reg_x(X3))); 618 EXPECT_TRUE(vixl::x4.Is(Arm64Assembler::reg_x(X4))); 619 EXPECT_TRUE(vixl::x5.Is(Arm64Assembler::reg_x(X5))); 620 EXPECT_TRUE(vixl::x6.Is(Arm64Assembler::reg_x(X6))); 621 EXPECT_TRUE(vixl::x7.Is(Arm64Assembler::reg_x(X7))); 622 EXPECT_TRUE(vixl::x8.Is(Arm64Assembler::reg_x(X8))); 623 EXPECT_TRUE(vixl::x9.Is(Arm64Assembler::reg_x(X9))); 624 EXPECT_TRUE(vixl::x10.Is(Arm64Assembler::reg_x(X10))); 625 EXPECT_TRUE(vixl::x11.Is(Arm64Assembler::reg_x(X11))); 626 EXPECT_TRUE(vixl::x12.Is(Arm64Assembler::reg_x(X12))); 627 EXPECT_TRUE(vixl::x13.Is(Arm64Assembler::reg_x(X13))); 628 EXPECT_TRUE(vixl::x14.Is(Arm64Assembler::reg_x(X14))); 629 EXPECT_TRUE(vixl::x15.Is(Arm64Assembler::reg_x(X15))); 630 EXPECT_TRUE(vixl::x16.Is(Arm64Assembler::reg_x(X16))); 631 EXPECT_TRUE(vixl::x17.Is(Arm64Assembler::reg_x(X17))); 632 EXPECT_TRUE(vixl::x18.Is(Arm64Assembler::reg_x(X18))); 633 EXPECT_TRUE(vixl::x19.Is(Arm64Assembler::reg_x(X19))); 634 EXPECT_TRUE(vixl::x20.Is(Arm64Assembler::reg_x(X20))); 635 EXPECT_TRUE(vixl::x21.Is(Arm64Assembler::reg_x(X21))); 636 EXPECT_TRUE(vixl::x22.Is(Arm64Assembler::reg_x(X22))); 637 EXPECT_TRUE(vixl::x23.Is(Arm64Assembler::reg_x(X23))); 638 EXPECT_TRUE(vixl::x24.Is(Arm64Assembler::reg_x(X24))); 639 EXPECT_TRUE(vixl::x25.Is(Arm64Assembler::reg_x(X25))); 640 EXPECT_TRUE(vixl::x26.Is(Arm64Assembler::reg_x(X26))); 641 EXPECT_TRUE(vixl::x27.Is(Arm64Assembler::reg_x(X27))); 642 EXPECT_TRUE(vixl::x28.Is(Arm64Assembler::reg_x(X28))); 643 EXPECT_TRUE(vixl::x29.Is(Arm64Assembler::reg_x(X29))); 644 EXPECT_TRUE(vixl::x30.Is(Arm64Assembler::reg_x(X30))); 645 // FIXME: Take a look here. 646 EXPECT_TRUE(vixl::sp.Is(Arm64Assembler::reg_x(X31))); 647 EXPECT_TRUE(!vixl::x31.Is(Arm64Assembler::reg_x(X31))); 648 649 EXPECT_TRUE(vixl::x18.Is(Arm64Assembler::reg_x(TR))); 650 EXPECT_TRUE(vixl::ip0.Is(Arm64Assembler::reg_x(IP0))); 651 EXPECT_TRUE(vixl::ip1.Is(Arm64Assembler::reg_x(IP1))); 652 EXPECT_TRUE(vixl::x29.Is(Arm64Assembler::reg_x(FP))); 653 EXPECT_TRUE(vixl::lr.Is(Arm64Assembler::reg_x(LR))); 654 EXPECT_TRUE(vixl::sp.Is(Arm64Assembler::reg_x(SP))); 655 EXPECT_TRUE(vixl::xzr.Is(Arm64Assembler::reg_x(XZR))); 656 657 // W Registers. 658 EXPECT_TRUE(vixl::w0.Is(Arm64Assembler::reg_w(W0))); 659 EXPECT_TRUE(vixl::w1.Is(Arm64Assembler::reg_w(W1))); 660 EXPECT_TRUE(vixl::w2.Is(Arm64Assembler::reg_w(W2))); 661 EXPECT_TRUE(vixl::w3.Is(Arm64Assembler::reg_w(W3))); 662 EXPECT_TRUE(vixl::w4.Is(Arm64Assembler::reg_w(W4))); 663 EXPECT_TRUE(vixl::w5.Is(Arm64Assembler::reg_w(W5))); 664 EXPECT_TRUE(vixl::w6.Is(Arm64Assembler::reg_w(W6))); 665 EXPECT_TRUE(vixl::w7.Is(Arm64Assembler::reg_w(W7))); 666 EXPECT_TRUE(vixl::w8.Is(Arm64Assembler::reg_w(W8))); 667 EXPECT_TRUE(vixl::w9.Is(Arm64Assembler::reg_w(W9))); 668 EXPECT_TRUE(vixl::w10.Is(Arm64Assembler::reg_w(W10))); 669 EXPECT_TRUE(vixl::w11.Is(Arm64Assembler::reg_w(W11))); 670 EXPECT_TRUE(vixl::w12.Is(Arm64Assembler::reg_w(W12))); 671 EXPECT_TRUE(vixl::w13.Is(Arm64Assembler::reg_w(W13))); 672 EXPECT_TRUE(vixl::w14.Is(Arm64Assembler::reg_w(W14))); 673 EXPECT_TRUE(vixl::w15.Is(Arm64Assembler::reg_w(W15))); 674 EXPECT_TRUE(vixl::w16.Is(Arm64Assembler::reg_w(W16))); 675 EXPECT_TRUE(vixl::w17.Is(Arm64Assembler::reg_w(W17))); 676 EXPECT_TRUE(vixl::w18.Is(Arm64Assembler::reg_w(W18))); 677 EXPECT_TRUE(vixl::w19.Is(Arm64Assembler::reg_w(W19))); 678 EXPECT_TRUE(vixl::w20.Is(Arm64Assembler::reg_w(W20))); 679 EXPECT_TRUE(vixl::w21.Is(Arm64Assembler::reg_w(W21))); 680 EXPECT_TRUE(vixl::w22.Is(Arm64Assembler::reg_w(W22))); 681 EXPECT_TRUE(vixl::w23.Is(Arm64Assembler::reg_w(W23))); 682 EXPECT_TRUE(vixl::w24.Is(Arm64Assembler::reg_w(W24))); 683 EXPECT_TRUE(vixl::w25.Is(Arm64Assembler::reg_w(W25))); 684 EXPECT_TRUE(vixl::w26.Is(Arm64Assembler::reg_w(W26))); 685 EXPECT_TRUE(vixl::w27.Is(Arm64Assembler::reg_w(W27))); 686 EXPECT_TRUE(vixl::w28.Is(Arm64Assembler::reg_w(W28))); 687 EXPECT_TRUE(vixl::w29.Is(Arm64Assembler::reg_w(W29))); 688 EXPECT_TRUE(vixl::w30.Is(Arm64Assembler::reg_w(W30))); 689 EXPECT_TRUE(vixl::w31.Is(Arm64Assembler::reg_w(W31))); 690 EXPECT_TRUE(vixl::wzr.Is(Arm64Assembler::reg_w(WZR))); 691 692 // D Registers. 693 EXPECT_TRUE(vixl::d0.Is(Arm64Assembler::reg_d(D0))); 694 EXPECT_TRUE(vixl::d1.Is(Arm64Assembler::reg_d(D1))); 695 EXPECT_TRUE(vixl::d2.Is(Arm64Assembler::reg_d(D2))); 696 EXPECT_TRUE(vixl::d3.Is(Arm64Assembler::reg_d(D3))); 697 EXPECT_TRUE(vixl::d4.Is(Arm64Assembler::reg_d(D4))); 698 EXPECT_TRUE(vixl::d5.Is(Arm64Assembler::reg_d(D5))); 699 EXPECT_TRUE(vixl::d6.Is(Arm64Assembler::reg_d(D6))); 700 EXPECT_TRUE(vixl::d7.Is(Arm64Assembler::reg_d(D7))); 701 EXPECT_TRUE(vixl::d8.Is(Arm64Assembler::reg_d(D8))); 702 EXPECT_TRUE(vixl::d9.Is(Arm64Assembler::reg_d(D9))); 703 EXPECT_TRUE(vixl::d10.Is(Arm64Assembler::reg_d(D10))); 704 EXPECT_TRUE(vixl::d11.Is(Arm64Assembler::reg_d(D11))); 705 EXPECT_TRUE(vixl::d12.Is(Arm64Assembler::reg_d(D12))); 706 EXPECT_TRUE(vixl::d13.Is(Arm64Assembler::reg_d(D13))); 707 EXPECT_TRUE(vixl::d14.Is(Arm64Assembler::reg_d(D14))); 708 EXPECT_TRUE(vixl::d15.Is(Arm64Assembler::reg_d(D15))); 709 EXPECT_TRUE(vixl::d16.Is(Arm64Assembler::reg_d(D16))); 710 EXPECT_TRUE(vixl::d17.Is(Arm64Assembler::reg_d(D17))); 711 EXPECT_TRUE(vixl::d18.Is(Arm64Assembler::reg_d(D18))); 712 EXPECT_TRUE(vixl::d19.Is(Arm64Assembler::reg_d(D19))); 713 EXPECT_TRUE(vixl::d20.Is(Arm64Assembler::reg_d(D20))); 714 EXPECT_TRUE(vixl::d21.Is(Arm64Assembler::reg_d(D21))); 715 EXPECT_TRUE(vixl::d22.Is(Arm64Assembler::reg_d(D22))); 716 EXPECT_TRUE(vixl::d23.Is(Arm64Assembler::reg_d(D23))); 717 EXPECT_TRUE(vixl::d24.Is(Arm64Assembler::reg_d(D24))); 718 EXPECT_TRUE(vixl::d25.Is(Arm64Assembler::reg_d(D25))); 719 EXPECT_TRUE(vixl::d26.Is(Arm64Assembler::reg_d(D26))); 720 EXPECT_TRUE(vixl::d27.Is(Arm64Assembler::reg_d(D27))); 721 EXPECT_TRUE(vixl::d28.Is(Arm64Assembler::reg_d(D28))); 722 EXPECT_TRUE(vixl::d29.Is(Arm64Assembler::reg_d(D29))); 723 EXPECT_TRUE(vixl::d30.Is(Arm64Assembler::reg_d(D30))); 724 EXPECT_TRUE(vixl::d31.Is(Arm64Assembler::reg_d(D31))); 725 726 // S Registers. 727 EXPECT_TRUE(vixl::s0.Is(Arm64Assembler::reg_s(S0))); 728 EXPECT_TRUE(vixl::s1.Is(Arm64Assembler::reg_s(S1))); 729 EXPECT_TRUE(vixl::s2.Is(Arm64Assembler::reg_s(S2))); 730 EXPECT_TRUE(vixl::s3.Is(Arm64Assembler::reg_s(S3))); 731 EXPECT_TRUE(vixl::s4.Is(Arm64Assembler::reg_s(S4))); 732 EXPECT_TRUE(vixl::s5.Is(Arm64Assembler::reg_s(S5))); 733 EXPECT_TRUE(vixl::s6.Is(Arm64Assembler::reg_s(S6))); 734 EXPECT_TRUE(vixl::s7.Is(Arm64Assembler::reg_s(S7))); 735 EXPECT_TRUE(vixl::s8.Is(Arm64Assembler::reg_s(S8))); 736 EXPECT_TRUE(vixl::s9.Is(Arm64Assembler::reg_s(S9))); 737 EXPECT_TRUE(vixl::s10.Is(Arm64Assembler::reg_s(S10))); 738 EXPECT_TRUE(vixl::s11.Is(Arm64Assembler::reg_s(S11))); 739 EXPECT_TRUE(vixl::s12.Is(Arm64Assembler::reg_s(S12))); 740 EXPECT_TRUE(vixl::s13.Is(Arm64Assembler::reg_s(S13))); 741 EXPECT_TRUE(vixl::s14.Is(Arm64Assembler::reg_s(S14))); 742 EXPECT_TRUE(vixl::s15.Is(Arm64Assembler::reg_s(S15))); 743 EXPECT_TRUE(vixl::s16.Is(Arm64Assembler::reg_s(S16))); 744 EXPECT_TRUE(vixl::s17.Is(Arm64Assembler::reg_s(S17))); 745 EXPECT_TRUE(vixl::s18.Is(Arm64Assembler::reg_s(S18))); 746 EXPECT_TRUE(vixl::s19.Is(Arm64Assembler::reg_s(S19))); 747 EXPECT_TRUE(vixl::s20.Is(Arm64Assembler::reg_s(S20))); 748 EXPECT_TRUE(vixl::s21.Is(Arm64Assembler::reg_s(S21))); 749 EXPECT_TRUE(vixl::s22.Is(Arm64Assembler::reg_s(S22))); 750 EXPECT_TRUE(vixl::s23.Is(Arm64Assembler::reg_s(S23))); 751 EXPECT_TRUE(vixl::s24.Is(Arm64Assembler::reg_s(S24))); 752 EXPECT_TRUE(vixl::s25.Is(Arm64Assembler::reg_s(S25))); 753 EXPECT_TRUE(vixl::s26.Is(Arm64Assembler::reg_s(S26))); 754 EXPECT_TRUE(vixl::s27.Is(Arm64Assembler::reg_s(S27))); 755 EXPECT_TRUE(vixl::s28.Is(Arm64Assembler::reg_s(S28))); 756 EXPECT_TRUE(vixl::s29.Is(Arm64Assembler::reg_s(S29))); 757 EXPECT_TRUE(vixl::s30.Is(Arm64Assembler::reg_s(S30))); 758 EXPECT_TRUE(vixl::s31.Is(Arm64Assembler::reg_s(S31))); 759 } 760 761 } // namespace arm64 762 } // namespace art 763
