1 // REQUIRES: arm-registered-target 2 // RUN: not %clang_cc1 -triple armv7 -target-feature +neon %s -S -o /dev/null 2>&1 | FileCheck %s 3 4 // rdar://13446483 5 typedef __attribute__((neon_vector_type(2))) long long int64x2_t; 6 typedef struct int64x2x4_t { 7 int64x2_t val[4]; 8 } int64x2x4_t; 9 int64x2x4_t t1(const long long a[]) { 10 int64x2x4_t r; 11 __asm__("vldm %[a], { %q[r0], %q[r1], %q[r2], %q[r3] }" 12 : [r0] "=r"(r.val[0]), // expected-warning {{value size does not match register size specified by the constraint and modifier}} 13 [r1] "=r"(r.val[1]), // expected-warning {{value size does not match register size specified by the constraint and modifier}} 14 [r2] "=r"(r.val[2]), // expected-warning {{value size does not match register size specified by the constraint and modifier}} 15 [r3] "=r"(r.val[3]) // expected-warning {{value size does not match register size specified by the constraint and modifier}} 16 : [a] "r"(a)); 17 return r; 18 } 19 // We should see all four errors, rather than report a fatal error after the first. 20 // CHECK: error: non-trivial scalar-to-vector conversion, possible invalid constraint for vector type 21 // CHECK: error: non-trivial scalar-to-vector conversion, possible invalid constraint for vector type 22 // CHECK: error: non-trivial scalar-to-vector conversion, possible invalid constraint for vector type 23 // CHECK: error: non-trivial scalar-to-vector conversion, possible invalid constraint for vector type 24
