1 //===- IntrinsicsR600.td - Defines R600 intrinsics ---------*- tablegen -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file defines all of the R600-specific intrinsics. 11 // 12 //===----------------------------------------------------------------------===// 13 14 let TargetPrefix = "r600" in { 15 16 class R600ReadPreloadRegisterIntrinsic<string name> 17 : Intrinsic<[llvm_i32_ty], [], [IntrNoMem]>, 18 GCCBuiltin<name>; 19 20 multiclass R600ReadPreloadRegisterIntrinsic_xyz<string prefix> { 21 def _x : R600ReadPreloadRegisterIntrinsic<!strconcat(prefix, "_x")>; 22 def _y : R600ReadPreloadRegisterIntrinsic<!strconcat(prefix, "_y")>; 23 def _z : R600ReadPreloadRegisterIntrinsic<!strconcat(prefix, "_z")>; 24 } 25 26 defm int_r600_read_global_size : R600ReadPreloadRegisterIntrinsic_xyz < 27 "__builtin_r600_read_global_size">; 28 defm int_r600_read_local_size : R600ReadPreloadRegisterIntrinsic_xyz < 29 "__builtin_r600_read_local_size">; 30 defm int_r600_read_ngroups : R600ReadPreloadRegisterIntrinsic_xyz < 31 "__builtin_r600_read_ngroups">; 32 defm int_r600_read_tgid : R600ReadPreloadRegisterIntrinsic_xyz < 33 "__builtin_r600_read_tgid">; 34 defm int_r600_read_tidig : R600ReadPreloadRegisterIntrinsic_xyz < 35 "__builtin_r600_read_tidig">; 36 37 } // End TargetPrefix = "r600" 38 39 let TargetPrefix = "AMDGPU" in { 40 def int_AMDGPU_div_scale : GCCBuiltin<"__builtin_amdgpu_div_scale">, 41 // 1st parameter: Numerator 42 // 2nd parameter: Denominator 43 // 3rd parameter: Constant to select select between first and 44 // second. (0 = first, 1 = second). 45 Intrinsic<[llvm_anyfloat_ty, llvm_i1_ty], 46 [LLVMMatchType<0>, LLVMMatchType<0>, llvm_i1_ty], 47 [IntrNoMem]>; 48 49 def int_AMDGPU_div_fmas : GCCBuiltin<"__builtin_amdgpu_div_fmas">, 50 Intrinsic<[llvm_anyfloat_ty], 51 [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>], 52 [IntrNoMem]>; 53 54 def int_AMDGPU_div_fixup : GCCBuiltin<"__builtin_amdgpu_div_fixup">, 55 Intrinsic<[llvm_anyfloat_ty], 56 [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>], 57 [IntrNoMem]>; 58 59 def int_AMDGPU_trig_preop : GCCBuiltin<"__builtin_amdgpu_trig_preop">, 60 Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>, llvm_i32_ty], 61 [IntrNoMem]>; 62 63 def int_AMDGPU_rcp : GCCBuiltin<"__builtin_amdgpu_rcp">, 64 Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>], [IntrNoMem]>; 65 66 def int_AMDGPU_rsq : GCCBuiltin<"__builtin_amdgpu_rsq">, 67 Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>], [IntrNoMem]>; 68 69 def int_AMDGPU_rsq_clamped : GCCBuiltin<"__builtin_amdgpu_rsq_clamped">, 70 Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>], [IntrNoMem]>; 71 72 } // End TargetPrefix = "AMDGPU" 73
