1 ; RUN: llc -march=hexagon < %s | FileCheck %s 2 3 ; CHECK: r{{[0-9]+:[0-9]+}} = #0 4 ; CHECK: r{{[0-9]+:[0-9]+}} = #1 5 ; CHECK: r{{[0-9]+:[0-9]+}} = add(r{{[0-9]+:[0-9]+}}, r{{[0-9]+:[0-9]+}}) 6 ; CHECK: p{{[0-9]+}} = cmp.gtu(r{{[0-9]+:[0-9]+}}, r{{[0-9]+:[0-9]+}}) 7 ; CHECK: p{{[0-9]+}} = cmp.gtu(r{{[0-9]+:[0-9]+}}, r{{[0-9]+:[0-9]+}}) 8 ; CHECK: r{{[0-9]+}} = mux(p{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}}) 9 ; CHECK: r{{[0-9]+}} = mux(p{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}}) 10 ; CHECK: r{{[0-9]+:[0-9]+}} = combine(r{{[0-9]+}}, r{{[0-9]+}}) 11 ; CHECK: r{{[0-9]+}} = mux(p{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}}) 12 ; CHECK: r{{[0-9]+}} = mux(p{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}}) 13 ; CHECK: r{{[0-9]+:[0-9]+}} = combine(r{{[0-9]+}}, r{{[0-9]+}}) 14 ; CHECK: r{{[0-9]+:[0-9]+}} = add(r{{[0-9]+:[0-9]+}}, r{{[0-9]+:[0-9]+}}) 15 16 17 define void @check_adde_addc (i64 %AL, i64 %AH, i64 %BL, i64 %BH, i64* %RL, i64* %RH) { 18 entry: 19 %tmp1 = zext i64 %AL to i128 20 %tmp23 = zext i64 %AH to i128 21 %tmp4 = shl i128 %tmp23, 64 22 %tmp5 = or i128 %tmp4, %tmp1 23 %tmp67 = zext i64 %BL to i128 24 %tmp89 = zext i64 %BH to i128 25 %tmp11 = shl i128 %tmp89, 64 26 %tmp12 = or i128 %tmp11, %tmp67 27 %tmp15 = add i128 %tmp12, %tmp5 28 %tmp1617 = trunc i128 %tmp15 to i64 29 store i64 %tmp1617, i64* %RL 30 %tmp21 = lshr i128 %tmp15, 64 31 %tmp2122 = trunc i128 %tmp21 to i64 32 store i64 %tmp2122, i64* %RH 33 ret void 34 } 35
