1 ; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s 2 ; CHECK: word 3 ; CHECK: combine(#0 4 5 define void @word(i32* nocapture %a) nounwind { 6 entry: 7 %0 = load i32* %a, align 4 8 %1 = zext i32 %0 to i64 9 tail call void @bar(i64 %1) nounwind 10 ret void 11 } 12 13 declare void @bar(i64) 14 15 ; CHECK: halfword 16 ; CHECK: combine(#0 17 18 define void @halfword(i16* nocapture %a) nounwind { 19 entry: 20 %0 = load i16* %a, align 2 21 %1 = zext i16 %0 to i64 22 %add.ptr = getelementptr inbounds i16* %a, i32 1 23 %2 = load i16* %add.ptr, align 2 24 %3 = zext i16 %2 to i64 25 %4 = shl nuw nsw i64 %3, 16 26 %ins = or i64 %4, %1 27 tail call void @bar(i64 %ins) nounwind 28 ret void 29 } 30 31 ; CHECK: byte 32 ; CHECK: combine(#0 33 34 define void @byte(i8* nocapture %a) nounwind { 35 entry: 36 %0 = load i8* %a, align 1 37 %1 = zext i8 %0 to i64 38 %add.ptr = getelementptr inbounds i8* %a, i32 1 39 %2 = load i8* %add.ptr, align 1 40 %3 = zext i8 %2 to i64 41 %4 = shl nuw nsw i64 %3, 8 42 %ins = or i64 %4, %1 43 tail call void @bar(i64 %ins) nounwind 44 ret void 45 } 46
