1 ; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s 2 ; Check that we are able to predicate instructions with gp-relative 3 ; addressing mode. 4 5 @d = external global i32 6 @c = common global i32 0, align 4 7 8 ; Function Attrs: nounwind 9 define i32 @test2(i8 zeroext %a, i8 zeroext %b) #0 { 10 ; CHECK: if{{ *}}({{!*}}p{{[0-3]+}}{{[.new]*}}){{ *}}r{{[0-9]+}}{{ *}}={{ *}}memw(##{{[cd]}}) 11 ; CHECK: if{{ *}}({{!*}}p{{[0-3]+}}){{ *}}r{{[0-9]+}}{{ *}}={{ *}}memw(##{{[cd]}}) 12 entry: 13 %cmp = icmp eq i8 %a, %b 14 br i1 %cmp, label %if.then, label %entry.if.end_crit_edge 15 16 entry.if.end_crit_edge: 17 %.pre = load i32* @c, align 4 18 br label %if.end 19 20 if.then: 21 %0 = load i32* @d, align 4 22 store i32 %0, i32* @c, align 4 23 br label %if.end 24 25 if.end: 26 %1 = phi i32 [ %.pre, %entry.if.end_crit_edge ], [ %0, %if.then ] 27 ret i32 %1 28 } 29
