1 ; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s 2 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s 3 4 5 ;; Integer conversions happen inplicitly by loading/storing the proper types 6 7 8 ; i16 9 10 define i16 @cvt_i16_i32(i32 %x) { 11 ; CHECK: ld.param.u16 %r[[R0:[0-9]+]], [cvt_i16_i32_param_{{[0-9]+}}] 12 ; CHECK: st.param.b32 [func_retval{{[0-9]+}}+0], %r[[R0]] 13 ; CHECK: ret 14 %a = trunc i32 %x to i16 15 ret i16 %a 16 } 17 18 define i16 @cvt_i16_i64(i64 %x) { 19 ; CHECK: ld.param.u16 %r[[R0:[0-9]+]], [cvt_i16_i64_param_{{[0-9]+}}] 20 ; CHECK: st.param.b32 [func_retval{{[0-9]+}}+0], %r[[R0]] 21 ; CHECK: ret 22 %a = trunc i64 %x to i16 23 ret i16 %a 24 } 25 26 27 28 ; i32 29 30 define i32 @cvt_i32_i16(i16 %x) { 31 ; CHECK: ld.param.u16 %r[[R0:[0-9]+]], [cvt_i32_i16_param_{{[0-9]+}}] 32 ; CHECK: st.param.b32 [func_retval{{[0-9]+}}+0], %r[[R0]] 33 ; CHECK: ret 34 %a = zext i16 %x to i32 35 ret i32 %a 36 } 37 38 define i32 @cvt_i32_i64(i64 %x) { 39 ; CHECK: ld.param.u32 %r[[R0:[0-9]+]], [cvt_i32_i64_param_{{[0-9]+}}] 40 ; CHECK: st.param.b32 [func_retval{{[0-9]+}}+0], %r[[R0]] 41 ; CHECK: ret 42 %a = trunc i64 %x to i32 43 ret i32 %a 44 } 45 46 47 48 ; i64 49 50 define i64 @cvt_i64_i16(i16 %x) { 51 ; CHECK: ld.param.u16 %rl[[R0:[0-9]+]], [cvt_i64_i16_param_{{[0-9]+}}] 52 ; CHECK: st.param.b64 [func_retval{{[0-9]+}}+0], %rl[[R0]] 53 ; CHECK: ret 54 %a = zext i16 %x to i64 55 ret i64 %a 56 } 57 58 define i64 @cvt_i64_i32(i32 %x) { 59 ; CHECK: ld.param.u32 %rl[[R0:[0-9]+]], [cvt_i64_i32_param_{{[0-9]+}}] 60 ; CHECK: st.param.b64 [func_retval{{[0-9]+}}+0], %rl[[R0]] 61 ; CHECK: ret 62 %a = zext i32 %x to i64 63 ret i64 %a 64 } 65
