1 ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK 2 ; RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=SI-CHECK 3 4 ; R600-CHECK: @build_vector2 5 ; R600-CHECK: MOV 6 ; R600-CHECK: MOV 7 ; R600-CHECK-NOT: MOV 8 ; SI-CHECK: @build_vector2 9 ; SI-CHECK-DAG: V_MOV_B32_e32 v[[X:[0-9]]], 5 10 ; SI-CHECK-DAG: V_MOV_B32_e32 v[[Y:[0-9]]], 6 11 ; SI-CHECK: BUFFER_STORE_DWORDX2 v{{\[}}[[X]]:[[Y]]{{\]}} 12 define void @build_vector2 (<2 x i32> addrspace(1)* %out) { 13 entry: 14 store <2 x i32> <i32 5, i32 6>, <2 x i32> addrspace(1)* %out 15 ret void 16 } 17 18 ; R600-CHECK: @build_vector4 19 ; R600-CHECK: MOV 20 ; R600-CHECK: MOV 21 ; R600-CHECK: MOV 22 ; R600-CHECK: MOV 23 ; R600-CHECK-NOT: MOV 24 ; SI-CHECK: @build_vector4 25 ; SI-CHECK-DAG: V_MOV_B32_e32 v[[X:[0-9]]], 5 26 ; SI-CHECK-DAG: V_MOV_B32_e32 v[[Y:[0-9]]], 6 27 ; SI-CHECK-DAG: V_MOV_B32_e32 v[[Z:[0-9]]], 7 28 ; SI-CHECK-DAG: V_MOV_B32_e32 v[[W:[0-9]]], 8 29 ; SI-CHECK: BUFFER_STORE_DWORDX4 v{{\[}}[[X]]:[[W]]{{\]}} 30 define void @build_vector4 (<4 x i32> addrspace(1)* %out) { 31 entry: 32 store <4 x i32> <i32 5, i32 6, i32 7, i32 8>, <4 x i32> addrspace(1)* %out 33 ret void 34 } 35
