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      1 ; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
      2 
      3 declare float @llvm.AMDGPU.rcp.f32(float) nounwind readnone
      4 declare double @llvm.AMDGPU.rcp.f64(double) nounwind readnone
      5 
      6 
      7 declare float @llvm.sqrt.f32(float) nounwind readnone
      8 declare double @llvm.sqrt.f64(double) nounwind readnone
      9 
     10 ; FUNC-LABEL: @rcp_f32
     11 ; SI: V_RCP_F32_e32
     12 define void @rcp_f32(float addrspace(1)* %out, float %src) nounwind {
     13   %rcp = call float @llvm.AMDGPU.rcp.f32(float %src) nounwind readnone
     14   store float %rcp, float addrspace(1)* %out, align 4
     15   ret void
     16 }
     17 
     18 ; FUNC-LABEL: @rcp_f64
     19 ; SI: V_RCP_F64_e32
     20 define void @rcp_f64(double addrspace(1)* %out, double %src) nounwind {
     21   %rcp = call double @llvm.AMDGPU.rcp.f64(double %src) nounwind readnone
     22   store double %rcp, double addrspace(1)* %out, align 8
     23   ret void
     24 }
     25 
     26 ; FUNC-LABEL: @rcp_pat_f32
     27 ; SI: V_RCP_F32_e32
     28 define void @rcp_pat_f32(float addrspace(1)* %out, float %src) nounwind {
     29   %rcp = fdiv float 1.0, %src
     30   store float %rcp, float addrspace(1)* %out, align 4
     31   ret void
     32 }
     33 
     34 ; FUNC-LABEL: @rcp_pat_f64
     35 ; SI: V_RCP_F64_e32
     36 define void @rcp_pat_f64(double addrspace(1)* %out, double %src) nounwind {
     37   %rcp = fdiv double 1.0, %src
     38   store double %rcp, double addrspace(1)* %out, align 8
     39   ret void
     40 }
     41 
     42 ; FUNC-LABEL: @rsq_rcp_pat_f32
     43 ; SI: V_RSQ_F32_e32
     44 define void @rsq_rcp_pat_f32(float addrspace(1)* %out, float %src) nounwind {
     45   %sqrt = call float @llvm.sqrt.f32(float %src) nounwind readnone
     46   %rcp = call float @llvm.AMDGPU.rcp.f32(float %sqrt) nounwind readnone
     47   store float %rcp, float addrspace(1)* %out, align 4
     48   ret void
     49 }
     50 
     51 ; FUNC-LABEL: @rsq_rcp_pat_f64
     52 ; SI: V_RSQ_F64_e32
     53 define void @rsq_rcp_pat_f64(double addrspace(1)* %out, double %src) nounwind {
     54   %sqrt = call double @llvm.sqrt.f64(double %src) nounwind readnone
     55   %rcp = call double @llvm.AMDGPU.rcp.f64(double %sqrt) nounwind readnone
     56   store double %rcp, double addrspace(1)* %out, align 8
     57   ret void
     58 }
     59