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      1 ; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 | FileCheck %s
      2 
      3 ; Make sure that we don't crash when legalizing vselect and vsetcc and that
      4 ; we are able to generate vector blend instructions.
      5 
      6 ; CHECK-LABEL: simple_widen
      7 ; CHECK-NOT: blend
      8 ; CHECK: ret
      9 define void @simple_widen() {
     10 entry:
     11   %0 = select <2 x i1> undef, <2 x float> undef, <2 x float> undef
     12   store <2 x float> %0, <2 x float>* undef
     13   ret void
     14 }
     15 
     16 ; CHECK-LABEL: complex_inreg_work
     17 ; CHECK: blend
     18 ; CHECK: ret
     19 
     20 define void @complex_inreg_work() {
     21 entry:
     22   %0 = fcmp oeq <2 x float> undef, undef
     23   %1 = select <2 x i1> %0, <2 x float> undef, <2 x float> undef
     24   store <2 x float> %1, <2 x float>* undef
     25   ret void
     26 }
     27 
     28 ; CHECK-LABEL: zero_test
     29 ; CHECK: xorps	%xmm0, %xmm0
     30 ; CHECK: ret
     31 
     32 define void @zero_test() {
     33 entry:
     34   %0 = select <2 x i1> undef, <2 x float> undef, <2 x float> zeroinitializer
     35   store <2 x float> %0, <2 x float>* undef
     36   ret void
     37 }
     38 
     39 ; CHECK-LABEL: full_test
     40 ; CHECK: blend
     41 ; CHECK: ret
     42 
     43 define void @full_test() {
     44  entry:
     45    %Cy300 = alloca <4 x float>
     46    %Cy11a = alloca <2 x float>
     47    %Cy118 = alloca <2 x float>
     48    %Cy119 = alloca <2 x float>
     49    br label %B1
     50 
     51  B1:                                               ; preds = %entry
     52    %0 = load <2 x float>* %Cy119
     53    %1 = fptosi <2 x float> %0 to <2 x i32>
     54    %2 = sitofp <2 x i32> %1 to <2 x float>
     55    %3 = fcmp ogt <2 x float> %0, zeroinitializer
     56    %4 = fadd <2 x float> %2, <float 1.000000e+00, float 1.000000e+00>
     57    %5 = select <2 x i1> %3, <2 x float> %4, <2 x float> %2
     58    %6 = fcmp oeq <2 x float> %2, %0
     59    %7 = select <2 x i1> %6, <2 x float> %0, <2 x float> %5
     60    store <2 x float> %7, <2 x float>* %Cy118
     61    %8 = load <2 x float>* %Cy118
     62    store <2 x float> %8, <2 x float>* %Cy11a
     63    ret void
     64 }
     65 
     66 
     67