1 ; RUN: llc < %s -mcpu=generic -march=x86 | FileCheck %s -check-prefix=X32 2 ; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s -check-prefix=X64 3 ; RUN: llc < %s -mcpu=generic -mtriple=x86_64-win32 | FileCheck %s -check-prefix=X64 4 5 ; The immediate can be encoded in a smaller way if the 6 ; instruction is a sub instead of an add. 7 8 define i32 @test1(i32 inreg %a) nounwind { 9 %b = add i32 %a, 128 10 ret i32 %b 11 ; X32: subl $-128, %eax 12 ; X64: subl $-128, 13 } 14 define i64 @test2(i64 inreg %a) nounwind { 15 %b = add i64 %a, 2147483648 16 ret i64 %b 17 ; X32: addl $-2147483648, %eax 18 ; X64: subq $-2147483648, 19 } 20 define i64 @test3(i64 inreg %a) nounwind { 21 %b = add i64 %a, 128 22 ret i64 %b 23 24 ; X32: addl $128, %eax 25 ; X64: subq $-128, 26 } 27 28 define i1 @test4(i32 %v1, i32 %v2, i32* %X) nounwind { 29 entry: 30 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %v1, i32 %v2) 31 %sum = extractvalue {i32, i1} %t, 0 32 %obit = extractvalue {i32, i1} %t, 1 33 br i1 %obit, label %overflow, label %normal 34 35 normal: 36 store i32 0, i32* %X 37 br label %overflow 38 39 overflow: 40 ret i1 false 41 42 ; X32-LABEL: test4: 43 ; X32: addl 44 ; X32-NEXT: jo 45 46 ; X64-LABEL: test4: 47 ; X64: addl %e[[A1:si|dx]], %e[[A0:di|cx]] 48 ; X64-NEXT: jo 49 } 50 51 define i1 @test5(i32 %v1, i32 %v2, i32* %X) nounwind { 52 entry: 53 %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %v1, i32 %v2) 54 %sum = extractvalue {i32, i1} %t, 0 55 %obit = extractvalue {i32, i1} %t, 1 56 br i1 %obit, label %carry, label %normal 57 58 normal: 59 store i32 0, i32* %X 60 br label %carry 61 62 carry: 63 ret i1 false 64 65 ; X32-LABEL: test5: 66 ; X32: addl 67 ; X32-NEXT: jb 68 69 ; X64-LABEL: test5: 70 ; X64: addl %e[[A1]], %e[[A0]] 71 ; X64-NEXT: jb 72 } 73 74 declare {i32, i1} @llvm.sadd.with.overflow.i32(i32, i32) 75 declare {i32, i1} @llvm.uadd.with.overflow.i32(i32, i32) 76 77 78 define i64 @test6(i64 %A, i32 %B) nounwind { 79 %tmp12 = zext i32 %B to i64 ; <i64> [#uses=1] 80 %tmp3 = shl i64 %tmp12, 32 ; <i64> [#uses=1] 81 %tmp5 = add i64 %tmp3, %A ; <i64> [#uses=1] 82 ret i64 %tmp5 83 84 ; X32-LABEL: test6: 85 ; X32: movl 4(%esp), %eax 86 ; X32-NEXT: movl 12(%esp), %edx 87 ; X32-NEXT: addl 8(%esp), %edx 88 ; X32-NEXT: ret 89 90 ; X64-LABEL: test6: 91 ; X64: shlq $32, %r[[A1]] 92 ; X64: leaq (%r[[A1]],%r[[A0]]), %rax 93 ; X64: ret 94 } 95 96 define {i32, i1} @test7(i32 %v1, i32 %v2) nounwind { 97 %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %v1, i32 %v2) 98 ret {i32, i1} %t 99 } 100 101 ; X64-LABEL: test7: 102 ; X64: addl %e[[A1]], %e 103 ; X64-NEXT: setb %dl 104 ; X64: ret 105 106 ; PR5443 107 define {i64, i1} @test8(i64 %left, i64 %right) nounwind { 108 entry: 109 %extleft = zext i64 %left to i65 110 %extright = zext i64 %right to i65 111 %sum = add i65 %extleft, %extright 112 %res.0 = trunc i65 %sum to i64 113 %overflow = and i65 %sum, -18446744073709551616 114 %res.1 = icmp ne i65 %overflow, 0 115 %final0 = insertvalue {i64, i1} undef, i64 %res.0, 0 116 %final1 = insertvalue {i64, i1} %final0, i1 %res.1, 1 117 ret {i64, i1} %final1 118 } 119 120 ; X64-LABEL: test8: 121 ; X64: addq 122 ; X64-NEXT: setb 123 ; X64: ret 124 125 define i32 @test9(i32 %x, i32 %y) nounwind readnone { 126 %cmp = icmp eq i32 %x, 10 127 %sub = sext i1 %cmp to i32 128 %cond = add i32 %sub, %y 129 ret i32 %cond 130 ; X64-LABEL: test9: 131 ; X64: cmpl $10 132 ; X64: sete 133 ; X64: subl 134 ; X64: ret 135 } 136 137 define i1 @test10(i32 %x) nounwind { 138 entry: 139 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %x, i32 1) 140 %obit = extractvalue {i32, i1} %t, 1 141 ret i1 %obit 142 143 ; X32-LABEL: test10: 144 ; X32: incl 145 ; X32-NEXT: seto 146 147 ; X64-LABEL: test10: 148 ; X64: incl 149 ; X64-NEXT: seto 150 } 151
