1 ; RUN: llc < %s -fast-isel -fast-isel-abort -mtriple=x86_64-apple-darwin10 | FileCheck %s 2 3 define i32 @fcmp_oeq1(float %x) { 4 ; CHECK-LABEL: fcmp_oeq1 5 ; CHECK: ucomiss %xmm0, %xmm0 6 ; CHECK-NEXT: jp {{LBB.+_1}} 7 %1 = fcmp oeq float %x, %x 8 br i1 %1, label %bb1, label %bb2 9 bb2: 10 ret i32 1 11 bb1: 12 ret i32 0 13 } 14 15 define i32 @fcmp_oeq2(float %x) { 16 ; CHECK-LABEL: fcmp_oeq2 17 ; CHECK: xorps %xmm1, %xmm1 18 ; CHECK-NEXT: ucomiss %xmm1, %xmm0 19 ; CHECK-NEXT: jne {{LBB.+_1}} 20 ; CHECK-NEXT: jnp {{LBB.+_2}} 21 %1 = fcmp oeq float %x, 0.000000e+00 22 br i1 %1, label %bb1, label %bb2 23 bb2: 24 ret i32 1 25 bb1: 26 ret i32 0 27 } 28 29 define i32 @fcmp_ogt1(float %x) { 30 ; CHECK-LABEL: fcmp_ogt1 31 ; CHECK-NOT: ucomiss 32 ; CHECK: movl $1, %eax 33 %1 = fcmp ogt float %x, %x 34 br i1 %1, label %bb1, label %bb2 35 bb2: 36 ret i32 1 37 bb1: 38 ret i32 0 39 } 40 41 define i32 @fcmp_ogt2(float %x) { 42 ; CHECK-LABEL: fcmp_ogt2 43 ; CHECK: xorps %xmm1, %xmm1 44 ; CHECK-NEXT: ucomiss %xmm1, %xmm0 45 ; CHECK-NEXT: jbe {{LBB.+_1}} 46 %1 = fcmp ogt float %x, 0.000000e+00 47 br i1 %1, label %bb1, label %bb2 48 bb2: 49 ret i32 1 50 bb1: 51 ret i32 0 52 } 53 54 define i32 @fcmp_oge1(float %x) { 55 ; CHECK-LABEL: fcmp_oge1 56 ; CHECK: ucomiss %xmm0, %xmm0 57 ; CHECK-NEXT: jp {{LBB.+_1}} 58 %1 = fcmp oge float %x, %x 59 br i1 %1, label %bb1, label %bb2 60 bb2: 61 ret i32 1 62 bb1: 63 ret i32 0 64 } 65 66 define i32 @fcmp_oge2(float %x) { 67 ; CHECK-LABEL: fcmp_oge2 68 ; CHECK: xorps %xmm1, %xmm1 69 ; CHECK-NEXT: ucomiss %xmm1, %xmm0 70 ; CHECK-NEXT: jb {{LBB.+_1}} 71 %1 = fcmp oge float %x, 0.000000e+00 72 br i1 %1, label %bb1, label %bb2 73 bb2: 74 ret i32 1 75 bb1: 76 ret i32 0 77 } 78 79 define i32 @fcmp_olt1(float %x) { 80 ; CHECK-LABEL: fcmp_olt1 81 ; CHECK-NOT: ucomiss 82 ; CHECK: movl $1, %eax 83 %1 = fcmp olt float %x, %x 84 br i1 %1, label %bb1, label %bb2 85 bb2: 86 ret i32 1 87 bb1: 88 ret i32 0 89 } 90 91 define i32 @fcmp_olt2(float %x) { 92 ; CHECK-LABEL: fcmp_olt2 93 ; CHECK: xorps %xmm1, %xmm1 94 ; CHECK-NEXT: ucomiss %xmm0, %xmm1 95 ; CHECK-NEXT: jbe {{LBB.+_1}} 96 %1 = fcmp olt float %x, 0.000000e+00 97 br i1 %1, label %bb1, label %bb2 98 bb2: 99 ret i32 1 100 bb1: 101 ret i32 0 102 } 103 104 define i32 @fcmp_ole1(float %x) { 105 ; CHECK-LABEL: fcmp_ole1 106 ; CHECK: ucomiss %xmm0, %xmm0 107 ; CHECK-NEXT: jp {{LBB.+_1}} 108 %1 = fcmp ole float %x, %x 109 br i1 %1, label %bb1, label %bb2 110 bb2: 111 ret i32 1 112 bb1: 113 ret i32 0 114 } 115 116 define i32 @fcmp_ole2(float %x) { 117 ; CHECK-LABEL: fcmp_ole2 118 ; CHECK: xorps %xmm1, %xmm1 119 ; CHECK-NEXT: ucomiss %xmm0, %xmm1 120 ; CHECK-NEXT: jb {{LBB.+_1}} 121 %1 = fcmp ole float %x, 0.000000e+00 122 br i1 %1, label %bb1, label %bb2 123 bb2: 124 ret i32 1 125 bb1: 126 ret i32 0 127 } 128 129 define i32 @fcmp_one1(float %x) { 130 ; CHECK-LABEL: fcmp_one1 131 ; CHECK-NOT: ucomiss 132 ; CHECK: movl $1, %eax 133 %1 = fcmp one float %x, %x 134 br i1 %1, label %bb1, label %bb2 135 bb2: 136 ret i32 1 137 bb1: 138 ret i32 0 139 } 140 141 define i32 @fcmp_one2(float %x) { 142 ; CHECK-LABEL: fcmp_one2 143 ; CHECK: xorps %xmm1, %xmm1 144 ; CHECK-NEXT: ucomiss %xmm1, %xmm0 145 ; CHECK-NEXT: je {{LBB.+_1}} 146 %1 = fcmp one float %x, 0.000000e+00 147 br i1 %1, label %bb1, label %bb2 148 bb2: 149 ret i32 1 150 bb1: 151 ret i32 0 152 } 153 154 define i32 @fcmp_ord1(float %x) { 155 ; CHECK-LABEL: fcmp_ord1 156 ; CHECK: ucomiss %xmm0, %xmm0 157 ; CHECK-NEXT: jp {{LBB.+_1}} 158 %1 = fcmp ord float %x, %x 159 br i1 %1, label %bb1, label %bb2 160 bb2: 161 ret i32 1 162 bb1: 163 ret i32 0 164 } 165 166 define i32 @fcmp_ord2(float %x) { 167 ; CHECK-LABEL: fcmp_ord2 168 ; CHECK: ucomiss %xmm0, %xmm0 169 ; CHECK-NEXT: jp {{LBB.+_1}} 170 %1 = fcmp ord float %x, 0.000000e+00 171 br i1 %1, label %bb1, label %bb2 172 bb2: 173 ret i32 1 174 bb1: 175 ret i32 0 176 } 177 178 define i32 @fcmp_uno1(float %x) { 179 ; CHECK-LABEL: fcmp_uno1 180 ; CHECK: ucomiss %xmm0, %xmm0 181 ; CHECK-NEXT: jp {{LBB.+_2}} 182 %1 = fcmp uno float %x, %x 183 br i1 %1, label %bb1, label %bb2 184 bb2: 185 ret i32 1 186 bb1: 187 ret i32 0 188 } 189 190 define i32 @fcmp_uno2(float %x) { 191 ; CHECK-LABEL: fcmp_uno2 192 ; CHECK: ucomiss %xmm0, %xmm0 193 ; CHECK-NEXT: jp {{LBB.+_2}} 194 %1 = fcmp uno float %x, 0.000000e+00 195 br i1 %1, label %bb1, label %bb2 196 bb2: 197 ret i32 1 198 bb1: 199 ret i32 0 200 } 201 202 define i32 @fcmp_ueq1(float %x) { 203 ; CHECK-LABEL: fcmp_ueq1 204 ; CHECK-NOT: ucomiss 205 %1 = fcmp ueq float %x, %x 206 br i1 %1, label %bb1, label %bb2 207 bb2: 208 ret i32 1 209 bb1: 210 ret i32 0 211 } 212 213 define i32 @fcmp_ueq2(float %x) { 214 ; CHECK-LABEL: fcmp_ueq2 215 ; CHECK: xorps %xmm1, %xmm1 216 ; CHECK-NEXT: ucomiss %xmm1, %xmm0 217 ; CHECK-NEXT: je {{LBB.+_2}} 218 %1 = fcmp ueq float %x, 0.000000e+00 219 br i1 %1, label %bb1, label %bb2 220 bb2: 221 ret i32 1 222 bb1: 223 ret i32 0 224 } 225 226 define i32 @fcmp_ugt1(float %x) { 227 ; CHECK-LABEL: fcmp_ugt1 228 ; CHECK: ucomiss %xmm0, %xmm0 229 ; CHECK-NEXT: jnp {{LBB.+_1}} 230 %1 = fcmp ugt float %x, %x 231 br i1 %1, label %bb1, label %bb2 232 bb2: 233 ret i32 1 234 bb1: 235 ret i32 0 236 } 237 238 define i32 @fcmp_ugt2(float %x) { 239 ; CHECK-LABEL: fcmp_ugt2 240 ; CHECK: xorps %xmm1, %xmm1 241 ; CHECK-NEXT: ucomiss %xmm0, %xmm1 242 ; CHECK-NEXT: jae {{LBB.+_1}} 243 %1 = fcmp ugt float %x, 0.000000e+00 244 br i1 %1, label %bb1, label %bb2 245 bb2: 246 ret i32 1 247 bb1: 248 ret i32 0 249 } 250 251 define i32 @fcmp_uge1(float %x) { 252 ; CHECK-LABEL: fcmp_uge1 253 ; CHECK-NOT: ucomiss 254 %1 = fcmp uge float %x, %x 255 br i1 %1, label %bb1, label %bb2 256 bb2: 257 ret i32 1 258 bb1: 259 ret i32 0 260 } 261 262 define i32 @fcmp_uge2(float %x) { 263 ; CHECK-LABEL: fcmp_uge2 264 ; CHECK: xorps %xmm1, %xmm1 265 ; CHECK-NEXT: ucomiss %xmm0, %xmm1 266 ; CHECK-NEXT: ja {{LBB.+_1}} 267 %1 = fcmp uge float %x, 0.000000e+00 268 br i1 %1, label %bb1, label %bb2 269 bb2: 270 ret i32 1 271 bb1: 272 ret i32 0 273 } 274 275 define i32 @fcmp_ult1(float %x) { 276 ; CHECK-LABEL: fcmp_ult1 277 ; CHECK: ucomiss %xmm0, %xmm0 278 ; CHECK-NEXT: jnp {{LBB.+_1}} 279 %1 = fcmp ult float %x, %x 280 br i1 %1, label %bb1, label %bb2 281 bb2: 282 ret i32 1 283 bb1: 284 ret i32 0 285 } 286 287 define i32 @fcmp_ult2(float %x) { 288 ; CHECK-LABEL: fcmp_ult2 289 ; CHECK: xorps %xmm1, %xmm1 290 ; CHECK-NEXT: ucomiss %xmm1, %xmm0 291 ; CHECK-NEXT: jae {{LBB.+_1}} 292 %1 = fcmp ult float %x, 0.000000e+00 293 br i1 %1, label %bb1, label %bb2 294 bb2: 295 ret i32 1 296 bb1: 297 ret i32 0 298 } 299 300 define i32 @fcmp_ule1(float %x) { 301 ; CHECK-LABEL: fcmp_ule1 302 ; CHECK-NOT: ucomiss 303 %1 = fcmp ule float %x, %x 304 br i1 %1, label %bb1, label %bb2 305 bb2: 306 ret i32 1 307 bb1: 308 ret i32 0 309 } 310 311 define i32 @fcmp_ule2(float %x) { 312 ; CHECK-LABEL: fcmp_ule2 313 ; CHECK: xorps %xmm1, %xmm1 314 ; CHECK-NEXT: ucomiss %xmm1, %xmm0 315 ; CHECK-NEXT: ja {{LBB.+_1}} 316 %1 = fcmp ule float %x, 0.000000e+00 317 br i1 %1, label %bb1, label %bb2 318 bb2: 319 ret i32 1 320 bb1: 321 ret i32 0 322 } 323 324 define i32 @fcmp_une1(float %x) { 325 ; CHECK-LABEL: fcmp_une1 326 ; CHECK: ucomiss %xmm0, %xmm0 327 ; CHECK-NEXT: jnp {{LBB.+_1}} 328 %1 = fcmp une float %x, %x 329 br i1 %1, label %bb1, label %bb2 330 bb2: 331 ret i32 1 332 bb1: 333 ret i32 0 334 } 335 336 define i32 @fcmp_une2(float %x) { 337 ; CHECK-LABEL: fcmp_une2 338 ; CHECK: xorps %xmm1, %xmm1 339 ; CHECK-NEXT: ucomiss %xmm1, %xmm0 340 ; CHECK-NEXT: jne {{LBB.+_2}} 341 ; CHECK-NEXT: jp {{LBB.+_2}} 342 ; CHECK-NEXT: jmp {{LBB.+_1}} 343 %1 = fcmp une float %x, 0.000000e+00 344 br i1 %1, label %bb1, label %bb2 345 bb2: 346 ret i32 1 347 bb1: 348 ret i32 0 349 } 350 351 define i32 @icmp_eq(i32 %x) { 352 ; CHECK-LABEL: icmp_eq 353 ; CHECK-NOT: cmpl 354 ; CHECK: movl $0, %eax 355 %1 = icmp eq i32 %x, %x 356 br i1 %1, label %bb1, label %bb2 357 bb2: 358 ret i32 1 359 bb1: 360 ret i32 0 361 } 362 363 define i32 @icmp_ne(i32 %x) { 364 ; CHECK-LABEL: icmp_ne 365 ; CHECK-NOT: cmpl 366 ; CHECK: movl $1, %eax 367 %1 = icmp ne i32 %x, %x 368 br i1 %1, label %bb1, label %bb2 369 bb2: 370 ret i32 1 371 bb1: 372 ret i32 0 373 } 374 375 define i32 @icmp_ugt(i32 %x) { 376 ; CHECK-LABEL: icmp_ugt 377 ; CHECK-NOT: cmpl 378 ; CHECK: movl $1, %eax 379 %1 = icmp ugt i32 %x, %x 380 br i1 %1, label %bb1, label %bb2 381 bb2: 382 ret i32 1 383 bb1: 384 ret i32 0 385 } 386 387 define i32 @icmp_uge(i32 %x) { 388 ; CHECK-LABEL: icmp_uge 389 ; CHECK-NOT: cmpl 390 ; CHECK: movl $0, %eax 391 %1 = icmp uge i32 %x, %x 392 br i1 %1, label %bb1, label %bb2 393 bb2: 394 ret i32 1 395 bb1: 396 ret i32 0 397 } 398 399 define i32 @icmp_ult(i32 %x) { 400 ; CHECK-LABEL: icmp_ult 401 ; CHECK-NOT: cmpl 402 ; CHECK: movl $1, %eax 403 %1 = icmp ult i32 %x, %x 404 br i1 %1, label %bb1, label %bb2 405 bb2: 406 ret i32 1 407 bb1: 408 ret i32 0 409 } 410 411 define i32 @icmp_ule(i32 %x) { 412 ; CHECK-LABEL: icmp_ule 413 ; CHECK-NOT: cmpl 414 ; CHECK: movl $0, %eax 415 %1 = icmp ule i32 %x, %x 416 br i1 %1, label %bb1, label %bb2 417 bb2: 418 ret i32 1 419 bb1: 420 ret i32 0 421 } 422 423 define i32 @icmp_sgt(i32 %x) { 424 ; CHECK-LABEL: icmp_sgt 425 ; CHECK-NOT: cmpl 426 ; CHECK: movl $1, %eax 427 %1 = icmp sgt i32 %x, %x 428 br i1 %1, label %bb1, label %bb2 429 bb2: 430 ret i32 1 431 bb1: 432 ret i32 0 433 } 434 435 define i32 @icmp_sge(i32 %x) { 436 ; CHECK-LABEL: icmp_sge 437 ; CHECK-NOT: cmpl 438 ; CHECK: movl $0, %eax 439 %1 = icmp sge i32 %x, %x 440 br i1 %1, label %bb1, label %bb2 441 bb2: 442 ret i32 1 443 bb1: 444 ret i32 0 445 } 446 447 define i32 @icmp_slt(i32 %x) { 448 ; CHECK-LABEL: icmp_slt 449 ; CHECK-NOT: cmpl 450 ; CHECK: movl $1, %eax 451 %1 = icmp slt i32 %x, %x 452 br i1 %1, label %bb1, label %bb2 453 bb2: 454 ret i32 1 455 bb1: 456 ret i32 0 457 } 458 459 define i32 @icmp_sle(i32 %x) { 460 ; CHECK-LABEL: icmp_sle 461 ; CHECK-NOT: cmpl 462 ; CHECK: movl $0, %eax 463 %1 = icmp sle i32 %x, %x 464 br i1 %1, label %bb1, label %bb2 465 bb2: 466 ret i32 1 467 bb1: 468 ret i32 0 469 } 470 471
