1 ; RUN: llc < %s -regalloc=fast -optimize-regalloc=0 -verify-machineinstrs -mtriple=x86_64-apple-darwin10 2 ; <rdar://problem/7755473> 3 ; PR12821 4 5 %0 = type { i32, i8*, i8*, %1*, i8*, i64, i64, i32, i32, i32, i32, [1024 x i8] } 6 %1 = type { i8*, i32, i32, i16, i16, %2, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %2, %3*, i32, [3 x i8], [1 x i8], %2, i32, i64 } 7 %2 = type { i8*, i32 } 8 %3 = type opaque 9 10 declare fastcc i32 @func(%0*, i32, i32) nounwind ssp 11 12 define fastcc void @func2(%0* %arg, i32 %arg1) nounwind ssp { 13 bb: 14 br label %.exit3 15 16 .exit3: ; preds = %.exit3, %bb 17 switch i32 undef, label %.exit3 [ 18 i32 -1, label %.loopexit 19 i32 37, label %bb2 20 ] 21 22 bb2: ; preds = %bb5, %bb3, %.exit3 23 br i1 undef, label %bb3, label %bb5 24 25 bb3: ; preds = %bb2 26 switch i32 undef, label %infloop [ 27 i32 125, label %.loopexit 28 i32 -1, label %bb4 29 i32 37, label %bb2 30 ] 31 32 bb4: ; preds = %bb3 33 %tmp = add nsw i32 undef, 1 ; <i32> [#uses=1] 34 br label %.loopexit 35 36 bb5: ; preds = %bb2 37 switch i32 undef, label %infloop1 [ 38 i32 -1, label %.loopexit 39 i32 37, label %bb2 40 ] 41 42 .loopexit: ; preds = %bb5, %bb4, %bb3, %.exit3 43 %.04 = phi i32 [ %tmp, %bb4 ], [ undef, %bb3 ], [ undef, %.exit3 ], [ undef, %bb5 ] ; <i32> [#uses=2] 44 br i1 undef, label %bb8, label %bb6 45 46 bb6: ; preds = %.loopexit 47 %tmp7 = tail call fastcc i32 @func(%0* %arg, i32 %.04, i32 undef) nounwind ssp ; <i32> [#uses=0] 48 ret void 49 50 bb8: ; preds = %.loopexit 51 %tmp9 = sext i32 %.04 to i64 ; <i64> [#uses=1] 52 %tmp10 = getelementptr inbounds %0* %arg, i64 0, i32 11, i64 %tmp9 ; <i8*> [#uses=1] 53 store i8 0, i8* %tmp10, align 1 54 ret void 55 56 infloop: ; preds = %infloop, %bb3 57 br label %infloop 58 59 infloop1: ; preds = %infloop1, %bb5 60 br label %infloop1 61 } 62 63 64 ; RAFast would forget to add a super-register <imp-def> when rewriting: 65 ; %vreg10:sub_32bit<def,read-undef> = COPY %R9D<kill> 66 ; This trips up the machine code verifier. 67 define void @autogen_SD24657(i8*, i32*, i64*, i32, i64, i8) { 68 BB: 69 %A4 = alloca <16 x i16> 70 %A3 = alloca double 71 %A2 = alloca <2 x i8> 72 %A1 = alloca i1 73 %A = alloca i32 74 %L = load i8* %0 75 store i8 -37, i8* %0 76 %E = extractelement <4 x i64> zeroinitializer, i32 2 77 %Shuff = shufflevector <4 x i64> zeroinitializer, <4 x i64> zeroinitializer, <4 x i32> <i32 5, i32 7, i32 1, i32 3> 78 %I = insertelement <2 x i8> <i8 -1, i8 -1>, i8 %5, i32 1 79 %B = fadd float 0x45CDF5B1C0000000, 0x45CDF5B1C0000000 80 %FC = uitofp i32 275048 to double 81 %Sl = select i1 true, <2 x i8> %I, <2 x i8> <i8 -1, i8 -1> 82 %Cmp = icmp slt i64 0, %E 83 br label %CF 84 85 CF: ; preds = %BB 86 store i8 %5, i8* %0 87 store <2 x i8> %I, <2 x i8>* %A2 88 store i8 %5, i8* %0 89 store i8 %5, i8* %0 90 store i8 %5, i8* %0 91 ret void 92 } 93
