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      1 ; RUN: opt -S -codegenprepare -mcpu=core-avx2 %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-AVX2
      2 ; RUN: opt -S -codegenprepare -mcpu=corei7 %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-SSE2
      3 
      4 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
      5 target triple = "x86_64-apple-darwin10.9.0"
      6 
      7 define <16 x i8> @test_8bit(<16 x i8> %lhs, <16 x i8> %tmp, i1 %tst) {
      8 ; CHECK-LABEL: @test_8bit
      9 ; CHECK: if_true:
     10 ; CHECK-NOT: shufflevector
     11 
     12 ; CHECK: if_false:
     13 ; CHECK-NOT: shufflevector
     14 ; CHECK: shl <16 x i8> %lhs, %mask
     15   %mask = shufflevector <16 x i8> %tmp, <16 x i8> undef, <16 x i32> zeroinitializer
     16   br i1 %tst, label %if_true, label %if_false
     17 
     18 if_true:
     19   ret <16 x i8> %mask
     20 
     21 if_false:
     22   %res = shl <16 x i8> %lhs, %mask
     23   ret <16 x i8> %res
     24 }
     25 
     26 define <8 x i16> @test_16bit(<8 x i16> %lhs, <8 x i16> %tmp, i1 %tst) {
     27 ; CHECK-LABEL: @test_16bit
     28 ; CHECK: if_true:
     29 ; CHECK-NOT: shufflevector
     30 
     31 ; CHECK: if_false:
     32 ; CHECK: [[SPLAT:%[0-9a-zA-Z_]+]] = shufflevector
     33 ; CHECK: shl <8 x i16> %lhs, [[SPLAT]]
     34   %mask = shufflevector <8 x i16> %tmp, <8 x i16> undef, <8 x i32> zeroinitializer
     35   br i1 %tst, label %if_true, label %if_false
     36 
     37 if_true:
     38   ret <8 x i16> %mask
     39 
     40 if_false:
     41   %res = shl <8 x i16> %lhs, %mask
     42   ret <8 x i16> %res
     43 }
     44 
     45 define <4 x i32> @test_notsplat(<4 x i32> %lhs, <4 x i32> %tmp, i1 %tst) {
     46 ; CHECK-LABEL: @test_notsplat
     47 ; CHECK: if_true:
     48 ; CHECK-NOT: shufflevector
     49 
     50 ; CHECK: if_false:
     51 ; CHECK-NOT: shufflevector
     52 ; CHECK: shl <4 x i32> %lhs, %mask
     53   %mask = shufflevector <4 x i32> %tmp, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 1, i32 0>
     54   br i1 %tst, label %if_true, label %if_false
     55 
     56 if_true:
     57   ret <4 x i32> %mask
     58 
     59 if_false:
     60   %res = shl <4 x i32> %lhs, %mask
     61   ret <4 x i32> %res
     62 }
     63 
     64 define <4 x i32> @test_32bit(<4 x i32> %lhs, <4 x i32> %tmp, i1 %tst) {
     65 ; CHECK-AVX2-LABEL: @test_32bit
     66 ; CHECK-AVX2: if_false:
     67 ; CHECK-AVX2-NOT: shufflevector
     68 ; CHECK-AVX2: ashr <4 x i32> %lhs, %mask
     69 
     70 ; CHECK-SSE2-LABEL: @test_32bit
     71 ; CHECK-SSE2: if_false:
     72 ; CHECK-SSE2: [[SPLAT:%[0-9a-zA-Z_]+]] = shufflevector
     73 ; CHECK-SSE2: ashr <4 x i32> %lhs, [[SPLAT]]
     74   %mask = shufflevector <4 x i32> %tmp, <4 x i32> undef, <4 x i32> <i32 0, i32 undef, i32 0, i32 0>
     75   br i1 %tst, label %if_true, label %if_false
     76 
     77 if_true:
     78   ret <4 x i32> %mask
     79 
     80 if_false:
     81   %res = ashr <4 x i32> %lhs, %mask
     82   ret <4 x i32> %res
     83 }
     84 
     85 define <2 x i64> @test_64bit(<2 x i64> %lhs, <2 x i64> %tmp, i1 %tst) {
     86 ; CHECK-AVX2-LABEL: @test_64bit
     87 ; CHECK-AVX2: if_false:
     88 ; CHECK-AVX2-NOT: shufflevector
     89 ; CHECK-AVX2: lshr <2 x i64> %lhs, %mask
     90 
     91 ; CHECK-SSE2-LABEL: @test_64bit
     92 ; CHECK-SSE2: if_false:
     93 ; CHECK-SSE2: [[SPLAT:%[0-9a-zA-Z_]+]] = shufflevector
     94 ; CHECK-SSE2: lshr <2 x i64> %lhs, [[SPLAT]]
     95 
     96   %mask = shufflevector <2 x i64> %tmp, <2 x i64> undef, <2 x i32> zeroinitializer
     97   br i1 %tst, label %if_true, label %if_false
     98 
     99 if_true:
    100   ret <2 x i64> %mask
    101 
    102 if_false:
    103   %res = lshr <2 x i64> %lhs, %mask
    104   ret <2 x i64> %res
    105 }
    106