1 /* General "disassemble this chunk" code. Used for debugging. */ 2 #include "config.h" 3 #include "disas/bfd.h" 4 #include "elf.h" 5 #include <errno.h> 6 7 #include "cpu.h" 8 #include "disas/disas.h" 9 10 typedef struct CPUDebug { 11 struct disassemble_info info; 12 CPUArchState *env; 13 } CPUDebug; 14 15 /* Filled in by elfload.c. Simplistic, but will do for now. */ 16 struct syminfo *syminfos = NULL; 17 18 /* Get LENGTH bytes from info's buffer, at target address memaddr. 19 Transfer them to myaddr. */ 20 int 21 buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length, 22 struct disassemble_info *info) 23 { 24 if (memaddr < info->buffer_vma 25 || memaddr + length > info->buffer_vma + info->buffer_length) 26 /* Out of bounds. Use EIO because GDB uses it. */ 27 return EIO; 28 memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length); 29 return 0; 30 } 31 32 /* Get LENGTH bytes from info's buffer, at target address memaddr. 33 Transfer them to myaddr. */ 34 static int 35 target_read_memory (bfd_vma memaddr, 36 bfd_byte *myaddr, 37 int length, 38 struct disassemble_info *info) 39 { 40 CPUDebug *s = container_of(info, CPUDebug, info); 41 42 cpu_memory_rw_debug(ENV_GET_CPU(s->env), memaddr, myaddr, length, 0); 43 return 0; 44 } 45 46 /* Print an error message. We can assume that this is in response to 47 an error return from buffer_read_memory. */ 48 void 49 perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info) 50 { 51 if (status != EIO) 52 /* Can't happen. */ 53 (*info->fprintf_func) (info->stream, "Unknown error %d\n", status); 54 else 55 /* Actually, address between memaddr and memaddr + len was 56 out of bounds. */ 57 (*info->fprintf_func) (info->stream, 58 "Address 0x%" PRIx64 " is out of bounds.\n", memaddr); 59 } 60 61 /* This could be in a separate file, to save minuscule amounts of space 62 in statically linked executables. */ 63 64 /* Just print the address is hex. This is included for completeness even 65 though both GDB and objdump provide their own (to print symbolic 66 addresses). */ 67 68 void 69 generic_print_address (bfd_vma addr, struct disassemble_info *info) 70 { 71 (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr); 72 } 73 74 /* Print address in hex, truncated to the width of a target virtual address. */ 75 static void 76 generic_print_target_address(bfd_vma addr, struct disassemble_info *info) 77 { 78 uint64_t mask = ~0ULL >> (64 - TARGET_VIRT_ADDR_SPACE_BITS); 79 generic_print_address(addr & mask, info); 80 } 81 82 /* Print address in hex, truncated to the width of a host virtual address. */ 83 static void 84 generic_print_host_address(bfd_vma addr, struct disassemble_info *info) 85 { 86 uint64_t mask = ~0ULL >> (64 - (sizeof(void *) * 8)); 87 generic_print_address(addr & mask, info); 88 } 89 90 /* Just return the given address. */ 91 92 int 93 generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info) 94 { 95 return 1; 96 } 97 98 bfd_vma bfd_getl64 (const bfd_byte *addr) 99 { 100 unsigned long long v; 101 102 v = (unsigned long long) addr[0]; 103 v |= (unsigned long long) addr[1] << 8; 104 v |= (unsigned long long) addr[2] << 16; 105 v |= (unsigned long long) addr[3] << 24; 106 v |= (unsigned long long) addr[4] << 32; 107 v |= (unsigned long long) addr[5] << 40; 108 v |= (unsigned long long) addr[6] << 48; 109 v |= (unsigned long long) addr[7] << 56; 110 return (bfd_vma) v; 111 } 112 113 bfd_vma bfd_getl32 (const bfd_byte *addr) 114 { 115 unsigned long v; 116 117 v = (unsigned long) addr[0]; 118 v |= (unsigned long) addr[1] << 8; 119 v |= (unsigned long) addr[2] << 16; 120 v |= (unsigned long) addr[3] << 24; 121 return (bfd_vma) v; 122 } 123 124 bfd_vma bfd_getb32 (const bfd_byte *addr) 125 { 126 unsigned long v; 127 128 v = (unsigned long) addr[0] << 24; 129 v |= (unsigned long) addr[1] << 16; 130 v |= (unsigned long) addr[2] << 8; 131 v |= (unsigned long) addr[3]; 132 return (bfd_vma) v; 133 } 134 135 bfd_vma bfd_getl16 (const bfd_byte *addr) 136 { 137 unsigned long v; 138 139 v = (unsigned long) addr[0]; 140 v |= (unsigned long) addr[1] << 8; 141 return (bfd_vma) v; 142 } 143 144 bfd_vma bfd_getb16 (const bfd_byte *addr) 145 { 146 unsigned long v; 147 148 v = (unsigned long) addr[0] << 24; 149 v |= (unsigned long) addr[1] << 16; 150 return (bfd_vma) v; 151 } 152 153 #ifdef TARGET_ARM 154 static int 155 print_insn_thumb1(bfd_vma pc, disassemble_info *info) 156 { 157 return print_insn_arm(pc | 1, info); 158 } 159 #endif 160 161 static int print_insn_objdump(bfd_vma pc, disassemble_info *info, 162 const char *prefix) 163 { 164 int i, n = info->buffer_length; 165 uint8_t *buf = g_malloc(n); 166 167 info->read_memory_func(pc, buf, n, info); 168 169 for (i = 0; i < n; ++i) { 170 if (i % 32 == 0) { 171 info->fprintf_func(info->stream, "\n%s: ", prefix); 172 } 173 info->fprintf_func(info->stream, "%02x", buf[i]); 174 } 175 176 g_free(buf); 177 return n; 178 } 179 180 static int print_insn_od_host(bfd_vma pc, disassemble_info *info) 181 { 182 return print_insn_objdump(pc, info, "OBJD-H"); 183 } 184 185 static int print_insn_od_target(bfd_vma pc, disassemble_info *info) 186 { 187 return print_insn_objdump(pc, info, "OBJD-T"); 188 } 189 190 /* Disassemble this for me please... (debugging). 'flags' has the following 191 values: 192 i386 - 1 means 16 bit code, 2 means 64 bit code 193 arm - bit 0 = thumb, bit 1 = reverse endian 194 ppc - nonzero means little endian 195 other targets - unused 196 */ 197 void target_disas(FILE *out, CPUArchState *env, target_ulong code, 198 target_ulong size, int flags) 199 { 200 target_ulong pc; 201 int count; 202 CPUDebug s; 203 int (*print_insn)(bfd_vma pc, disassemble_info *info) = NULL; 204 205 INIT_DISASSEMBLE_INFO(s.info, out, fprintf); 206 207 s.env = env; 208 s.info.read_memory_func = target_read_memory; 209 s.info.buffer_vma = code; 210 s.info.buffer_length = size; 211 s.info.print_address_func = generic_print_target_address; 212 213 #ifdef TARGET_WORDS_BIGENDIAN 214 s.info.endian = BFD_ENDIAN_BIG; 215 #else 216 s.info.endian = BFD_ENDIAN_LITTLE; 217 #endif 218 #if defined(TARGET_I386) 219 if (flags == 2) { 220 s.info.mach = bfd_mach_x86_64; 221 } else if (flags == 1) { 222 s.info.mach = bfd_mach_i386_i8086; 223 } else { 224 s.info.mach = bfd_mach_i386_i386; 225 } 226 print_insn = print_insn_i386; 227 #elif defined(TARGET_ARM) 228 if (flags & 1) { 229 print_insn = print_insn_thumb1; 230 } else { 231 print_insn = print_insn_arm; 232 } 233 if (flags & 2) { 234 #ifdef TARGET_WORDS_BIGENDIAN 235 s.info.endian = BFD_ENDIAN_LITTLE; 236 #else 237 s.info.endian = BFD_ENDIAN_BIG; 238 #endif 239 } 240 #elif defined(TARGET_SPARC) 241 print_insn = print_insn_sparc; 242 #ifdef TARGET_SPARC64 243 s.info.mach = bfd_mach_sparc_v9b; 244 #endif 245 #elif defined(TARGET_PPC) 246 if (flags >> 16) { 247 s.info.endian = BFD_ENDIAN_LITTLE; 248 } 249 if (flags & 0xFFFF) { 250 /* If we have a precise definitions of the instructions set, use it */ 251 s.info.mach = flags & 0xFFFF; 252 } else { 253 #ifdef TARGET_PPC64 254 s.info.mach = bfd_mach_ppc64; 255 #else 256 s.info.mach = bfd_mach_ppc; 257 #endif 258 } 259 s.info.disassembler_options = (char *)"any"; 260 print_insn = print_insn_ppc; 261 #elif defined(TARGET_M68K) 262 print_insn = print_insn_m68k; 263 #elif defined(TARGET_MIPS) 264 #ifdef TARGET_WORDS_BIGENDIAN 265 print_insn = print_insn_big_mips; 266 #else 267 print_insn = print_insn_little_mips; 268 #endif 269 #elif defined(TARGET_SH4) 270 s.info.mach = bfd_mach_sh4; 271 print_insn = print_insn_sh; 272 #elif defined(TARGET_ALPHA) 273 s.info.mach = bfd_mach_alpha_ev6; 274 print_insn = print_insn_alpha; 275 #elif defined(TARGET_CRIS) 276 if (flags != 32) { 277 s.info.mach = bfd_mach_cris_v0_v10; 278 print_insn = print_insn_crisv10; 279 } else { 280 s.info.mach = bfd_mach_cris_v32; 281 print_insn = print_insn_crisv32; 282 } 283 #elif defined(TARGET_S390X) 284 s.info.mach = bfd_mach_s390_64; 285 print_insn = print_insn_s390; 286 #elif defined(TARGET_MICROBLAZE) 287 s.info.mach = bfd_arch_microblaze; 288 print_insn = print_insn_microblaze; 289 #elif defined(TARGET_MOXIE) 290 s.info.mach = bfd_arch_moxie; 291 print_insn = print_insn_moxie; 292 #elif defined(TARGET_LM32) 293 s.info.mach = bfd_mach_lm32; 294 print_insn = print_insn_lm32; 295 #endif 296 if (print_insn == NULL) { 297 print_insn = print_insn_od_target; 298 } 299 300 for (pc = code; size > 0; pc += count, size -= count) { 301 fprintf(out, "0x" TARGET_FMT_lx ": ", pc); 302 count = print_insn(pc, &s.info); 303 #if 0 304 { 305 int i; 306 uint8_t b; 307 fprintf(out, " {"); 308 for(i = 0; i < count; i++) { 309 target_read_memory(pc + i, &b, 1, &s.info); 310 fprintf(out, " %02x", b); 311 } 312 fprintf(out, " }"); 313 } 314 #endif 315 fprintf(out, "\n"); 316 if (count < 0) 317 break; 318 if (size < count) { 319 fprintf(out, 320 "Disassembler disagrees with translator over instruction " 321 "decoding\n" 322 "Please report this to qemu-devel (at) nongnu.org\n"); 323 break; 324 } 325 } 326 } 327 328 /* Disassemble this for me please... (debugging). */ 329 void disas(FILE *out, void *code, unsigned long size) 330 { 331 uintptr_t pc; 332 int count; 333 CPUDebug s; 334 int (*print_insn)(bfd_vma pc, disassemble_info *info) = NULL; 335 336 INIT_DISASSEMBLE_INFO(s.info, out, fprintf); 337 s.info.print_address_func = generic_print_host_address; 338 339 s.info.buffer = code; 340 s.info.buffer_vma = (uintptr_t)code; 341 s.info.buffer_length = size; 342 343 #ifdef HOST_WORDS_BIGENDIAN 344 s.info.endian = BFD_ENDIAN_BIG; 345 #else 346 s.info.endian = BFD_ENDIAN_LITTLE; 347 #endif 348 #if defined(CONFIG_TCG_INTERPRETER) 349 print_insn = print_insn_tci; 350 #elif defined(__i386__) 351 s.info.mach = bfd_mach_i386_i386; 352 print_insn = print_insn_i386; 353 #elif defined(__x86_64__) 354 s.info.mach = bfd_mach_x86_64; 355 print_insn = print_insn_i386; 356 #elif defined(_ARCH_PPC) 357 s.info.disassembler_options = (char *)"any"; 358 print_insn = print_insn_ppc; 359 #elif defined(__alpha__) 360 print_insn = print_insn_alpha; 361 #elif defined(__sparc__) 362 print_insn = print_insn_sparc; 363 s.info.mach = bfd_mach_sparc_v9b; 364 #elif defined(__arm__) 365 print_insn = print_insn_arm; 366 #elif defined(__MIPSEB__) 367 print_insn = print_insn_big_mips; 368 #elif defined(__MIPSEL__) 369 print_insn = print_insn_little_mips; 370 #elif defined(__m68k__) 371 print_insn = print_insn_m68k; 372 #elif defined(__s390__) 373 print_insn = print_insn_s390; 374 #elif defined(__hppa__) 375 print_insn = print_insn_hppa; 376 #elif defined(__ia64__) 377 print_insn = print_insn_ia64; 378 #endif 379 if (print_insn == NULL) { 380 print_insn = print_insn_od_host; 381 } 382 for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) { 383 fprintf(out, "0x%08" PRIxPTR ": ", pc); 384 count = print_insn(pc, &s.info); 385 fprintf(out, "\n"); 386 if (count < 0) 387 break; 388 } 389 } 390 391 /* Look up symbol for debugging purpose. Returns "" if unknown. */ 392 const char *lookup_symbol(target_ulong orig_addr) 393 { 394 const char *symbol = ""; 395 struct syminfo *s; 396 397 for (s = syminfos; s; s = s->next) { 398 symbol = s->lookup_symbol(s, orig_addr); 399 if (symbol[0] != '\0') { 400 break; 401 } 402 } 403 404 return symbol; 405 } 406 407 #if !defined(CONFIG_USER_ONLY) 408 409 #include "monitor/monitor.h" 410 411 static int monitor_disas_is_physical; 412 413 static int 414 monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length, 415 struct disassemble_info *info) 416 { 417 CPUDebug *s = container_of(info, CPUDebug, info); 418 419 if (monitor_disas_is_physical) { 420 cpu_physical_memory_read(memaddr, myaddr, length); 421 } else { 422 cpu_memory_rw_debug(ENV_GET_CPU(s->env), memaddr,myaddr, length, 0); 423 } 424 return 0; 425 } 426 427 static int GCC_FMT_ATTR(2, 3) 428 monitor_fprintf(FILE *stream, const char *fmt, ...) 429 { 430 va_list ap; 431 va_start(ap, fmt); 432 monitor_vprintf((Monitor *)stream, fmt, ap); 433 va_end(ap); 434 return 0; 435 } 436 437 void monitor_disas(Monitor *mon, CPUArchState *env, 438 target_ulong pc, int nb_insn, int is_physical, int flags) 439 { 440 int count, i; 441 CPUDebug s; 442 int (*print_insn)(bfd_vma pc, disassemble_info *info); 443 444 INIT_DISASSEMBLE_INFO(s.info, (FILE *)mon, monitor_fprintf); 445 446 s.env = env; 447 monitor_disas_is_physical = is_physical; 448 s.info.read_memory_func = monitor_read_memory; 449 s.info.print_address_func = generic_print_target_address; 450 451 s.info.buffer_vma = pc; 452 453 #ifdef TARGET_WORDS_BIGENDIAN 454 s.info.endian = BFD_ENDIAN_BIG; 455 #else 456 s.info.endian = BFD_ENDIAN_LITTLE; 457 #endif 458 #if defined(TARGET_I386) 459 if (flags == 2) { 460 s.info.mach = bfd_mach_x86_64; 461 } else if (flags == 1) { 462 s.info.mach = bfd_mach_i386_i8086; 463 } else { 464 s.info.mach = bfd_mach_i386_i386; 465 } 466 print_insn = print_insn_i386; 467 #elif defined(TARGET_ARM) 468 print_insn = print_insn_arm; 469 #elif defined(TARGET_ALPHA) 470 print_insn = print_insn_alpha; 471 #elif defined(TARGET_SPARC) 472 print_insn = print_insn_sparc; 473 #ifdef TARGET_SPARC64 474 s.info.mach = bfd_mach_sparc_v9b; 475 #endif 476 #elif defined(TARGET_PPC) 477 #ifdef TARGET_PPC64 478 s.info.mach = bfd_mach_ppc64; 479 #else 480 s.info.mach = bfd_mach_ppc; 481 #endif 482 print_insn = print_insn_ppc; 483 #elif defined(TARGET_M68K) 484 print_insn = print_insn_m68k; 485 #elif defined(TARGET_MIPS) 486 #ifdef TARGET_WORDS_BIGENDIAN 487 print_insn = print_insn_big_mips; 488 #else 489 print_insn = print_insn_little_mips; 490 #endif 491 #elif defined(TARGET_SH4) 492 s.info.mach = bfd_mach_sh4; 493 print_insn = print_insn_sh; 494 #elif defined(TARGET_S390X) 495 s.info.mach = bfd_mach_s390_64; 496 print_insn = print_insn_s390; 497 #elif defined(TARGET_MOXIE) 498 s.info.mach = bfd_arch_moxie; 499 print_insn = print_insn_moxie; 500 #elif defined(TARGET_LM32) 501 s.info.mach = bfd_mach_lm32; 502 print_insn = print_insn_lm32; 503 #else 504 monitor_printf(mon, "0x" TARGET_FMT_lx 505 ": Asm output not supported on this arch\n", pc); 506 return; 507 #endif 508 509 for(i = 0; i < nb_insn; i++) { 510 monitor_printf(mon, "0x" TARGET_FMT_lx ": ", pc); 511 count = print_insn(pc, &s.info); 512 monitor_printf(mon, "\n"); 513 if (count < 0) 514 break; 515 pc += count; 516 } 517 } 518 #endif 519
