1 ;// 2 ;// 3 ;// File Name: armVCM4P10_InterpolateLuma_Copy_unsafe_s.s 4 ;// OpenMAX DL: v1.0.2 5 ;// Revision: 12290 6 ;// Date: Wednesday, April 9, 2008 7 ;// 8 ;// (c) Copyright 2007-2008 ARM Limited. All Rights Reserved. 9 ;// 10 ;// 11 ;// 12 13 ;// Function: 14 ;// armVCM4P10_InterpolateLuma_Copy4x4_unsafe 15 ;// 16 ;// Implements copy from an arbitrary aligned source memory location (pSrc) to an aligned 17 ;// destination pointed by (pDst) 18 ;// 19 ;// Registers preserved for top level function 20 ;// r1,r3,r4,r5,r6,r7,r10,r11,r14 21 ;// 22 ;// Registers modified by the function 23 ;// r0,r2,r8,r9,r12 24 25 INCLUDE omxtypes_s.h 26 INCLUDE armCOMM_s.h 27 28 M_VARIANTS ARM1136JS 29 30 EXPORT armVCM4P10_InterpolateLuma_Copy4x4_unsafe 31 32 ;// Declare input registers 33 pSrc RN 0 34 srcStep RN 1 35 pDst RN 2 36 dstStep RN 3 37 38 ;// Declare other intermediate registers 39 x0 RN 4 40 x1 RN 5 41 x2 RN 8 42 x3 RN 9 43 Temp RN 12 44 45 IF ARM1136JS 46 47 M_START armVCM4P10_InterpolateLuma_Copy4x4_unsafe, r6 48 49 Copy4x4Start 50 ;// Do Copy and branch to EndOfInterpolation 51 AND Temp, pSrc, #3 52 BIC pSrc, pSrc, #3 53 54 M_SWITCH Temp 55 M_CASE Copy4x4Align0 56 M_CASE Copy4x4Align1 57 M_CASE Copy4x4Align2 58 M_CASE Copy4x4Align3 59 M_ENDSWITCH 60 61 Copy4x4Align0 62 M_LDR x0, [pSrc], srcStep 63 M_LDR x1, [pSrc], srcStep 64 M_STR x0, [pDst], dstStep 65 M_LDR x2, [pSrc], srcStep 66 M_STR x1, [pDst], dstStep 67 M_LDR x3, [pSrc], srcStep 68 M_STR x2, [pDst], dstStep 69 M_STR x3, [pDst], dstStep 70 B Copy4x4End 71 72 Copy4x4Align1 73 LDR x1, [pSrc, #4] 74 M_LDR x0, [pSrc], srcStep 75 LDR x3, [pSrc, #4] 76 M_LDR x2, [pSrc], srcStep 77 MOV x0, x0, LSR #8 78 ORR x0, x0, x1, LSL #24 79 M_STR x0, [pDst], dstStep 80 MOV x2, x2, LSR #8 81 ORR x2, x2, x3, LSL #24 82 LDR x1, [pSrc, #4] 83 M_LDR x0, [pSrc], srcStep 84 M_STR x2, [pDst], dstStep 85 LDR x3, [pSrc, #4] 86 M_LDR x2, [pSrc], srcStep 87 MOV x0, x0, LSR #8 88 ORR x0, x0, x1, LSL #24 89 M_STR x0, [pDst], dstStep 90 MOV x2, x2, LSR #8 91 ORR x2, x2, x3, LSL #24 92 M_STR x2, [pDst], dstStep 93 B Copy4x4End 94 95 Copy4x4Align2 96 LDR x1, [pSrc, #4] 97 M_LDR x0, [pSrc], srcStep 98 LDR x3, [pSrc, #4] 99 M_LDR x2, [pSrc], srcStep 100 MOV x0, x0, LSR #16 101 ORR x0, x0, x1, LSL #16 102 M_STR x0, [pDst], dstStep 103 MOV x2, x2, LSR #16 104 ORR x2, x2, x3, LSL #16 105 M_STR x2, [pDst], dstStep 106 107 LDR x1, [pSrc, #4] 108 M_LDR x0, [pSrc], srcStep 109 LDR x3, [pSrc, #4] 110 M_LDR x2, [pSrc], srcStep 111 MOV x0, x0, LSR #16 112 ORR x0, x0, x1, LSL #16 113 M_STR x0, [pDst], dstStep 114 MOV x2, x2, LSR #16 115 ORR x2, x2, x3, LSL #16 116 M_STR x2, [pDst], dstStep 117 B Copy4x4End 118 119 Copy4x4Align3 120 LDR x1, [pSrc, #4] 121 M_LDR x0, [pSrc], srcStep 122 LDR x3, [pSrc, #4] 123 M_LDR x2, [pSrc], srcStep 124 MOV x0, x0, LSR #24 125 ORR x0, x0, x1, LSL #8 126 M_STR x0, [pDst], dstStep 127 MOV x2, x2, LSR #24 128 ORR x2, x2, x3, LSL #8 129 M_STR x2, [pDst], dstStep 130 131 LDR x1, [pSrc, #4] 132 M_LDR x0, [pSrc], srcStep 133 LDR x3, [pSrc, #4] 134 M_LDR x2, [pSrc], srcStep 135 MOV x0, x0, LSR #24 136 ORR x0, x0, x1, LSL #8 137 M_STR x0, [pDst], dstStep 138 MOV x2, x2, LSR #24 139 ORR x2, x2, x3, LSL #8 140 M_STR x2, [pDst], dstStep 141 B Copy4x4End 142 143 Copy4x4End 144 M_END 145 146 ENDIF 147 148 END 149
