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      1 /* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
      2  *
      3  * This program is free software; you can redistribute it and/or modify
      4  * it under the terms of the GNU General Public License version 2 and
      5  * only version 2 as published by the Free Software Foundation.
      6  *
      7  * This program is distributed in the hope that it will be useful,
      8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
      9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     10  * GNU General Public License for more details.
     11  *
     12  */
     13 #ifndef __MSM_ISP_H__
     14 #define __MSM_ISP_H__
     15 
     16 #define BIT(nr)			(1UL << (nr))
     17 
     18 /* ISP message IDs */
     19 #define MSG_ID_RESET_ACK                0
     20 #define MSG_ID_START_ACK                1
     21 #define MSG_ID_STOP_ACK                 2
     22 #define MSG_ID_UPDATE_ACK               3
     23 #define MSG_ID_OUTPUT_P                 4
     24 #define MSG_ID_OUTPUT_T                 5
     25 #define MSG_ID_OUTPUT_S                 6
     26 #define MSG_ID_OUTPUT_V                 7
     27 #define MSG_ID_SNAPSHOT_DONE            8
     28 #define MSG_ID_STATS_AEC                9
     29 #define MSG_ID_STATS_AF                 10
     30 #define MSG_ID_STATS_AWB                11
     31 #define MSG_ID_STATS_RS                 12
     32 #define MSG_ID_STATS_CS                 13
     33 #define MSG_ID_STATS_IHIST              14
     34 #define MSG_ID_STATS_SKIN               15
     35 #define MSG_ID_EPOCH1                   16
     36 #define MSG_ID_EPOCH2                   17
     37 #define MSG_ID_SYNC_TIMER0_DONE         18
     38 #define MSG_ID_SYNC_TIMER1_DONE         19
     39 #define MSG_ID_SYNC_TIMER2_DONE         20
     40 #define MSG_ID_ASYNC_TIMER0_DONE        21
     41 #define MSG_ID_ASYNC_TIMER1_DONE        22
     42 #define MSG_ID_ASYNC_TIMER2_DONE        23
     43 #define MSG_ID_ASYNC_TIMER3_DONE        24
     44 #define MSG_ID_AE_OVERFLOW              25
     45 #define MSG_ID_AF_OVERFLOW              26
     46 #define MSG_ID_AWB_OVERFLOW             27
     47 #define MSG_ID_RS_OVERFLOW              28
     48 #define MSG_ID_CS_OVERFLOW              29
     49 #define MSG_ID_IHIST_OVERFLOW           30
     50 #define MSG_ID_SKIN_OVERFLOW            31
     51 #define MSG_ID_AXI_ERROR                32
     52 #define MSG_ID_CAMIF_OVERFLOW           33
     53 #define MSG_ID_VIOLATION                34
     54 #define MSG_ID_CAMIF_ERROR              35
     55 #define MSG_ID_BUS_OVERFLOW             36
     56 #define MSG_ID_SOF_ACK                  37
     57 #define MSG_ID_STOP_REC_ACK             38
     58 #define MSG_ID_STATS_AWB_AEC            39
     59 #define MSG_ID_OUTPUT_PRIMARY           40
     60 #define MSG_ID_OUTPUT_SECONDARY         41
     61 #define MSG_ID_STATS_COMPOSITE          42
     62 #define MSG_ID_OUTPUT_TERTIARY1         43
     63 #define MSG_ID_STOP_LS_ACK              44
     64 #define MSG_ID_OUTPUT_TERTIARY2         45
     65 #define MSG_ID_STATS_BG                 46
     66 #define MSG_ID_STATS_BF                 47
     67 #define MSG_ID_STATS_BHIST              48
     68 #define MSG_ID_RDI0_UPDATE_ACK          49
     69 #define MSG_ID_RDI1_UPDATE_ACK          50
     70 #define MSG_ID_RDI2_UPDATE_ACK          51
     71 
     72 /* ISP command IDs */
     73 #define VFE_CMD_DUMMY_0                                 0
     74 #define VFE_CMD_SET_CLK                                 1
     75 #define VFE_CMD_RESET                                   2
     76 #define VFE_CMD_START                                   3
     77 #define VFE_CMD_TEST_GEN_START                          4
     78 #define VFE_CMD_OPERATION_CFG                           5
     79 #define VFE_CMD_AXI_OUT_CFG                             6
     80 #define VFE_CMD_CAMIF_CFG                               7
     81 #define VFE_CMD_AXI_INPUT_CFG                           8
     82 #define VFE_CMD_BLACK_LEVEL_CFG                         9
     83 #define VFE_CMD_MESH_ROLL_OFF_CFG                       10
     84 #define VFE_CMD_DEMUX_CFG                               11
     85 #define VFE_CMD_FOV_CFG                                 12
     86 #define VFE_CMD_MAIN_SCALER_CFG                         13
     87 #define VFE_CMD_WB_CFG                                  14
     88 #define VFE_CMD_COLOR_COR_CFG                           15
     89 #define VFE_CMD_RGB_G_CFG                               16
     90 #define VFE_CMD_LA_CFG                                  17
     91 #define VFE_CMD_CHROMA_EN_CFG                           18
     92 #define VFE_CMD_CHROMA_SUP_CFG                          19
     93 #define VFE_CMD_MCE_CFG                                 20
     94 #define VFE_CMD_SK_ENHAN_CFG                            21
     95 #define VFE_CMD_ASF_CFG                                 22
     96 #define VFE_CMD_S2Y_CFG                                 23
     97 #define VFE_CMD_S2CbCr_CFG                              24
     98 #define VFE_CMD_CHROMA_SUBS_CFG                         25
     99 #define VFE_CMD_OUT_CLAMP_CFG                           26
    100 #define VFE_CMD_FRAME_SKIP_CFG                          27
    101 #define VFE_CMD_DUMMY_1                                 28
    102 #define VFE_CMD_DUMMY_2                                 29
    103 #define VFE_CMD_DUMMY_3                                 30
    104 #define VFE_CMD_UPDATE                                  31
    105 #define VFE_CMD_BL_LVL_UPDATE                           32
    106 #define VFE_CMD_DEMUX_UPDATE                            33
    107 #define VFE_CMD_FOV_UPDATE                              34
    108 #define VFE_CMD_MAIN_SCALER_UPDATE                      35
    109 #define VFE_CMD_WB_UPDATE                               36
    110 #define VFE_CMD_COLOR_COR_UPDATE                        37
    111 #define VFE_CMD_RGB_G_UPDATE                            38
    112 #define VFE_CMD_LA_UPDATE                               39
    113 #define VFE_CMD_CHROMA_EN_UPDATE                        40
    114 #define VFE_CMD_CHROMA_SUP_UPDATE                       41
    115 #define VFE_CMD_MCE_UPDATE                              42
    116 #define VFE_CMD_SK_ENHAN_UPDATE                         43
    117 #define VFE_CMD_S2CbCr_UPDATE                           44
    118 #define VFE_CMD_S2Y_UPDATE                              45
    119 #define VFE_CMD_ASF_UPDATE                              46
    120 #define VFE_CMD_FRAME_SKIP_UPDATE                       47
    121 #define VFE_CMD_CAMIF_FRAME_UPDATE                      48
    122 #define VFE_CMD_STATS_AF_UPDATE                         49
    123 #define VFE_CMD_STATS_AE_UPDATE                         50
    124 #define VFE_CMD_STATS_AWB_UPDATE                        51
    125 #define VFE_CMD_STATS_RS_UPDATE                         52
    126 #define VFE_CMD_STATS_CS_UPDATE                         53
    127 #define VFE_CMD_STATS_SKIN_UPDATE                       54
    128 #define VFE_CMD_STATS_IHIST_UPDATE                      55
    129 #define VFE_CMD_DUMMY_4                                 56
    130 #define VFE_CMD_EPOCH1_ACK                              57
    131 #define VFE_CMD_EPOCH2_ACK                              58
    132 #define VFE_CMD_START_RECORDING                         59
    133 #define VFE_CMD_STOP_RECORDING                          60
    134 #define VFE_CMD_DUMMY_5                                 61
    135 #define VFE_CMD_DUMMY_6                                 62
    136 #define VFE_CMD_CAPTURE                                 63
    137 #define VFE_CMD_DUMMY_7                                 64
    138 #define VFE_CMD_STOP                                    65
    139 #define VFE_CMD_GET_HW_VERSION                          66
    140 #define VFE_CMD_GET_FRAME_SKIP_COUNTS                   67
    141 #define VFE_CMD_OUTPUT1_BUFFER_ENQ                      68
    142 #define VFE_CMD_OUTPUT2_BUFFER_ENQ                      69
    143 #define VFE_CMD_OUTPUT3_BUFFER_ENQ                      70
    144 #define VFE_CMD_JPEG_OUT_BUF_ENQ                        71
    145 #define VFE_CMD_RAW_OUT_BUF_ENQ                         72
    146 #define VFE_CMD_RAW_IN_BUF_ENQ                          73
    147 #define VFE_CMD_STATS_AF_ENQ                            74
    148 #define VFE_CMD_STATS_AE_ENQ                            75
    149 #define VFE_CMD_STATS_AWB_ENQ                           76
    150 #define VFE_CMD_STATS_RS_ENQ                            77
    151 #define VFE_CMD_STATS_CS_ENQ                            78
    152 #define VFE_CMD_STATS_SKIN_ENQ                          79
    153 #define VFE_CMD_STATS_IHIST_ENQ                         80
    154 #define VFE_CMD_DUMMY_8                                 81
    155 #define VFE_CMD_JPEG_ENC_CFG                            82
    156 #define VFE_CMD_DUMMY_9                                 83
    157 #define VFE_CMD_STATS_AF_START                          84
    158 #define VFE_CMD_STATS_AF_STOP                           85
    159 #define VFE_CMD_STATS_AE_START                          86
    160 #define VFE_CMD_STATS_AE_STOP                           87
    161 #define VFE_CMD_STATS_AWB_START                         88
    162 #define VFE_CMD_STATS_AWB_STOP                          89
    163 #define VFE_CMD_STATS_RS_START                          90
    164 #define VFE_CMD_STATS_RS_STOP                           91
    165 #define VFE_CMD_STATS_CS_START                          92
    166 #define VFE_CMD_STATS_CS_STOP                           93
    167 #define VFE_CMD_STATS_SKIN_START                        94
    168 #define VFE_CMD_STATS_SKIN_STOP                         95
    169 #define VFE_CMD_STATS_IHIST_START                       96
    170 #define VFE_CMD_STATS_IHIST_STOP                        97
    171 #define VFE_CMD_DUMMY_10                                98
    172 #define VFE_CMD_SYNC_TIMER_SETTING                      99
    173 #define VFE_CMD_ASYNC_TIMER_SETTING                     100
    174 #define VFE_CMD_LIVESHOT                                101
    175 #define VFE_CMD_LA_SETUP                                102
    176 #define VFE_CMD_LINEARIZATION_CFG                       103
    177 #define VFE_CMD_DEMOSAICV3                              104
    178 #define VFE_CMD_DEMOSAICV3_ABCC_CFG                     105
    179 #define VFE_CMD_DEMOSAICV3_DBCC_CFG                     106
    180 #define VFE_CMD_DEMOSAICV3_DBPC_CFG                     107
    181 #define VFE_CMD_DEMOSAICV3_ABF_CFG                      108
    182 #define VFE_CMD_DEMOSAICV3_ABCC_UPDATE                  109
    183 #define VFE_CMD_DEMOSAICV3_DBCC_UPDATE                  110
    184 #define VFE_CMD_DEMOSAICV3_DBPC_UPDATE                  111
    185 #define VFE_CMD_XBAR_CFG                                112
    186 #define VFE_CMD_MODULE_CFG                              113
    187 #define VFE_CMD_ZSL                                     114
    188 #define VFE_CMD_LINEARIZATION_UPDATE                    115
    189 #define VFE_CMD_DEMOSAICV3_ABF_UPDATE                   116
    190 #define VFE_CMD_CLF_CFG                                 117
    191 #define VFE_CMD_CLF_LUMA_UPDATE                         118
    192 #define VFE_CMD_CLF_CHROMA_UPDATE                       119
    193 #define VFE_CMD_PCA_ROLL_OFF_CFG                        120
    194 #define VFE_CMD_PCA_ROLL_OFF_UPDATE                     121
    195 #define VFE_CMD_GET_REG_DUMP                            122
    196 #define VFE_CMD_GET_LINEARIZATON_TABLE                  123
    197 #define VFE_CMD_GET_MESH_ROLLOFF_TABLE                  124
    198 #define VFE_CMD_GET_PCA_ROLLOFF_TABLE                   125
    199 #define VFE_CMD_GET_RGB_G_TABLE                         126
    200 #define VFE_CMD_GET_LA_TABLE                            127
    201 #define VFE_CMD_DEMOSAICV3_UPDATE                       128
    202 #define VFE_CMD_ACTIVE_REGION_CFG                       129
    203 #define VFE_CMD_COLOR_PROCESSING_CONFIG                 130
    204 #define VFE_CMD_STATS_WB_AEC_CONFIG                     131
    205 #define VFE_CMD_STATS_WB_AEC_UPDATE                     132
    206 #define VFE_CMD_Y_GAMMA_CONFIG                          133
    207 #define VFE_CMD_SCALE_OUTPUT1_CONFIG                    134
    208 #define VFE_CMD_SCALE_OUTPUT2_CONFIG                    135
    209 #define VFE_CMD_CAPTURE_RAW                             136
    210 #define VFE_CMD_STOP_LIVESHOT                           137
    211 #define VFE_CMD_RECONFIG_VFE                            138
    212 #define VFE_CMD_STATS_REQBUF                            139
    213 #define VFE_CMD_STATS_ENQUEUEBUF                        140
    214 #define VFE_CMD_STATS_FLUSH_BUFQ                        141
    215 #define VFE_CMD_STATS_UNREGBUF                          142
    216 #define VFE_CMD_STATS_BG_START                          143
    217 #define VFE_CMD_STATS_BG_STOP                           144
    218 #define VFE_CMD_STATS_BF_START                          145
    219 #define VFE_CMD_STATS_BF_STOP                           146
    220 #define VFE_CMD_STATS_BHIST_START                       147
    221 #define VFE_CMD_STATS_BHIST_STOP                        148
    222 #define VFE_CMD_RESET_2                                 149
    223 #define VFE_CMD_FOV_ENC_CFG                             150
    224 #define VFE_CMD_FOV_VIEW_CFG                            151
    225 #define VFE_CMD_FOV_ENC_UPDATE                          152
    226 #define VFE_CMD_FOV_VIEW_UPDATE                         153
    227 #define VFE_CMD_SCALER_ENC_CFG                          154
    228 #define VFE_CMD_SCALER_VIEW_CFG                         155
    229 #define VFE_CMD_SCALER_ENC_UPDATE                       156
    230 #define VFE_CMD_SCALER_VIEW_UPDATE                      157
    231 #define VFE_CMD_COLORXFORM_ENC_CFG                      158
    232 #define VFE_CMD_COLORXFORM_VIEW_CFG                     159
    233 #define VFE_CMD_COLORXFORM_ENC_UPDATE                   160
    234 #define VFE_CMD_COLORXFORM_VIEW_UPDATE                  161
    235 #define VFE_CMD_TEST_GEN_CFG                            162
    236 
    237 struct msm_isp_cmd {
    238 	int32_t id;
    239 	uint16_t length;
    240 	void *value;
    241 };
    242 
    243 #define VPE_CMD_DUMMY_0                                 0
    244 #define VPE_CMD_INIT                                    1
    245 #define VPE_CMD_DEINIT                                  2
    246 #define VPE_CMD_ENABLE                                  3
    247 #define VPE_CMD_DISABLE                                 4
    248 #define VPE_CMD_RESET                                   5
    249 #define VPE_CMD_FLUSH                                   6
    250 #define VPE_CMD_OPERATION_MODE_CFG                      7
    251 #define VPE_CMD_INPUT_PLANE_CFG                         8
    252 #define VPE_CMD_OUTPUT_PLANE_CFG                        9
    253 #define VPE_CMD_INPUT_PLANE_UPDATE                      10
    254 #define VPE_CMD_SCALE_CFG_TYPE                          11
    255 #define VPE_CMD_ZOOM                                    13
    256 #define VPE_CMD_MAX                                     14
    257 
    258 #define MSM_PP_CMD_TYPE_NOT_USED        0	/* not used */
    259 #define MSM_PP_CMD_TYPE_VPE             1	/* VPE cmd */
    260 #define MSM_PP_CMD_TYPE_MCTL            2	/* MCTL cmd */
    261 
    262 #define MCTL_CMD_DUMMY_0                0	/* not used */
    263 #define MCTL_CMD_GET_FRAME_BUFFER       1	/* reserve a free frame buffer */
    264 #define MCTL_CMD_PUT_FRAME_BUFFER       2	/* return the free frame buffer */
    265 #define MCTL_CMD_DIVERT_FRAME_PP_PATH   3	/* divert frame for pp */
    266 
    267 /* event typese sending to MCTL PP module */
    268 #define MCTL_PP_EVENT_NOTUSED           0
    269 #define MCTL_PP_EVENT_CMD_ACK           1
    270 
    271 #define VPE_OPERATION_MODE_CFG_LEN      4
    272 #define VPE_INPUT_PLANE_CFG_LEN         24
    273 #define VPE_OUTPUT_PLANE_CFG_LEN        20
    274 #define VPE_INPUT_PLANE_UPDATE_LEN      12
    275 #define VPE_SCALER_CONFIG_LEN           260
    276 #define VPE_DIS_OFFSET_CFG_LEN          12
    277 
    278 #define CAPTURE_WIDTH          1280
    279 #define IMEM_Y_SIZE            (CAPTURE_WIDTH*16)
    280 #define IMEM_CBCR_SIZE         (CAPTURE_WIDTH*8)
    281 
    282 #define IMEM_Y_PING_OFFSET     0x2E000000
    283 #define IMEM_CBCR_PING_OFFSET  (IMEM_Y_PING_OFFSET + IMEM_Y_SIZE)
    284 
    285 #define IMEM_Y_PONG_OFFSET     (IMEM_CBCR_PING_OFFSET + IMEM_CBCR_SIZE)
    286 #define IMEM_CBCR_PONG_OFFSET  (IMEM_Y_PONG_OFFSET + IMEM_Y_SIZE)
    287 
    288 struct msm_vpe_op_mode_cfg {
    289 	uint8_t op_mode_cfg[VPE_OPERATION_MODE_CFG_LEN];
    290 };
    291 
    292 struct msm_vpe_input_plane_cfg {
    293 	uint8_t input_plane_cfg[VPE_INPUT_PLANE_CFG_LEN];
    294 };
    295 
    296 struct msm_vpe_output_plane_cfg {
    297 	uint8_t output_plane_cfg[VPE_OUTPUT_PLANE_CFG_LEN];
    298 };
    299 
    300 struct msm_vpe_input_plane_update_cfg {
    301 	uint8_t input_plane_update_cfg[VPE_INPUT_PLANE_UPDATE_LEN];
    302 };
    303 
    304 struct msm_vpe_scaler_cfg {
    305 	uint8_t scaler_cfg[VPE_SCALER_CONFIG_LEN];
    306 };
    307 
    308 struct msm_vpe_flush_frame_buffer {
    309 	uint32_t src_buf_handle;
    310 	uint32_t dest_buf_handle;
    311 	int path;
    312 };
    313 
    314 struct msm_mctl_pp_frame_buffer {
    315 	uint32_t buf_handle;
    316 	int path;
    317 };
    318 struct msm_mctl_pp_divert_pp {
    319 	int path;
    320 	int enable;
    321 };
    322 struct msm_vpe_clock_rate {
    323 	uint32_t rate;
    324 };
    325 struct msm_pp_crop {
    326 	uint32_t src_x;
    327 	uint32_t src_y;
    328 	uint32_t src_w;
    329 	uint32_t src_h;
    330 	uint32_t dst_x;
    331 	uint32_t dst_y;
    332 	uint32_t dst_w;
    333 	uint32_t dst_h;
    334 	uint8_t update_flag;
    335 };
    336 #define MSM_MCTL_PP_VPE_FRAME_ACK    (1<<0)
    337 #define MSM_MCTL_PP_VPE_FRAME_TO_APP (1<<1)
    338 
    339 struct msm_mctl_pp_frame_cmd {
    340 	uint32_t cookie;
    341 	uint8_t vpe_output_action;
    342 	uint32_t src_buf_handle;
    343 	uint32_t dest_buf_handle;
    344 	struct msm_pp_crop crop;
    345 	int path;
    346 	/* TBD: 3D related */
    347 };
    348 
    349 #define VFE_OUTPUTS_MAIN_AND_PREVIEW    BIT(0)
    350 #define VFE_OUTPUTS_MAIN_AND_VIDEO      BIT(1)
    351 #define VFE_OUTPUTS_MAIN_AND_THUMB      BIT(2)
    352 #define VFE_OUTPUTS_THUMB_AND_MAIN      BIT(3)
    353 #define VFE_OUTPUTS_PREVIEW_AND_VIDEO   BIT(4)
    354 #define VFE_OUTPUTS_VIDEO_AND_PREVIEW   BIT(5)
    355 #define VFE_OUTPUTS_PREVIEW             BIT(6)
    356 #define VFE_OUTPUTS_VIDEO               BIT(7)
    357 #define VFE_OUTPUTS_RAW                 BIT(8)
    358 #define VFE_OUTPUTS_JPEG_AND_THUMB      BIT(9)
    359 #define VFE_OUTPUTS_THUMB_AND_JPEG      BIT(10)
    360 #define VFE_OUTPUTS_RDI0                BIT(11)
    361 #define VFE_OUTPUTS_RDI1                BIT(12)
    362 
    363 struct msm_frame_info {
    364 	uint32_t inst_handle;
    365 	uint32_t path;
    366 };
    367 
    368 #endif /*__MSM_ISP_H__*/
    369