xref: /prebuilts/gcc/linux-x86/arm/arm-eabi-4.8/lib32/libbfd.a

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BFD_RELOC_SPARC_GOTDATA_OP_HIX22BFD_RELOC_SPARC_GOTDATA_OP_LOX10BFD_RELOC_MIPS16_TLS_DTPREL_HI16BFD_RELOC_MIPS16_TLS_DTPREL_LO16BFD_RELOC_MIPS16_TLS_TPREL_HI16BFD_RELOC_MIPS16_TLS_TPREL_LO16BFD_RELOC_MICROMIPS_7_PCREL_S1BFD_RELOC_MICROMIPS_10_PCREL_S1BFD_RELOC_MICROMIPS_16_PCREL_S1BFD_RELOC_MIPS_TLS_DTPREL_HI16BFD_RELOC_MICROMIPS_TLS_DTPREL_HI16BFD_RELOC_MIPS_TLS_DTPREL_LO16BFD_RELOC_MICROMIPS_TLS_DTPREL_LO16BFD_RELOC_MICROMIPS_TLS_GOTTPRELBFD_RELOC_MICROMIPS_TLS_TPREL_HI16BFD_RELOC_MICROMIPS_TLS_TPREL_LO16BFD_RELOC_FRV_FUNCDESC_GOTOFF12BFD_RELOC_FRV_FUNCDESC_GOTOFFHIBFD_RELOC_FRV_FUNCDESC_GOTOFFLOBFD_RELOC_X86_64_GOTPC32_TLSDESCBFD_RELOC_PPC_VLE_SDAREL_LO16ABFD_RELOC_PPC_VLE_SDAREL_LO16DBFD_RELOC_PPC_VLE_SDAREL_HI16ABFD_RELOC_PPC_VLE_SDAREL_HI16DBFD_RELOC_PPC_VLE_SDAREL_HA16ABFD_RELOC_PPC_VLE_SDAREL_HA16DBFD_RELOC_PPC64_PLTGOT16_LO_DSBFD_RELOC_PPC64_TPREL16_HIGHERBFD_RELOC_PPC64_TPREL16_HIGHERABFD_RELOC_PPC64_TPREL16_HIGHESTBFD_RELOC_PPC64_TPREL16_HIGHESTABFD_RELOC_PPC64_DTPREL16_LO_DSBFD_RELOC_PPC64_DTPREL16_HIGHERBFD_RELOC_PPC64_DTPREL16_HIGHERABFD_RELOC_PPC64_DTPREL16_HIGHESTBFD_RELOC_PPC64_DTPREL16_HIGHESTABFD_RELOC_THUMB_PCREL_BRANCH12BFD_RELOC_THUMB_PCREL_BRANCH20BFD_RELOC_THUMB_PCREL_BRANCH23BFD_RELOC_THUMB_PCREL_BRANCH25BFD_RELOC_ARM_THUMB_MOVW_PCRELBFD_RELOC_ARM_THUMB_MOVT_PCRELBFD_RELOC_ARM_T32_CP_OFF_IMM_S2BFD_RELOC_SH_IMM_MEDLOW16_PCRELBFD_RELOC_SH_IMM_MEDHI16_PCRELBFD_RELOC_BFIN_12_PCREL_JUMP_SBFD_RELOC_BFIN_24_PCREL_CALL_XBFD_RELOC_BFIN_24_PCREL_JUMP_LBFD_RELOC_BFIN_FUNCDESC_GOT17M4BFD_RELOC_BFIN_FUNCDESC_GOTOFF17M4BFD_RELOC_BFIN_FUNCDESC_GOTOFFHIBFD_RELOC_BFIN_FUNCDESC_GOTOFFLOBFD_RELOC_V850_SDA_16_16_OFFSETBFD_RELOC_V850_SDA_15_16_OFFSETBFD_RELOC_V850_ZDA_16_16_OFFSETBFD_RELOC_V850_ZDA_15_16_OFFSETBFD_RELOC_V850_TDA_16_16_OFFSETBFD_RELOC_V850_SDA_16_16_SPLIT_OFFSETBFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSETBFD_RELOC_V850_CALLT_6_7_OFFSETBFD_RELOC_V850_CALLT_16_16_OFFSETBFD_RELOC_V850_LO16_SPLIT_OFFSETBFD_RELOC_V850_16_SPLIT_OFFSETBFD_RELOC_V850_CALLT_15_16_OFFSETBFD_RELOC_MCORE_PCREL_IMM11BY2BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2BFD_RELOC_MMIX_PUSHJ_STUBBABLEBFD_RELOC_MMIX_BASE_PLUS_OFFSETBFD_RELOC_IA64_LTOFF_FPTR32MSBBFD_RELOC_IA64_LTOFF_FPTR32LSBBFD_RELOC_IA64_LTOFF_FPTR64MSBBFD_RELOC_IA64_LTOFF_FPTR64LSBBFD_RELOC_MSP430_16_PCREL_BYTEBFD_RELOC_MACH_O_LOCAL_SECTDIFFBFD_RELOC_MACH_O_X86_64_BRANCH32BFD_RELOC_MACH_O_X86_64_BRANCH8BFD_RELOC_MACH_O_X86_64_GOT_LOADBFD_RELOC_MACH_O_X86_64_SUBTRACTOR32BFD_RELOC_MACH_O_X86_64_SUBTRACTOR64BFD_RELOC_MACH_O_X86_64_PCREL32_1BFD_RELOC_MACH_O_X86_64_PCREL32_2BFD_RELOC_MACH_O_X86_64_PCREL32_4BFD_RELOC_MICROBLAZE_32_LO_PCRELBFD_RELOC_MICROBLAZE_32_SYM_OP_SYMBFD_RELOC_MICROBLAZE_64_GOTOFFBFD_RELOC_MICROBLAZE_32_GOTOFFBFD_RELOC_AARCH64_ADR_GOT_PAGEBFD_RELOC_AARCH64_ADR_HI21_PCRELBFD_RELOC_AARCH64_ADR_HI21_NC_PCRELBFD_RELOC_AARCH64_ADR_LO21_PCRELBFD_RELOC_AARCH64_GAS_INTERNAL_FIXUPBFD_RELOC_AARCH64_LD_LO19_PCRELBFD_RELOC_AARCH64_LD64_GOT_LO12_NCBFD_RELOC_AARCH64_LDST128_LO12BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NCBFD_RELOC_AARCH64_TLSDESC_ADR_PAGEBFD_RELOC_AARCH64_TLSDESC_ADR_PREL21BFD_RELOC_AARCH64_TLSDESC_CALLBFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NCBFD_RELOC_AARCH64_TLSDESC_LD64_PREL19BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NCBFD_RELOC_AARCH64_TLSDESC_OFF_G1BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NCBFD_RELOC_AARCH64_TLSGD_ADR_PAGE21BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NCBFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NCBFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NCBFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NCBFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NCBFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2BFD_RELOC_AARCH64_TLS_DTPMOD64BFD_RELOC_AARCH64_TLS_DTPREL64BFD_RELOC_TILEPRO_JOFFLONG_X1_PLTBFD_RELOC_TILEPRO_DEST_IMM8_X1BFD_RELOC_TILEPRO_IMM16_X0_PCRELBFD_RELOC_TILEPRO_IMM16_X1_PCRELBFD_RELOC_TILEPRO_IMM16_X0_LO_PCRELBFD_RELOC_TILEPRO_IMM16_X1_LO_PCRELBFD_RELOC_TILEPRO_IMM16_X0_HI_PCRELBFD_RELOC_TILEPRO_IMM16_X1_HI_PCRELBFD_RELOC_TILEPRO_IMM16_X0_HA_PCRELBFD_RELOC_TILEPRO_IMM16_X1_HA_PCRELBFD_RELOC_TILEPRO_IMM16_X0_GOTBFD_RELOC_TILEPRO_IMM16_X1_GOTBFD_RELOC_TILEPRO_IMM16_X0_GOT_LOBFD_RELOC_TILEPRO_IMM16_X1_GOT_LOBFD_RELOC_TILEPRO_IMM16_X0_GOT_HIBFD_RELOC_TILEPRO_IMM16_X1_GOT_HIBFD_RELOC_TILEPRO_IMM16_X0_GOT_HABFD_RELOC_TILEPRO_IMM16_X1_GOT_HABFD_RELOC_TILEPRO_IMM8_X0_TLS_GD_ADDBFD_RELOC_TILEPRO_IMM8_X1_TLS_GD_ADDBFD_RELOC_TILEPRO_IMM8_Y0_TLS_GD_ADDBFD_RELOC_TILEPRO_IMM8_Y1_TLS_GD_ADDBFD_RELOC_TILEPRO_IMM16_X0_TLS_GDBFD_RELOC_TILEPRO_IMM16_X1_TLS_GDBFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_LOBFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_LOBFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HIBFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HIBFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HABFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HABFD_RELOC_TILEPRO_IMM16_X0_TLS_IEBFD_RELOC_TILEPRO_IMM16_X1_TLS_IEBFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_LOBFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_LOBFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HIBFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HIBFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HABFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HABFD_RELOC_TILEPRO_TLS_DTPMOD32BFD_RELOC_TILEPRO_TLS_DTPOFF32BFD_RELOC_TILEPRO_IMM16_X0_TLS_LEBFD_RELOC_TILEPRO_IMM16_X1_TLS_LEBFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_LOBFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_LOBFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HIBFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HIBFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HABFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HABFD_RELOC_TILEGX_JUMPOFF_X1_PLTBFD_RELOC_TILEGX_IMM16_X0_HW0_LASTBFD_RELOC_TILEGX_IMM16_X1_HW0_LASTBFD_RELOC_TILEGX_IMM16_X0_HW1_LASTBFD_RELOC_TILEGX_IMM16_X1_HW1_LASTBFD_RELOC_TILEGX_IMM16_X0_HW2_LASTBFD_RELOC_TILEGX_IMM16_X1_HW2_LASTBFD_RELOC_TILEGX_IMM16_X0_HW0_PCRELBFD_RELOC_TILEGX_IMM16_X1_HW0_PCRELBFD_RELOC_TILEGX_IMM16_X0_HW1_PCRELBFD_RELOC_TILEGX_IMM16_X1_HW1_PCRELBFD_RELOC_TILEGX_IMM16_X0_HW2_PCRELBFD_RELOC_TILEGX_IMM16_X1_HW2_PCRELBFD_RELOC_TILEGX_IMM16_X0_HW3_PCRELBFD_RELOC_TILEGX_IMM16_X1_HW3_PCRELBFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PCRELBFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PCRELBFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PCRELBFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PCRELBFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PCRELBFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PCRELBFD_RELOC_TILEGX_IMM16_X0_HW0_GOTBFD_RELOC_TILEGX_IMM16_X1_HW0_GOTBFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_GOTBFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_GOTBFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_GOTBFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_GOTBFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_GDBFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_GDBFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_LEBFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_LEBFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_LEBFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_LEBFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_LEBFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_LEBFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_GDBFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_GDBFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_GDBFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_GDBFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_IEBFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_IEBFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_IEBFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_IEBFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_IEBFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_IEBFD_RELOC_TILEGX_IMM8_X0_TLS_GD_ADDBFD_RELOC_TILEGX_IMM8_X1_TLS_GD_ADDBFD_RELOC_TILEGX_IMM8_Y0_TLS_GD_ADDBFD_RELOC_TILEGX_IMM8_Y1_TLS_GD_ADDBFD_RELOC_TILEGX_IMM8_X0_TLS_ADDBFD_RELOC_TILEGX_IMM8_X1_TLS_ADDBFD_RELOC_TILEGX_IMM8_Y0_TLS_ADDBFD_RELOC_TILEGX_IMM8_Y1_TLS_ADD@@overflow: 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ML&P$p %C#/error: %B: Unknown CPU architectureerror: %B: Conflicting CPU architectures %d/%d/tmp/AOSP-toolchain/build/../binutils/binutils-2.23/bfd/elf32-arm.c [floats passed in float registers] [dynamic symbols use segment index] [mapping symbols precede others]Warning: Not setting interworking flag of %B since it has already been specified as non-interworkingWarning: Clearing the interworking flag of %B due to outside request%B: error: VFP11 veneer out of rangeerror: required section '%s' not found in the linker script%B: Unknown mandatory EABI object attribute %dWarning: %B: Unknown EABI object attribute %d%B: error: Cortex-A8 erratum stub is allocated in unsafe location%B: error: Cortex-A8 erratum stub out of range (input file too large)%B(%s): warning: interworking not enabled.
  first occurrence: %B: Thumb call to ARM%B(%s): warning: interworking not enabled.
  first occurrence: %B: ARM call to Thumbunable to find ARM glue '%s' for '%s'%B(%s): warning: interworking not enabled.
  first occurrence: %B: arm call to thumbunable to find THUMB glue '%s' for '%s'%B: Warning: Arm BLX instruction targets Arm function '%s'.%B: Warning: Thumb BLX instruction targets thumb function '%s'.%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations%B(%A+0x%lx): %s used with TLS symbol %s%B(%A+0x%lx): %s used with non-TLS symbol %s%B(%A+0x%lx): %s relocation against SEC_MERGE section%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPICWarning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with itError: %B has both the current and legacy Tag_MPextension_use attributeserror: %B uses VFP register arguments, %B does noterror: %B: unable to merge virtualization attributes with %Berror: %B: Conflicting architecture profiles %c/%cWarning: %B: Conflicting platform configurationerror: %B: Conflicting use of R9error: %B: SB relative addressing conflicts with use of R9warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may failwarning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may failerror: %B uses iWMMXt register arguments, %B does noterror: fp16 format mismatch between %B and %B%B has has both the current and legacy Tag_MPextension_use attributeserror: %B is already in final BE8 formaterror: Source object %B has EABI version %d, but target %B has EABI version %derror: %B is compiled for APCS-%d, whereas target %B uses APCS-%derror: %B passes floats in float registers, whereas %B passes them in integer registerserror: %B passes floats in integer registers, whereas %B passes them in float registerserror: %B uses VFP instructions, whereas %B does noterror: %B uses FPA instructions, whereas %B does noterror: %B uses Maverick instructions, whereas %B does noterror: %B does not use Maverick instructions, whereas %B doeserror: %B uses software FP, whereas %B uses hardware FPerror: %B uses hardware FP, whereas %B uses software FPWarning: %B supports interworking, whereas %B does notWarning: %B does not support interworking, whereas %B does%s: cannot create stub entry %s%B: BE8 images only valid in big-endian mode.%B: warning: selected VFP11 erratum workaround is not necessary for target architectureErrors encountered processing file %s%B: unable to find VFP11 veneer `%s'Invalid TARGET2 relocation type '%s'..ARM.exidxCORE.dynamic.note.gnu.arm.ident.rel.bss.rela.bss.dynbssIWMMXT2IWMMXTprivate flags = %lx: [interworking enabled] [APCS-26] [APCS-32] [VFP float format] [Maverick float format] [FPA float format] [position independent] [new ABI] [old ABI] [software FP] [Version1 EABI] [sorted symbol table] [unsorted symbol table] [Version2 EABI] [Version3 EABI] [Version4 EABI] [Version5 EABI] [BE8] [LE8] <EABI version unrecognised> [relocatable executable] [has entry point]<Unrecognised flag bits set>.glue_7.glue_7t.vfp11_veneer.v4_bx.got.rela.plt.rel.plt.hash.dynstr.dynsym.gnu.version.gnu.version_d.gnu.version_r_DYNAMIC.reg.__stub%08x_%s+%x_%d%08x_%x:%x+%x_%d__%s_from_arm__%s_from_thumb(local).tls_varsunknown errorunsupported relocationout of range.gnu.linkonce.armexidx.__real_%s_TLS_MODULE_BASE_.rel.iplt.rela.iplta local symbol.iplt.igot.plt%B: bad symbol index: %dR_ARM_IRELATIVE<unknown>unnamed__%s_veneer%x:%x__bx_r%d__vfp11_veneer_%x__vfp11_veneer_%x_r$a.interp/usr/lib/ld.so.1.relgot-relelf32-littlearm-symbianelf32-bigarm-symbianelf32-littlearm-vxworkself32-bigarm-vxworkself32-littlearm-naclelf32-bigarm-naclelf32-littlearmelf32-bigarmaeabi.ARM.attributes$t$dR_ARM_NONER_ARM_PC24R_ARM_ABS32R_ARM_REL32R_ARM_LDR_PC_G0R_ARM_ABS16R_ARM_ABS12R_ARM_THM_ABS5R_ARM_ABS8R_ARM_SBREL32R_ARM_THM_CALLR_ARM_THM_PC8R_ARM_BREL_ADJR_ARM_TLS_DESCR_ARM_SWI8R_ARM_XPC25R_ARM_THM_XPC22R_ARM_TLS_DTPMOD32R_ARM_TLS_DTPOFF32R_ARM_TLS_TPOFF32R_ARM_COPYR_ARM_GLOB_DATR_ARM_JUMP_SLOTR_ARM_RELATIVER_ARM_GOTOFF32R_ARM_GOTPCR_ARM_GOT32R_ARM_PLT32R_ARM_CALLR_ARM_JUMP24R_ARM_THM_JUMP24R_ARM_BASE_ABSR_ARM_ALU_PCREL_7_0R_ARM_ALU_PCREL_15_8R_ARM_ALU_PCREL_23_15R_ARM_LDR_SBREL_11_0R_ARM_ALU_SBREL_19_12R_ARM_ALU_SBREL_27_20R_ARM_TARGET1R_ARM_ROSEGREL32R_ARM_V4BXR_ARM_TARGET2R_ARM_PREL31R_ARM_MOVW_ABS_NCR_ARM_MOVT_ABSR_ARM_MOVW_PREL_NCR_ARM_MOVT_PRELR_ARM_THM_MOVW_ABS_NCR_ARM_THM_MOVT_ABSR_ARM_THM_MOVW_PREL_NCR_ARM_THM_MOVT_PRELR_ARM_THM_JUMP19R_ARM_THM_JUMP6R_ARM_THM_ALU_PREL_11_0R_ARM_THM_PC12R_ARM_ABS32_NOIR_ARM_REL32_NOIR_ARM_ALU_PC_G0_NCR_ARM_ALU_PC_G0R_ARM_ALU_PC_G1_NCR_ARM_ALU_PC_G1R_ARM_ALU_PC_G2R_ARM_LDR_PC_G1R_ARM_LDR_PC_G2R_ARM_LDRS_PC_G0R_ARM_LDRS_PC_G1R_ARM_LDRS_PC_G2R_ARM_LDC_PC_G0R_ARM_LDC_PC_G1R_ARM_LDC_PC_G2R_ARM_ALU_SB_G0_NCR_ARM_ALU_SB_G0R_ARM_ALU_SB_G1_NCR_ARM_ALU_SB_G1R_ARM_ALU_SB_G2R_ARM_LDR_SB_G0R_ARM_LDR_SB_G1R_ARM_LDR_SB_G2R_ARM_LDRS_SB_G0R_ARM_LDRS_SB_G1R_ARM_LDRS_SB_G2R_ARM_LDC_SB_G0R_ARM_LDC_SB_G1R_ARM_LDC_SB_G2R_ARM_MOVW_BREL_NCR_ARM_MOVT_BRELR_ARM_MOVW_BRELR_ARM_THM_MOVW_BREL_NCR_ARM_THM_MOVT_BRELR_ARM_THM_MOVW_BRELR_ARM_TLS_GOTDESCR_ARM_TLS_CALLR_ARM_TLS_DESCSEQR_ARM_THM_TLS_CALLR_ARM_PLT32_ABSR_ARM_GOT_ABSR_ARM_GOT_PRELR_ARM_GOT_BREL12R_ARM_GOTOFF12R_ARM_GNU_VTENTRYR_ARM_GNU_VTINHERITR_ARM_THM_JUMP11R_ARM_THM_JUMP8R_ARM_TLS_GD32R_ARM_TLS_LDM32R_ARM_TLS_LDO32R_ARM_TLS_IE32R_ARM_TLS_LE32R_ARM_TLS_LDO12R_ARM_TLS_LE12R_ARM_TLS_IE12GPR_ARM_THM_TLS_DESCSEQR_ARM_RREL32R_ARM_RABS32R_ARM_RPC24R_ARM_RBASEPre v4ARM v4ARM v4TARM v5TARM v5TEARM v5TEJARM v6ARM v6KZARM v6T2ARM v6KARM v7ARM v6-MARM v6S-MARM v8variable-size32-bit.init_array.fini_array.preinit_array########""""""""`baa``````b````````````````bbbbb```````````baaaaaaaab```aa````````````````````````````````````````b````````b@b``b8t`{zoxwzozozoxzozozozozozozo@w8|{xzo|||zozozozozoszo~~~~ut}|p~p~p~p~p~XtXtXtxsxsxsp~p~p~p~p~XtXtXtxsxsxs~~~8r8r8r8rzozo{zozozopptt8rqq8rpzozozozozozozozozozozozozozozozozozozozo8rg yQ?-aQQQ(QQQQQQQQQQQQQQQQQQQQQQQQQQQAAAAQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQPQQQQQQQQQQQQQQQQQQQQQQ:xQ```N6?/@``$@@`p-N?/@``$@@`p-c?/@``$@`p-{?/@``$@`p-?/@``$@`p-@?/@``$@`p-@?/@``$@`p-?/@``$@`p-4 (
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Program Header:
0x%lx%8s off    0x vaddr 0x paddr 0x align 2**%u
         filesz 0x memsz 0x flags %c%c%c
Dynamic Section:
  %-20s 0x
Version definitions:
%d 0x%2.2x 0x%8.8lx %s
%s 
Version References:
  required from %s:
%s/%dNetBSD-CORE.note.netbsdcore.procinfo.reg.reg2OpenBSD.reg-xfp.auxv.wcookieQNX.qnx_core_info.qnx_core_status/%ld.qnx_core_statusSPU/win32.reg/%ld.module/%08lxLINUX.reg-xstate.reg-ppc-vmx.reg-ppc-vsx.reg-s390-high-gprs.reg-s390-timer.reg-s390-todcmp.reg-s390-todpreg.reg-s390-ctrs.reg-s390-prefix.reg-s390-last-break.reg-s390-system-call.reg-arm-vfpstapsdtnullloaddynamicinterpnoteshlibphdreh_frame_hdrstackrelroproc.debug.gnu.linkonce.wi..gdb_index.line.zdebug%B: invalid SHT_GROUP entry.gnu.linkonceCORE.rel.plt.rela.plt.pltLARGE_COMMONSHT_NULLSHT_PROGBITSSHT_SYMTABSHT_STRTABSHT_RELASHT_HASHSHT_DYNAMICSHT_NOTESHT_NOBITSSHT_RELSHT_SHLIBSHT_DYNSYM.bss.comment.data.data1.debug_line.debug_info.debug_abbrev.debug_aranges.fini.fini_array.gnu.linkonce.b.gnu.lto_.got.gnu.version.gnu.version_d.gnu.version_r.gnu.liblist.gnu.conflict.gnu.hash.hash.init.init_array.note.GNU-stack.preinit_array.rodata.rodata1.stabstr.text.tbss.tdata.zdebug_line.zdebug_info.zdebug_abbrev.zdebug_aranges/tmp/AOSP-toolchain/build/../binutils/binutils-2.23/bfd/elf.c%B: invalid string offset %u >= %lu for section `%s'%B symbol number %lu references nonexistent SHT_SYMTAB_SHNDX section%B: warning: sh_link not set for section `%A'%B: sh_link [%d] in section `%A' is incorrect%B: unknown [%d] section `%s' in group [%s]warning: section `%A' type changed to PROGBITS%B: sh_link of section `%A' points to discarded section `%A' of `%B'%B: sh_link of section `%A' points to removed section `%A' of `%B'Unable to find equivalent output section for symbol '%s' from section '%s'%B: The first section in the PT_DYNAMIC segment is not the .dynamic section%B: Not enough room for program headers, try linking with -N%B: section %A lma %#lx adjusted to %#lx%B: section `%A' can't be allocated in segment %d%B: warning: allocated section `%s' not in segment%B: symbol `%s' required but not present%B: warning: Empty loadable segment detected, is this intentional ?
    0x%8.8lx 0x%2.2x %2.2d %s
%B: unsupported relocation type %s%B: Corrupt size field in group section header: 0x%lx%B: no group info for section %A%B: unable to initialize compress status for section %s%B: unable to initialize decompress status for section %s%B: invalid link %lu for reloc section %s (index %u)%B: don't know how to handle allocated, application specific section `%s' [0x%8x]%B: don't know how to handle processor specific section `%s' [0x%8x]%B: don't know how to handle OS specific section `%s' [0x%8x]%B: don't know how to handle section `%s' [0x%8x]_____H8(xXbfd_elf_get_elf_syms` @@bfd_elf_set_group_contentsassign_file_positions_for_non_load_sectionsget_program_header_sizerewrite_elf_program_header_bfd_elf_get_lineno_bfd_elf_no_info_to_howto"+18DP
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