HomeSort by relevance Sort by last modified time
    Searched defs:AMDGPU (Results 1 - 5 of 5) sorted by null

  /external/llvm/lib/Target/R600/
AMDGPUInstrInfo.h 1 //===-- AMDGPUInstrInfo.h - AMDGPU Instruction Information ------*- C++ -*-===//
29 #define OPCODE_IS_ZERO_INT AMDGPU::PRED_SETE_INT
30 #define OPCODE_IS_NOT_ZERO_INT AMDGPU::PRED_SETNE_INT
31 #define OPCODE_IS_ZERO AMDGPU::PRED_SETE
32 #define OPCODE_IS_NOT_ZERO AMDGPU::PRED_SETNE
191 namespace AMDGPU {
193 } // End namespace AMDGPU
R600InstrInfo.h 294 namespace AMDGPU {
298 } //End namespace AMDGPU
SIInstrInfo.h 180 namespace AMDGPU {
190 } // End namespace AMDGPU
AMDGPUInstrInfo.cpp 95 case AMDGPU::BRANCH_COND_i32:
96 case AMDGPU::BRANCH_COND_f32:
97 case AMDGPU::BRANCH:
126 int OffsetOpIdx = AMDGPU::getNamedOperandIdx(MI->getOpcode(),
127 AMDGPU::OpName::addr);
131 int ChanOpIdx = AMDGPU::getNamedOperandIdx(MI->getOpcode(),
132 AMDGPU::OpName::chan);
134 int DstOpIdx = AMDGPU::getNamedOperandIdx(MI->getOpcode(),
135 AMDGPU::OpName::dst);
140 if (OffsetReg == AMDGPU::INDIRECT_BASE_ADDR)
    [all...]
SIInstrInfo.cpp 44 assert(DestReg != AMDGPU::SCC && SrcReg != AMDGPU::SCC);
47 AMDGPU::sub0, AMDGPU::sub1, AMDGPU::sub2, AMDGPU::sub3,
48 AMDGPU::sub4, AMDGPU::sub5, AMDGPU::sub6, AMDGPU::sub7
    [all...]

Completed in 219 milliseconds